xref: /llvm-project/llvm/test/Transforms/IROutliner/illegal-branches.ll (revision f4b925ee7078f058602fd323e25f45f1ae91ca34)
1cea80760SAndrew Litteken; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
29dd9575cSRoman Lebedev; RUN: opt -S -passes=verify,iroutliner -no-ir-sim-branch-matching -ir-outlining-no-cost < %s | FileCheck %s
3cea80760SAndrew Litteken
4cea80760SAndrew Litteken; Show that we do not extract sections with branches as it would require extra
5cea80760SAndrew Litteken; label and control flow checking.
6cea80760SAndrew Litteken
7cea80760SAndrew Littekendefine void @function1() {
8cea80760SAndrew Litteken; CHECK-LABEL: @function1(
9cea80760SAndrew Litteken; CHECK-NEXT:  entry:
10cea80760SAndrew Litteken; CHECK-NEXT:    [[A:%.*]] = alloca i32, align 4
11cea80760SAndrew Litteken; CHECK-NEXT:    [[B:%.*]] = alloca i32, align 4
12cea80760SAndrew Litteken; CHECK-NEXT:    [[C:%.*]] = alloca i32, align 4
13*f4b925eeSMatt Arsenault; CHECK-NEXT:    call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]])
14cea80760SAndrew Litteken; CHECK-NEXT:    br label [[NEXT:%.*]]
15cea80760SAndrew Litteken; CHECK:       next:
16cea80760SAndrew Litteken; CHECK-NEXT:    ret void
17cea80760SAndrew Litteken;
18cea80760SAndrew Littekenentry:
19cea80760SAndrew Litteken  %a = alloca i32, align 4
20cea80760SAndrew Litteken  %b = alloca i32, align 4
21cea80760SAndrew Litteken  %c = alloca i32, align 4
22*f4b925eeSMatt Arsenault  store i32 2, ptr %a, align 4
23*f4b925eeSMatt Arsenault  store i32 3, ptr %b, align 4
24*f4b925eeSMatt Arsenault  store i32 4, ptr %c, align 4
25cea80760SAndrew Litteken  br label %next
26cea80760SAndrew Littekennext:
27cea80760SAndrew Litteken  ret void
28cea80760SAndrew Litteken}
29cea80760SAndrew Litteken
30cea80760SAndrew Littekendefine void @function2() {
31cea80760SAndrew Litteken; CHECK-LABEL: @function2(
32cea80760SAndrew Litteken; CHECK-NEXT:  entry:
33cea80760SAndrew Litteken; CHECK-NEXT:    [[A:%.*]] = alloca i32, align 4
34cea80760SAndrew Litteken; CHECK-NEXT:    [[B:%.*]] = alloca i32, align 4
35cea80760SAndrew Litteken; CHECK-NEXT:    [[C:%.*]] = alloca i32, align 4
36*f4b925eeSMatt Arsenault; CHECK-NEXT:    call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]])
37cea80760SAndrew Litteken; CHECK-NEXT:    br label [[NEXT:%.*]]
38cea80760SAndrew Litteken; CHECK:       next:
39cea80760SAndrew Litteken; CHECK-NEXT:    ret void
40cea80760SAndrew Litteken;
41cea80760SAndrew Littekenentry:
42cea80760SAndrew Litteken  %a = alloca i32, align 4
43cea80760SAndrew Litteken  %b = alloca i32, align 4
44cea80760SAndrew Litteken  %c = alloca i32, align 4
45*f4b925eeSMatt Arsenault  store i32 2, ptr %a, align 4
46*f4b925eeSMatt Arsenault  store i32 3, ptr %b, align 4
47*f4b925eeSMatt Arsenault  store i32 4, ptr %c, align 4
48cea80760SAndrew Litteken  br label %next
49cea80760SAndrew Littekennext:
50cea80760SAndrew Litteken  ret void
51cea80760SAndrew Litteken}
52