1*9d7b3573SYingwei Zheng; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2*9d7b3573SYingwei Zheng; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s 3*9d7b3573SYingwei Zheng 4*9d7b3573SYingwei Zhengdefine i32 @f(i64 %a3, i64 %numElements) { 5*9d7b3573SYingwei Zheng; CHECK-LABEL: define i32 @f( 6*9d7b3573SYingwei Zheng; CHECK-SAME: i64 [[A3:%.*]], i64 [[NUMELEMENTS:%.*]]) { 7*9d7b3573SYingwei Zheng; CHECK-NEXT: entry: 8*9d7b3573SYingwei Zheng; CHECK-NEXT: [[COND:%.*]] = icmp ule i64 [[NUMELEMENTS]], 1152921504606846975 9*9d7b3573SYingwei Zheng; CHECK-NEXT: call void @llvm.assume(i1 [[COND]]) 10*9d7b3573SYingwei Zheng; CHECK-NEXT: [[A1:%.*]] = shl nuw i64 [[NUMELEMENTS]], 4 11*9d7b3573SYingwei Zheng; CHECK-NEXT: br label [[IF_END:%.*]] 12*9d7b3573SYingwei Zheng; CHECK: if.end: 13*9d7b3573SYingwei Zheng; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[A1]], [[A3]] 14*9d7b3573SYingwei Zheng; CHECK-NEXT: br i1 [[CMP]], label [[IF_END_I:%.*]], label [[ABORT:%.*]] 15*9d7b3573SYingwei Zheng; CHECK: if.end.i: 16*9d7b3573SYingwei Zheng; CHECK-NEXT: [[CMP2_NOT_I:%.*]] = icmp ult i64 [[A1]], [[A3]] 17*9d7b3573SYingwei Zheng; CHECK-NEXT: br i1 [[CMP2_NOT_I]], label [[ABORT]], label [[EXIT:%.*]] 18*9d7b3573SYingwei Zheng; CHECK: abort: 19*9d7b3573SYingwei Zheng; CHECK-NEXT: ret i32 -1 20*9d7b3573SYingwei Zheng; CHECK: exit: 21*9d7b3573SYingwei Zheng; CHECK-NEXT: ret i32 0 22*9d7b3573SYingwei Zheng; 23*9d7b3573SYingwei Zhengentry: 24*9d7b3573SYingwei Zheng %cond = icmp ule i64 %numElements, 1152921504606846975 25*9d7b3573SYingwei Zheng call void @llvm.assume(i1 %cond) 26*9d7b3573SYingwei Zheng %a1 = shl nuw i64 %numElements, 4 27*9d7b3573SYingwei Zheng br label %if.end 28*9d7b3573SYingwei Zhengif.end: 29*9d7b3573SYingwei Zheng %cmp = icmp ugt i64 %a1, %a3 30*9d7b3573SYingwei Zheng br i1 %cmp, label %if.end.i, label %abort 31*9d7b3573SYingwei Zhengif.end.i: 32*9d7b3573SYingwei Zheng %cmp2.not.i = icmp ult i64 %a1, %a3 33*9d7b3573SYingwei Zheng br i1 %cmp2.not.i, label %abort, label %exit 34*9d7b3573SYingwei Zhengabort: 35*9d7b3573SYingwei Zheng ret i32 -1 36*9d7b3573SYingwei Zhengexit: 37*9d7b3573SYingwei Zheng ret i32 0 38*9d7b3573SYingwei Zheng} 39*9d7b3573SYingwei Zheng 40*9d7b3573SYingwei Zhengdeclare void @llvm.assume(i1) 41