xref: /llvm-project/llvm/test/MC/Xtensa/Core/shift.s (revision 4e0c1d98d3717d10e0230604a088ef38a3f7e060)
1*4e0c1d98SAndrei Safronov# RUN: llvm-mc %s -triple=xtensa -show-encoding \
2*4e0c1d98SAndrei Safronov# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-INST %s
3*4e0c1d98SAndrei Safronov
4*4e0c1d98SAndrei Safronov
5*4e0c1d98SAndrei Safronov.align	4
6*4e0c1d98SAndrei SafronovLBL0:
7*4e0c1d98SAndrei Safronov
8*4e0c1d98SAndrei Safronov# Instruction format RRR
9*4e0c1d98SAndrei Safronov# CHECK-INST: extui a1, a2, 7, 8
10*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x20,0x17,0x74]
11*4e0c1d98SAndrei Safronovextui a1, a2, 7, 8
12*4e0c1d98SAndrei Safronov
13*4e0c1d98SAndrei Safronov# Instruction format RRR
14*4e0c1d98SAndrei Safronov# CHECK-INST: sll a10, a11
15*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x00,0xab,0xa1]
16*4e0c1d98SAndrei Safronovsll a10, a11
17*4e0c1d98SAndrei Safronov
18*4e0c1d98SAndrei Safronov# Instruction format RRR
19*4e0c1d98SAndrei Safronov# CHECK-INST: slli a5, a1, 15
20*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x10,0x51,0x11]
21*4e0c1d98SAndrei Safronovslli a5, a1, 15
22*4e0c1d98SAndrei Safronov
23*4e0c1d98SAndrei Safronov# Instruction format RRR
24*4e0c1d98SAndrei Safronov# CHECK-INST: sra a12, a3
25*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x30,0xc0,0xb1]
26*4e0c1d98SAndrei Safronovsra a12, a3
27*4e0c1d98SAndrei Safronov
28*4e0c1d98SAndrei Safronov# Instruction format RRR
29*4e0c1d98SAndrei Safronov# CHECK-INST: srai a8, a5, 0
30*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x50,0x80,0x21]
31*4e0c1d98SAndrei Safronovsrai a8, a5, 0
32*4e0c1d98SAndrei Safronov
33*4e0c1d98SAndrei Safronov# Instruction format RRR
34*4e0c1d98SAndrei Safronov# CHECK-INST: src a3, a4, a5
35*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x50,0x34,0x81]
36*4e0c1d98SAndrei Safronovsrc a3, a4, a5
37*4e0c1d98SAndrei Safronov
38*4e0c1d98SAndrei Safronov# Instruction format RRR
39*4e0c1d98SAndrei Safronov# CHECK-INST: srl a6, a7
40*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x70,0x60,0x91]
41*4e0c1d98SAndrei Safronovsrl a6, a7
42*4e0c1d98SAndrei Safronov
43*4e0c1d98SAndrei Safronov# Instruction format RRR
44*4e0c1d98SAndrei Safronov# CHECK-INST: srli a3, a4, 8
45*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x40,0x38,0x41]
46*4e0c1d98SAndrei Safronovsrli a3, a4, 8
47*4e0c1d98SAndrei Safronov
48*4e0c1d98SAndrei Safronov# Instruction format RRR
49*4e0c1d98SAndrei Safronov# CHECK-INST: ssa8l a14
50*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x00,0x2e,0x40]
51*4e0c1d98SAndrei Safronovssa8l a14
52*4e0c1d98SAndrei Safronov
53*4e0c1d98SAndrei Safronov# Instruction format RRR
54*4e0c1d98SAndrei Safronov# CHECK-INST: ssai 31
55*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x10,0x4f,0x40]
56*4e0c1d98SAndrei Safronovssai 31
57*4e0c1d98SAndrei Safronov
58*4e0c1d98SAndrei Safronov# Instruction format RRR
59*4e0c1d98SAndrei Safronov# CHECK-INST: ssl a0
60*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x00,0x10,0x40]
61*4e0c1d98SAndrei Safronovssl a0
62*4e0c1d98SAndrei Safronov
63*4e0c1d98SAndrei Safronov# Instruction format RRR
64*4e0c1d98SAndrei Safronov# CHECK-INST: ssr a2
65*4e0c1d98SAndrei Safronov# CHECK: encoding: [0x00,0x02,0x40]
66*4e0c1d98SAndrei Safronovssr a2
67