xref: /llvm-project/llvm/test/MC/Hexagon/sysregs2.s (revision 252c42354eca54274ed7b10c32c73c6937478e8b)

# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
#

            sgp1:0=r1:0
# CHECK:  { s1:0 = r1:0 }
           s3:2=r7:6
# CHECK: { s3:2 = r7:6 }
           badva1:0=r11:10
# CHECK: { s5:4 = r11:10 }
           s7:6=r13:12
# CHECK: { s7:6 = r13:12 }
           r1:0=s9:8
# CHECK: { r1:0 = s9:8 }
           r1:0=s17:16
# CHECK: { r1:0 = s17:16 }
           r3:2=s21:20
# CHECK: { r3:2 = s21:20 }
           r3:2=s27:26
# CHECK: { r3:2 = s27:26 }
           r29:28=s29:28
# CHECK: { r29:28 = s29:28 }
           s31:30=r17:16
# CHECK: { s31:30 = r17:16 }
           s37:36=r1:0
# CHECK: { s37:36 = r1:0 }
           s39:38=r1:0
# CHECK: { s39:38 = r1:0 }
           r1:0 =s41:40
# CHECK: { r1:0 = s41:40 }
           s43:42=r7:6
# CHECK: { s43:42 = r7:6 }
           s45:44=r9:8
# CHECK: { s45:44 = r9:8 }
           s47:46=r17:16
# CHECK: { s47:46 = r17:16 }
           s49:48=r19:18
# CHECK: { s49:48 = r19:18 }
           s51:50=r27:26
# CHECK: { s51:50 = r27:26 }
           s53:52=r23:22
# CHECK: { s53:52 = r23:22 }
           s61:60=r21:20
# CHECK: { s61:60 = r21:20 }
           s63:62=r5:4
# CHECK: { s63:62 = r5:4 }

# The following were added for Bug 13858

           r10=sgp0
# CHECK: { r10 = sgp0 }
           r10=sgp1
# CHECK: { r10 = sgp1 }
           r10=stid
# CHECK: { r10 = stid }
           r10=elr
# CHECK: { r10 = elr }
           r10=badva0
# CHECK: { r10 = badva0 }
           r10=badva1
# CHECK: { r10 = badva1 }
           r10=ssr
# CHECK: { r10 = ssr }
           r10=ccr
# CHECK: { r10 = ccr }
           r10=htid
# CHECK: { r10 = htid }
           r10=badva
# CHECK: { r10 = badva }
           r10=imask
# CHECK: { r10 = imask }
           r10=s11
# CHECK: { r10 = s11 }
           r10=evb
# CHECK: { r10 = evb }
           r10=modectl
# CHECK: { r10 = modectl }
           r10=syscfg
# CHECK: { r10 = syscfg }
           r10=s20
# CHECK: { r10 = s20 }
           r10=vid
# CHECK: { r10 = vid }
           r10=s22
# CHECK: { r10 = s22 }
           r10=cfgbase
# CHECK: { r10 = cfgbase }
           r10=diag
# CHECK: { r10 = diag }
           r10=rev
# CHECK: { r10 = rev }
           r10=pcyclelo
# CHECK: { r10 = pcyclelo }
           r10=pcyclehi
# CHECK: { r10 = pcyclehi }
           r10=isdbst
# CHECK: { r10 = isdbst }
           r10=isdbcfg0
# CHECK: { r10 = isdbcfg0 }
           r10=isdbcfg1
# CHECK: { r10 = isdbcfg1 }
           r10=s35
# CHECK: { r10 = s35 }
           r10=brkptpc0
# CHECK: { r10 = brkptpc0 }
           r10=brkptcfg0
# CHECK: { r10 = brkptcfg0 }
           r10=brkptpc1
# CHECK: { r10 = brkptpc1 }
           r10=brkptcfg1
# CHECK: { r10 = brkptcfg1 }
           r10=isdbmbxin
# CHECK: { r10 = isdbmbxin }
           r10=isdbmbxout
# CHECK: { r10 = isdbmbxout }
           r10=isdben
# CHECK: { r10 = isdben }
           r10=isdbgpr
# CHECK: { r10 = isdbgpr }
           r10=s44
# CHECK: { r10 = s44 }
           r10=s45
# CHECK: { r10 = s45 }
           r10=s46
# CHECK: { r10 = s46 }
           r10=s47
# CHECK: { r10 = s47 }
           r10=pmucnt0
# CHECK: { r10 = pmucnt0 }
           r10=pmucnt1
# CHECK: { r10 = pmucnt1 }
           r10=pmucnt2
# CHECK: { r10 = pmucnt2 }
           r10=pmucnt3
# CHECK: { r10 = pmucnt3 }
           r10=pmuevtcfg
# CHECK: { r10 = pmuevtcfg }
           r10=s54
# CHECK: { r10 = s54 }
           r10=s60
# CHECK: { r10 = s60 }
           r10=s61
# CHECK: { r10 = s61 }
           r10=s62
# CHECK: { r10 = s62 }
           r10=s63
# CHECK: { r10 = s63 }
           r10=s70
# CHECK: { r10 = s70 }
           r10=s71
# CHECK: { r10 = s71 }
           r10=s72
# CHECK: { r10 = s72 }
           r10=s73
# CHECK: { r10 = s73 }
           r10=s74
# CHECK: { r10 = s74 }
           r10=s75
# CHECK: { r10 = s75 }
           r10=s76
# CHECK: { r10 = s76 }
           r10=s77
# CHECK: { r10 = s77 }
           r10=s78
# CHECK: { r10 = s78 }
           r10=s79
# CHECK: { r10 = s79 }
           r10=s80
# CHECK: { r10 = s80 }