xref: /llvm-project/llvm/test/MC/Disassembler/AMDGPU/kernel-descriptor-rsrc-errors.test (revision 68e814d9114b6c8910642298714dad6fa79ccad2)
1*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX1200 -DSRC1=0300AC60 -DSRC2=80000000 -DSRC3=00000000 \
2*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=VALID
3*68e814d9SEmma Pilkington# VALID: .amdhsa_kernel test
4*68e814d9SEmma Pilkington
5*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX1200 -DSRC1=4300AC60 -DSRC2=80000000 -DSRC3=00000000 \
6*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=SRC1_9_6
7*68e814d9SEmma Pilkington# SRC1_9_6: ; error decoding test.kd: kernel descriptor COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT reserved bits in range (9:6) set, must be zero on gfx10+
8*68e814d9SEmma Pilkington# SRC1_9_6-NEXT: ; decoding failed region as bytes
9*68e814d9SEmma Pilkington
10*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX1200 -DSRC1=0308AC60 -DSRC2=80000000 -DSRC3=00000000 \
11*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=SRC1_PRIORITY
12*68e814d9SEmma Pilkington# SRC1_PRIORITY: ; error decoding test.kd: kernel descriptor COMPUTE_PGM_RSRC1_PRIORITY reserved bits in range (11:10) set
13*68e814d9SEmma Pilkington# SRC1_PRIORITY-NEXT: ; decoding failed region as bytes
14*68e814d9SEmma Pilkington
15*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX1200 -DSRC1=0300BC60 -DSRC2=80000000 -DSRC3=00000000 \
16*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=SRC1_PRIV
17*68e814d9SEmma Pilkington# SRC1_PRIV: ; error decoding test.kd: kernel descriptor COMPUTE_PGM_RSRC1_PRIV reserved bit (20) set
18*68e814d9SEmma Pilkington# SRC1_PRIV-NEXT: ; decoding failed region as bytes
19*68e814d9SEmma Pilkington
20*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX801 -DSRC1=0300AC64 -DSRC2=80000000 -DSRC3=00000000 \
21*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=SRC1_6_8
22*68e814d9SEmma Pilkington# SRC1_6_8: ; error decoding test.kd: kernel descriptor COMPUTE_PGM_RSRC1 reserved bit (26) set, must be zero pre-gfx9
23*68e814d9SEmma Pilkington# SRC1_6_8-NEXT: ; decoding failed region as bytes
24*68e814d9SEmma Pilkington
25*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX1200 -DSRC1=0300AC60 -DSRC2=80200000 -DSRC3=00000000 \
26*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=RSRC2
27*68e814d9SEmma Pilkington# RSRC2: ; error decoding test.kd: kernel descriptor COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_ADDRESS_WATCH reserved bit (13) set
28*68e814d9SEmma Pilkington# RSRC2-NEXT: ; decoding failed region as bytes
29*68e814d9SEmma Pilkington
30*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX90A -DSRC1=0300AC60 -DSRC2=80000000 -DSRC3=40000000 \
31*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=RSRC3_90A
32*68e814d9SEmma Pilkington# RSRC3_90A: ; error decoding test.kd: kernel descriptor COMPUTE_PGM_RSRC3 reserved bits in range (15:6) set, must be zero on gfx90a
33*68e814d9SEmma Pilkington# RSRC3_90A-NEXT: ; decoding failed region as bytes
34*68e814d9SEmma Pilkington
35*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX1200 -DSRC1=0300AC60 -DSRC2=80000000 -DSRC3=01000000 \
36*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=RSRC3_RES
37*68e814d9SEmma Pilkington# RSRC3_RES: ; error decoding test.kd: kernel descriptor COMPUTE_PGM_RSRC3 reserved bits in range (3:0) set, must be zero on gfx12+
38*68e814d9SEmma Pilkington# RSRC3_RES-NEXT: ; decoding failed region as bytes
39*68e814d9SEmma Pilkington
40*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX1100 -DSRC1=0300AC60 -DSRC2=80000000 -DSRC3=00000100 \
41*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=RSRC3_10
42*68e814d9SEmma Pilkington# RSRC3_10: ; error decoding test.kd: kernel descriptor COMPUTE_PGM_RSRC3 reserved bits in range (30:14) set, must be zero on gfx10+
43*68e814d9SEmma Pilkington# RSRC3_10-NEXT: ; decoding failed region as bytes
44*68e814d9SEmma Pilkington
45*68e814d9SEmma Pilkington# RUN: yaml2obj %s -DGPU=GFX801 -DSRC1=0300AC60 -DSRC2=80000000 -DSRC3=00000001 \
46*68e814d9SEmma Pilkington# RUN:   | llvm-objdump --disassemble-symbols=test.kd - | FileCheck %s --check-prefix=RSRC3_PRE_9
47*68e814d9SEmma Pilkington# RSRC3_PRE_9: ; error decoding test.kd: kernel descriptor COMPUTE_PGM_RSRC3 must be all zero before gfx9
48*68e814d9SEmma Pilkington# RSRC3_PRE_9-NEXT: ; decoding failed region as bytes
49*68e814d9SEmma Pilkington
50*68e814d9SEmma Pilkington--- !ELF
51*68e814d9SEmma PilkingtonFileHeader:
52*68e814d9SEmma Pilkington  Class:           ELFCLASS64
53*68e814d9SEmma Pilkington  Data:            ELFDATA2LSB
54*68e814d9SEmma Pilkington  OSABI:           ELFOSABI_AMDGPU_HSA
55*68e814d9SEmma Pilkington  ABIVersion:      0x3
56*68e814d9SEmma Pilkington  Type:            ET_REL
57*68e814d9SEmma Pilkington  Machine:         EM_AMDGPU
58*68e814d9SEmma Pilkington  Flags:           [ EF_AMDGPU_MACH_AMDGCN_[[GPU]], EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4, EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4 ]
59*68e814d9SEmma Pilkington  SectionHeaderStringTable: .strtab
60*68e814d9SEmma PilkingtonSections:
61*68e814d9SEmma Pilkington  - Name:            .text
62*68e814d9SEmma Pilkington    Type:            SHT_PROGBITS
63*68e814d9SEmma Pilkington    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
64*68e814d9SEmma Pilkington    AddressAlign:    0x4
65*68e814d9SEmma Pilkington    Content:         0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000[[SRC3]][[SRC1]][[SRC2]]0004000000000000
66*68e814d9SEmma Pilkington  - Name:            .rela.text
67*68e814d9SEmma Pilkington    Type:            SHT_RELA
68*68e814d9SEmma Pilkington    Flags:           [ SHF_INFO_LINK ]
69*68e814d9SEmma Pilkington    Link:            .symtab
70*68e814d9SEmma Pilkington    AddressAlign:    0x8
71*68e814d9SEmma Pilkington    Info:            .text
72*68e814d9SEmma Pilkington    Relocations:
73*68e814d9SEmma Pilkington      - Offset:          0x10
74*68e814d9SEmma Pilkington        Symbol:          test
75*68e814d9SEmma Pilkington        Type:            R_AMDGPU_REL64
76*68e814d9SEmma Pilkington        Addend:          16
77*68e814d9SEmma Pilkington  - Type:            SectionHeaderTable
78*68e814d9SEmma Pilkington    Sections:
79*68e814d9SEmma Pilkington      - Name:            .strtab
80*68e814d9SEmma Pilkington      - Name:            .text
81*68e814d9SEmma Pilkington      - Name:            .rela.text
82*68e814d9SEmma Pilkington      - Name:            .symtab
83*68e814d9SEmma PilkingtonSymbols:
84*68e814d9SEmma Pilkington  - Name:            test.kd
85*68e814d9SEmma Pilkington    Type:            STT_OBJECT
86*68e814d9SEmma Pilkington    Section:         .text
87*68e814d9SEmma Pilkington    Binding:         STB_GLOBAL
88*68e814d9SEmma Pilkington    Size:            0x40
89*68e814d9SEmma Pilkington  - Name:            test
90*68e814d9SEmma Pilkington    Binding:         STB_GLOBAL
91*68e814d9SEmma Pilkington    Other:           [ STV_PROTECTED ]
92*68e814d9SEmma Pilkington...
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