1640527f7SAndre Vieira// RUN: not llvm-mc -triple=armv7a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \ 2640527f7SAndre Vieira// RUN: | FileCheck --check-prefix=CHECK-V7A-ARM %s 3640527f7SAndre Vieira// RUN: FileCheck --check-prefix=ERROR-V7A-ARM < %t %s 4640527f7SAndre Vieira// RUN: not llvm-mc -triple=thumbv7a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \ 5640527f7SAndre Vieira// RUN: | FileCheck --check-prefix=CHECK-V7A-THUMB %s 6640527f7SAndre Vieira// RUN: FileCheck --check-prefix=ERROR-V7A-THUMB < %t %s 7640527f7SAndre Vieira// RUN: not llvm-mc -triple=thumbv7m-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \ 8640527f7SAndre Vieira// RUN: | FileCheck --check-prefix=CHECK-V7M %s 9640527f7SAndre Vieira// RUN: FileCheck --check-prefix=ERROR-V7M < %t %s 10640527f7SAndre Vieira// RUN: not llvm-mc -triple=armv8a-arm-none-eabi -mattr=+fp-armv8 -show-encoding < %s 2>%t \ 11640527f7SAndre Vieira// RUN: | FileCheck --check-prefix=CHECK-V8A-ARM %s 12640527f7SAndre Vieira// RUN: FileCheck --check-prefix=ERROR-V8A-ARM < %t %s 13640527f7SAndre Vieira// RUN: not llvm-mc -triple=thumbv8a-arm-none-eabi -mattr=+fp-armv8 -show-encoding < %s 2>%t \ 14640527f7SAndre Vieira// RUN: | FileCheck --check-prefix=CHECK-V8A-THUMB %s 15640527f7SAndre Vieira// RUN: FileCheck --check-prefix=ERROR-V8A-THUMB < %t %s 16640527f7SAndre Vieira// RUN: not llvm-mc -triple=thumbv8m.main-arm-none-eabi -mattr=+fp-armv8 -show-encoding < %s 2>%t \ 17640527f7SAndre Vieira// RUN: | FileCheck --check-prefix=CHECK-V8M %s 18640527f7SAndre Vieira// RUN: FileCheck --check-prefix=ERROR-V8M < %t %s 19640527f7SAndre Vieira// RUN: not llvm-mc -triple=thumbv7m-arm-none-eabi -show-encoding < %s 2>%t 20640527f7SAndre Vieira// RUN: FileCheck --check-prefix=ERROR-NOVFP < %t %s 21640527f7SAndre Vieira 22640527f7SAndre Vieira vmrs APSR_nzcv, fpscr 23640527f7SAndre Vieira vmrs apsr_nzcv, fpscr 24640527f7SAndre Vieira fmstat 25640527f7SAndre Vieira vmrs r10, fpscr 26640527f7SAndre Vieira vmrs r2, fpsid 27640527f7SAndre Vieira vmrs r3, FPSID 28640527f7SAndre Vieira vmrs r4, mvfr0 29640527f7SAndre Vieira vmrs r5, MVFR1 30640527f7SAndre Vieira vmrs r6, mvfr2 31640527f7SAndre Vieira vmrs sp, fpscr 32640527f7SAndre Vieira vmrs pc, fpscr 33640527f7SAndre Vieira 34640527f7SAndre Vieira// CHECK-V7A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] 35640527f7SAndre Vieira// CHECK-V7A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] 36640527f7SAndre Vieira// CHECK-V7A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] 37640527f7SAndre Vieira// CHECK-V7A-ARM: vmrs r10, fpscr @ encoding: [0x10,0xaa,0xf1,0xee] 38640527f7SAndre Vieira// CHECK-V7A-ARM: vmrs r2, fpsid @ encoding: [0x10,0x2a,0xf0,0xee] 39640527f7SAndre Vieira// CHECK-V7A-ARM: vmrs r3, fpsid @ encoding: [0x10,0x3a,0xf0,0xee] 40640527f7SAndre Vieira// CHECK-V7A-ARM: vmrs r4, mvfr0 @ encoding: [0x10,0x4a,0xf7,0xee] 41640527f7SAndre Vieira// CHECK-V7A-ARM: vmrs r5, mvfr1 @ encoding: [0x10,0x5a,0xf6,0xee] 42640527f7SAndre Vieira// ERROR-V7A-ARM: instruction requires: FPARMv8 43640527f7SAndre Vieira// CHECK-V7A-ARM: vmrs sp, fpscr @ encoding: [0x10,0xda,0xf1,0xee] 44640527f7SAndre Vieira// ERROR-V7A-ARM: invalid operand for instruction 45640527f7SAndre Vieira 46640527f7SAndre Vieira// CHECK-V7A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 47640527f7SAndre Vieira// CHECK-V7A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 48640527f7SAndre Vieira// CHECK-V7A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 49640527f7SAndre Vieira// CHECK-V7A-THUMB: vmrs r10, fpscr @ encoding: [0xf1,0xee,0x10,0xaa] 50640527f7SAndre Vieira// CHECK-V7A-THUMB: vmrs r2, fpsid @ encoding: [0xf0,0xee,0x10,0x2a] 51640527f7SAndre Vieira// CHECK-V7A-THUMB: vmrs r3, fpsid @ encoding: [0xf0,0xee,0x10,0x3a] 52640527f7SAndre Vieira// CHECK-V7A-THUMB: vmrs r4, mvfr0 @ encoding: [0xf7,0xee,0x10,0x4a] 53640527f7SAndre Vieira// CHECK-V7A-THUMB: vmrs r5, mvfr1 @ encoding: [0xf6,0xee,0x10,0x5a] 54640527f7SAndre Vieira// ERROR-V7A-THUMB: instruction requires: FPARMv8 55640527f7SAndre Vieira// ERROR-V7A-THUMB: invalid operand for instruction 56640527f7SAndre Vieira// ERROR-V7A-THUMB: invalid operand for instruction 57640527f7SAndre Vieira 58640527f7SAndre Vieira// CHECK-V7M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 59640527f7SAndre Vieira// CHECK-V7M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 60640527f7SAndre Vieira// CHECK-V7M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 61640527f7SAndre Vieira// CHECK-V7M: vmrs r10, fpscr @ encoding: [0xf1,0xee,0x10,0xaa] 62640527f7SAndre Vieira// CHECK-V7M: vmrs r2, fpsid @ encoding: [0xf0,0xee,0x10,0x2a] 63640527f7SAndre Vieira// CHECK-V7M: vmrs r3, fpsid @ encoding: [0xf0,0xee,0x10,0x3a] 64640527f7SAndre Vieira// CHECK-V7M: vmrs r4, mvfr0 @ encoding: [0xf7,0xee,0x10,0x4a] 65640527f7SAndre Vieira// CHECK-V7M: vmrs r5, mvfr1 @ encoding: [0xf6,0xee,0x10,0x5a] 66640527f7SAndre Vieira// ERROR-V7M: instruction requires: FPARMv8 67640527f7SAndre Vieira// ERROR-V7M: invalid operand for instruction 68640527f7SAndre Vieira// ERROR-V7M: invalid operand for instruction 69640527f7SAndre Vieira 70640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] 71640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] 72640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] 73640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs r10, fpscr @ encoding: [0x10,0xaa,0xf1,0xee] 74640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs r2, fpsid @ encoding: [0x10,0x2a,0xf0,0xee] 75640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs r3, fpsid @ encoding: [0x10,0x3a,0xf0,0xee] 76640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs r4, mvfr0 @ encoding: [0x10,0x4a,0xf7,0xee] 77640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs r5, mvfr1 @ encoding: [0x10,0x5a,0xf6,0xee] 78640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs r6, mvfr2 @ encoding: [0x10,0x6a,0xf5,0xee] 79640527f7SAndre Vieira// CHECK-V8A-ARM: vmrs sp, fpscr @ encoding: [0x10,0xda,0xf1,0xee] 80640527f7SAndre Vieira// ERROR-V8A-ARM: invalid operand for instruction 81640527f7SAndre Vieira 82640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 83640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 84640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 85640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs r10, fpscr @ encoding: [0xf1,0xee,0x10,0xaa] 86640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs r2, fpsid @ encoding: [0xf0,0xee,0x10,0x2a] 87640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs r3, fpsid @ encoding: [0xf0,0xee,0x10,0x3a] 88640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs r4, mvfr0 @ encoding: [0xf7,0xee,0x10,0x4a] 89640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs r5, mvfr1 @ encoding: [0xf6,0xee,0x10,0x5a] 90640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs r6, mvfr2 @ encoding: [0xf5,0xee,0x10,0x6a] 91640527f7SAndre Vieira// CHECK-V8A-THUMB: vmrs sp, fpscr @ encoding: [0xf1,0xee,0x10,0xda] 92640527f7SAndre Vieira// ERROR-V8A-THUMB: invalid operand for instruction 93640527f7SAndre Vieira 94640527f7SAndre Vieira// CHECK-V8M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 95640527f7SAndre Vieira// CHECK-V8M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 96640527f7SAndre Vieira// CHECK-V8M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa] 97640527f7SAndre Vieira// CHECK-V8M: vmrs r10, fpscr @ encoding: [0xf1,0xee,0x10,0xaa] 98640527f7SAndre Vieira// CHECK-V8M: vmrs r2, fpsid @ encoding: [0xf0,0xee,0x10,0x2a] 99640527f7SAndre Vieira// CHECK-V8M: vmrs r3, fpsid @ encoding: [0xf0,0xee,0x10,0x3a] 100640527f7SAndre Vieira// CHECK-V8M: vmrs r4, mvfr0 @ encoding: [0xf7,0xee,0x10,0x4a] 101640527f7SAndre Vieira// CHECK-V8M: vmrs r5, mvfr1 @ encoding: [0xf6,0xee,0x10,0x5a] 102640527f7SAndre Vieira// CHECK-V8M: vmrs r6, mvfr2 @ encoding: [0xf5,0xee,0x10,0x6a] 103640527f7SAndre Vieira// ERROR-V8M: invalid operand for instruction 104640527f7SAndre Vieira// ERROR-V8M: invalid operand for instruction 105640527f7SAndre Vieira 106*7eb95d67SSjoerd Meijer// ERROR-NOVFP: instruction requires: fp registers 107*7eb95d67SSjoerd Meijer// ERROR-NOVFP: instruction requires: fp registers 108*7eb95d67SSjoerd Meijer// ERROR-NOVFP: instruction requires: fp registers 109*7eb95d67SSjoerd Meijer// ERROR-NOVFP: instruction requires: fp registers 110640527f7SAndre Vieira// ERROR-NOVFP: instruction requires: VFP2 111640527f7SAndre Vieira// ERROR-NOVFP: instruction requires: VFP2 112640527f7SAndre Vieira// ERROR-NOVFP: instruction requires: VFP2 113640527f7SAndre Vieira// ERROR-NOVFP: instruction requires: VFP2 114640527f7SAndre Vieira// ERROR-NOVFP: instruction requires: FPARMv8 115e093bad4SOliver Stannard// ERROR-NOVFP: invalid instruction 116e093bad4SOliver Stannard// ERROR-NOVFP: invalid instruction 117640527f7SAndre Vieira 118640527f7SAndre Vieira vmsr fpscr, APSR_nzcv 119640527f7SAndre Vieira vmsr fpscr, r0 120640527f7SAndre Vieira vmsr fpexc, r1 121640527f7SAndre Vieira vmsr fpsid, r2 122640527f7SAndre Vieira vmsr fpscr, r10 123640527f7SAndre Vieira vmsr fpscr, sp 124640527f7SAndre Vieira vmsr fpscr, pc 125640527f7SAndre Vieira 126bbad419eSOliver Stannard// ERROR-V7A-ARM: operand must be a register in range [r0, r14] 127640527f7SAndre Vieira// CHECK-V7A-ARM: vmsr fpscr, r0 @ encoding: [0x10,0x0a,0xe1,0xee] 128640527f7SAndre Vieira// CHECK-V7A-ARM: vmsr fpexc, r1 @ encoding: [0x10,0x1a,0xe8,0xee] 129640527f7SAndre Vieira// CHECK-V7A-ARM: vmsr fpsid, r2 @ encoding: [0x10,0x2a,0xe0,0xee] 130640527f7SAndre Vieira// CHECK-V7A-ARM: vmsr fpscr, r10 @ encoding: [0x10,0xaa,0xe1,0xee] 131640527f7SAndre Vieira// CHECK-V7A-ARM: vmsr fpscr, sp @ encoding: [0x10,0xda,0xe1,0xee] 132bbad419eSOliver Stannard// ERROR-V7A-ARM: operand must be a register in range [r0, r14] 133640527f7SAndre Vieira 134bbad419eSOliver Stannard// ERROR-V7A-THUMB: operand must be a register in range [r0, r14] 135640527f7SAndre Vieira// CHECK-V7A-THUMB: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] 136640527f7SAndre Vieira// CHECK-V7A-THUMB: vmsr fpexc, r1 @ encoding: [0xe8,0xee,0x10,0x1a] 137640527f7SAndre Vieira// CHECK-V7A-THUMB: vmsr fpsid, r2 @ encoding: [0xe0,0xee,0x10,0x2a] 138640527f7SAndre Vieira// CHECK-V7A-THUMB: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa] 139640527f7SAndre Vieira// ERROR-V7A-THUMB: invalid operand for instruction 140bbad419eSOliver Stannard// ERROR-V7A-THUMB: operand must be a register in range [r0, r14] 141640527f7SAndre Vieira 142bbad419eSOliver Stannard// ERROR-V7M: operand must be a register in range [r0, r14] 143640527f7SAndre Vieira// CHECK-V7M: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] 144640527f7SAndre Vieira// CHECK-V7M: vmsr fpexc, r1 @ encoding: [0xe8,0xee,0x10,0x1a] 145640527f7SAndre Vieira// CHECK-V7M: vmsr fpsid, r2 @ encoding: [0xe0,0xee,0x10,0x2a] 146640527f7SAndre Vieira// CHECK-V7M: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa] 147640527f7SAndre Vieira// ERROR-V7M: invalid operand for instruction 148bbad419eSOliver Stannard// ERROR-V7M: operand must be a register in range [r0, r14] 149640527f7SAndre Vieira 150bbad419eSOliver Stannard// ERROR-V8A-ARM: operand must be a register in range [r0, r14] 151640527f7SAndre Vieira// CHECK-V8A-ARM: vmsr fpscr, r0 @ encoding: [0x10,0x0a,0xe1,0xee] 152640527f7SAndre Vieira// CHECK-V8A-ARM: vmsr fpexc, r1 @ encoding: [0x10,0x1a,0xe8,0xee] 153640527f7SAndre Vieira// CHECK-V8A-ARM: vmsr fpsid, r2 @ encoding: [0x10,0x2a,0xe0,0xee] 154640527f7SAndre Vieira// CHECK-V8A-ARM: vmsr fpscr, r10 @ encoding: [0x10,0xaa,0xe1,0xee] 155640527f7SAndre Vieira// CHECK-V8A-ARM: vmsr fpscr, sp @ encoding: [0x10,0xda,0xe1,0xee] 156bbad419eSOliver Stannard// ERROR-V8A-ARM: operand must be a register in range [r0, r14] 157640527f7SAndre Vieira 158bbad419eSOliver Stannard// ERROR-V8A-THUMB: operand must be a register in range [r0, r14] 159640527f7SAndre Vieira// CHECK-V8A-THUMB: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] 160640527f7SAndre Vieira// CHECK-V8A-THUMB: vmsr fpexc, r1 @ encoding: [0xe8,0xee,0x10,0x1a] 161640527f7SAndre Vieira// CHECK-V8A-THUMB: vmsr fpsid, r2 @ encoding: [0xe0,0xee,0x10,0x2a] 162640527f7SAndre Vieira// CHECK-V8A-THUMB: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa] 163640527f7SAndre Vieira// CHECK-V8A-THUMB: vmsr fpscr, sp @ encoding: [0xe1,0xee,0x10,0xda] 164bbad419eSOliver Stannard// ERROR-V8A-THUMB: operand must be a register in range [r0, r14] 165640527f7SAndre Vieira 166bbad419eSOliver Stannard// ERROR-V8M: operand must be a register in range [r0, r14] 167640527f7SAndre Vieira// CHECK-V8M: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] 168640527f7SAndre Vieira// CHECK-V8M: vmsr fpexc, r1 @ encoding: [0xe8,0xee,0x10,0x1a] 169640527f7SAndre Vieira// CHECK-V8M: vmsr fpsid, r2 @ encoding: [0xe0,0xee,0x10,0x2a] 170640527f7SAndre Vieira// CHECK-V8M: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa] 171640527f7SAndre Vieira// ERROR-V8M: invalid operand for instruction 172bbad419eSOliver Stannard// ERROR-V8M: operand must be a register in range [r0, r14] 173640527f7SAndre Vieira 174e093bad4SOliver Stannard// ERROR-NOVFP: invalid instruction 175*7eb95d67SSjoerd Meijer// ERROR-NOVFP: instruction requires: fp registers 176640527f7SAndre Vieira// ERROR-NOVFP: instruction requires: VFP2 177640527f7SAndre Vieira// ERROR-NOVFP: instruction requires: VFP2 178*7eb95d67SSjoerd Meijer// ERROR-NOVFP: instruction requires: fp registers 179e093bad4SOliver Stannard// ERROR-NOVFP: invalid instruction 180e093bad4SOliver Stannard// ERROR-NOVFP: invalid instruction 181