1f95b2f1aSAlan Phipps; Check that MC/DC intrinsics are properly lowered 20ee2af5fSNAKAMURA Takumi; RUN: opt < %s -passes=instrprof -S | FileCheck %s --check-prefixes=CHECK,BASIC 3b347a720SNAKAMURA Takumi; RUN: opt < %s -passes=instrprof -S -instrprof-atomic-counter-update-all | FileCheck %s --check-prefixes=CHECK,ATOMIC 4d2f77eb8SNAKAMURA Takumi; RUN: opt < %s -passes=instrprof -S -runtime-counter-relocation | FileCheck %s --check-prefixes=CHECK,RELOC 5f95b2f1aSAlan Phipps 6f95b2f1aSAlan Phippstarget triple = "x86_64-unknown-linux-gnu" 7f95b2f1aSAlan Phipps 8f95b2f1aSAlan Phipps@__profn_test = private constant [4 x i8] c"test" 9f95b2f1aSAlan Phipps 100ee2af5fSNAKAMURA Takumi; BASIC: [[PROFBM_ADDR:@__profbm_test]] = private global [1 x i8] zeroinitializer, section "__llvm_prf_bits", comdat, align 1 11b347a720SNAKAMURA Takumi; ATOMIC: [[PROFBM_ADDR:@__profbm_test]] = private global [1 x i8] zeroinitializer, section "__llvm_prf_bits", comdat, align 1 12f95b2f1aSAlan Phipps 13f95b2f1aSAlan Phippsdefine dso_local void @test(i32 noundef %A) { 14f95b2f1aSAlan Phippsentry: 15891d8980SNAKAMURA Takumi ; RELOC: %profbm_bias = load i64, ptr @__llvm_profile_bitmap_bias, align [[#]], !invariant.load !0 16891d8980SNAKAMURA Takumi ; RELOC: %profc_bias = load i64, ptr @__llvm_profile_counter_bias, align [[#]] 17f95b2f1aSAlan Phipps %A.addr = alloca i32, align 4 18f95b2f1aSAlan Phipps %mcdc.addr = alloca i32, align 4 19f95b2f1aSAlan Phipps call void @llvm.instrprof.cover(ptr @__profn_test, i64 99278, i32 5, i32 0) 200ee2af5fSNAKAMURA Takumi ; BASIC: store i8 0, ptr @__profc_test, align 1 21d2f77eb8SNAKAMURA Takumi ; RELOC: %[[PROFC_INTADDR:.+]] = add i64 ptrtoint (ptr @__profc_test to i64), %profc_bias 22d2f77eb8SNAKAMURA Takumi ; RELOC: %[[PROFC_ADDR:.+]] = inttoptr i64 %[[PROFC_INTADDR]] to ptr 23d2f77eb8SNAKAMURA Takumi ; RELOC: store i8 0, ptr %[[PROFC_ADDR]], align 1 24f95b2f1aSAlan Phipps 25f95b2f1aSAlan Phipps call void @llvm.instrprof.mcdc.parameters(ptr @__profn_test, i64 99278, i32 1) 26f95b2f1aSAlan Phipps store i32 0, ptr %mcdc.addr, align 4 27f95b2f1aSAlan Phipps %0 = load i32, ptr %A.addr, align 4 28f95b2f1aSAlan Phipps %tobool = icmp ne i32 %0, 0 29f95b2f1aSAlan Phipps 3085a7bba7SNAKAMURA Takumi call void @llvm.instrprof.mcdc.tvbitmap.update(ptr @__profn_test, i64 99278, i32 0, ptr %mcdc.addr) 31d2f77eb8SNAKAMURA Takumi ; RELOC: [[PROFBM_ADDR:%.+]] = getelementptr i8, ptr @__profbm_test, i64 %profbm_bias 3271f8b441SNAKAMURA Takumi ; CHECK: %[[TEMP0:mcdc.*]] = load i32, ptr %mcdc.addr, align 4 3371f8b441SNAKAMURA Takumi ; CHECK-NEXT: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 0 347b9504fcSNAKAMURA Takumi ; CHECK-NEXT: %[[LAB4:[0-9]+]] = lshr i32 %[[TEMP]], 3 350ee2af5fSNAKAMURA Takumi ; CHECK-NEXT: %[[LAB7:[0-9]+]] = getelementptr inbounds i8, ptr [[PROFBM_ADDR]], i32 %[[LAB4]] 367b9504fcSNAKAMURA Takumi ; CHECK-NEXT: %[[LAB8:[0-9]+]] = and i32 %[[TEMP]], 7 377b9504fcSNAKAMURA Takumi ; CHECK-NEXT: %[[LAB9:[0-9]+]] = trunc i32 %[[LAB8]] to i8 387b9504fcSNAKAMURA Takumi ; CHECK-NEXT: %[[LAB10:[0-9]+]] = shl i8 1, %[[LAB9]] 39*6c331e50SNAKAMURA Takumi ; CHECK-NEXT: %[[BITS:.+]] = load i8, ptr %[[LAB7]], align 1 40*6c331e50SNAKAMURA Takumi ; ATOMIC-NEXT: %[[MASKED:.+]] = and i8 %[[BITS]], %[[LAB10]] 41*6c331e50SNAKAMURA Takumi ; ATOMIC-NEXT: %[[SHOULDWRITE:.+]] = icmp ne i8 %[[MASKED]], %[[LAB10]] 42b347a720SNAKAMURA Takumi ; ATOMIC-NEXT: br i1 %[[SHOULDWRITE]], label %[[WRITE:.+]], label %[[SKIP:.+]], !prof ![[MDPROF:[0-9]+]] 43b347a720SNAKAMURA Takumi ; ATOMIC: [[WRITE]]: 44*6c331e50SNAKAMURA Takumi ; BASIC-NEXT: %[[LAB11:[0-9]+]] = or i8 %[[BITS]], %[[LAB10]] 45*6c331e50SNAKAMURA Takumi ; RELOC-NEXT: %[[LAB11:[0-9]+]] = or i8 %[[BITS]], %[[LAB10]] 46*6c331e50SNAKAMURA Takumi ; BASIC-NEXT: store i8 %[[LAB11]], ptr %[[LAB7]], align 1 47*6c331e50SNAKAMURA Takumi ; RELOC-NEXT: store i8 %[[LAB11]], ptr %[[LAB7]], align 1 48*6c331e50SNAKAMURA Takumi ; ATOMIC-NEXT: %{{.+}} = atomicrmw or ptr %[[LAB7]], i8 %[[LAB10]] monotonic, align 1 49b347a720SNAKAMURA Takumi ; ATOMIC: [[SKIP]]: 50*6c331e50SNAKAMURA Takumi ret void 51a0e1b4a2SNAKAMURA Takumi ; CHECK-NEXT: ret void 52*6c331e50SNAKAMURA Takumi} 53a0e1b4a2SNAKAMURA Takumi 54b347a720SNAKAMURA Takumi; ATOMIC: ![[MDPROF]] = !{!"branch_weights", i32 1, i32 1048575} 55b347a720SNAKAMURA Takumi 56f95b2f1aSAlan Phippsdeclare void @llvm.instrprof.cover(ptr, i64, i32, i32) 57f95b2f1aSAlan Phipps 58f95b2f1aSAlan Phippsdeclare void @llvm.instrprof.mcdc.parameters(ptr, i64, i32) 59f95b2f1aSAlan Phipps 6085a7bba7SNAKAMURA Takumideclare void @llvm.instrprof.mcdc.tvbitmap.update(ptr, i64, i32, ptr) 61