1*f2b253b9SEmma Pilkington; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2*f2b253b9SEmma Pilkington; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefix=GCN %s 3*f2b253b9SEmma Pilkington 4*f2b253b9SEmma Pilkington; Verify that the debug locations in this function are correct, in particular 5*f2b253b9SEmma Pilkington; that the location for %cast doesn't appear in the block of %lab. 6*f2b253b9SEmma Pilkington 7*f2b253b9SEmma Pilkingtondefine void @_Z12lane_pc_testj() #0 !dbg !9 { 8*f2b253b9SEmma Pilkington; GCN-LABEL: _Z12lane_pc_testj: 9*f2b253b9SEmma Pilkington; GCN: .Lfunc_begin0: 10*f2b253b9SEmma Pilkington; GCN-NEXT: .file 0 "/" "t.cpp" 11*f2b253b9SEmma Pilkington; GCN-NEXT: .loc 0 3 0 ; t.cpp:3:0 12*f2b253b9SEmma Pilkington; GCN-NEXT: .cfi_sections .debug_frame 13*f2b253b9SEmma Pilkington; GCN-NEXT: .cfi_startproc 14*f2b253b9SEmma Pilkington; GCN-NEXT: ; %bb.0: 15*f2b253b9SEmma Pilkington; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 16*f2b253b9SEmma Pilkington; GCN-NEXT: ; %bb.1: ; %lab 17*f2b253b9SEmma Pilkington; GCN-NEXT: .Ltmp0: 18*f2b253b9SEmma Pilkington; GCN-NEXT: .loc 0 12 1 prologue_end ; t.cpp:12:1 19*f2b253b9SEmma Pilkington; GCN-NEXT: s_mov_b64 s[4:5], src_private_base 20*f2b253b9SEmma Pilkington; GCN-NEXT: s_mov_b32 s6, 32 21*f2b253b9SEmma Pilkington; GCN-NEXT: s_lshr_b64 s[4:5], s[4:5], s6 22*f2b253b9SEmma Pilkington; GCN-NEXT: s_mov_b64 s[6:7], 0 23*f2b253b9SEmma Pilkington; GCN-NEXT: s_mov_b32 s5, -1 24*f2b253b9SEmma Pilkington; GCN-NEXT: s_lshr_b32 s8, s32, 5 25*f2b253b9SEmma Pilkington; GCN-NEXT: s_cmp_lg_u32 s8, s5 26*f2b253b9SEmma Pilkington; GCN-NEXT: s_cselect_b32 s5, s4, s7 27*f2b253b9SEmma Pilkington; GCN-NEXT: s_cselect_b32 s4, s8, s6 28*f2b253b9SEmma Pilkington; GCN-NEXT: v_mov_b32_e32 v2, 0 29*f2b253b9SEmma Pilkington; GCN-NEXT: .loc 0 13 1 ; t.cpp:13:1 30*f2b253b9SEmma Pilkington; GCN-NEXT: v_mov_b32_e32 v0, s4 31*f2b253b9SEmma Pilkington; GCN-NEXT: v_mov_b32_e32 v1, s5 32*f2b253b9SEmma Pilkington; GCN-NEXT: flat_store_dword v[0:1], v2 33*f2b253b9SEmma Pilkington; GCN-NEXT: v_mov_b32_e32 v2, 1 34*f2b253b9SEmma Pilkington; GCN-NEXT: .loc 0 14 1 ; t.cpp:14:1 35*f2b253b9SEmma Pilkington; GCN-NEXT: v_mov_b32_e32 v0, s4 36*f2b253b9SEmma Pilkington; GCN-NEXT: v_mov_b32_e32 v1, s5 37*f2b253b9SEmma Pilkington; GCN-NEXT: flat_store_dword v[0:1], v2 38*f2b253b9SEmma Pilkington; GCN-NEXT: s_waitcnt lgkmcnt(0) 39*f2b253b9SEmma Pilkington; GCN-NEXT: s_setpc_b64 s[30:31] 40*f2b253b9SEmma Pilkington; GCN-NEXT: .Ltmp1: 41*f2b253b9SEmma Pilkington %alloc = alloca i32, align 4, addrspace(5) 42*f2b253b9SEmma Pilkington %cast = addrspacecast ptr addrspace(5) %alloc to ptr, !dbg !12 43*f2b253b9SEmma Pilkington br label %lab 44*f2b253b9SEmma Pilkington 45*f2b253b9SEmma Pilkingtonlab: 46*f2b253b9SEmma Pilkington store i32 0, ptr %cast, align 4, !dbg !13 47*f2b253b9SEmma Pilkington store i32 1, ptr %cast, align 4, !dbg !14 48*f2b253b9SEmma Pilkington ret void 49*f2b253b9SEmma Pilkington} 50*f2b253b9SEmma Pilkington 51*f2b253b9SEmma Pilkingtonattributes #0 = { noinline optnone } 52*f2b253b9SEmma Pilkington 53*f2b253b9SEmma Pilkington!llvm.dbg.cu = !{!0} 54*f2b253b9SEmma Pilkington!llvm.module.flags = !{!2, !3, !4, !5, !6, !7, !8} 55*f2b253b9SEmma Pilkington 56*f2b253b9SEmma Pilkington!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version 20.0.0git", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None) 57*f2b253b9SEmma Pilkington!1 = !DIFile(filename: "t.cpp", directory: "/") 58*f2b253b9SEmma Pilkington!2 = !{i32 1, !"amdhsa_code_object_version", i32 500} 59*f2b253b9SEmma Pilkington!3 = !{i32 1, !"amdgpu_printf_kind", !"hostcall"} 60*f2b253b9SEmma Pilkington!4 = !{i32 7, !"Dwarf Version", i32 5} 61*f2b253b9SEmma Pilkington!5 = !{i32 2, !"Debug Info Version", i32 3} 62*f2b253b9SEmma Pilkington!6 = !{i32 1, !"wchar_size", i32 4} 63*f2b253b9SEmma Pilkington!7 = !{i32 8, !"PIC Level", i32 2} 64*f2b253b9SEmma Pilkington!8 = !{i32 7, !"frame-pointer", i32 2} 65*f2b253b9SEmma Pilkington!9 = distinct !DISubprogram(name: "lane_pc_test", linkageName: "_Z12lane_pc_testj", scope: !1, file: !1, line: 1, scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, type: !10, unit: !0) 66*f2b253b9SEmma Pilkington!10 = !DISubroutineType(types: !11) 67*f2b253b9SEmma Pilkington!11 = !{} 68*f2b253b9SEmma Pilkington!12 = !DILocation(line: 12, column: 1, scope: !9) 69*f2b253b9SEmma Pilkington!13 = !DILocation(line: 13, column: 1, scope: !9) 70*f2b253b9SEmma Pilkington!14 = !DILocation(line: 14, column: 1, scope: !9) 71