1*ddd7d35cSQi Hu; RUN: not llc -verify-machineinstrs -O0 < %s 2>&1 | FileCheck %s 2*ddd7d35cSQi Hu; RUN: not --crash llc -verify-machineinstrs -O2 < %s 2>&1 | FileCheck %s --check-prefix=CHECK-O2 3*ddd7d35cSQi Hu; CHECK: error: inline assembly requires more registers than available 4*ddd7d35cSQi Hu; CHECK: .size main, .Lfunc_end0-main 5*ddd7d35cSQi Hu; CHECK-O2: error: inline assembly requires more registers than available 6*ddd7d35cSQi Hu 7*ddd7d35cSQi Hutarget datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 8*ddd7d35cSQi Hutarget triple = "x86_64-unknown-linux-gnu" 9*ddd7d35cSQi Hu 10*ddd7d35cSQi Hu; Function Attrs: noinline nounwind optnone uwtable 11*ddd7d35cSQi Hudefine dso_local i32 @main() #0 { 12*ddd7d35cSQi Huentry: 13*ddd7d35cSQi Hu %r0 = alloca i32, align 4 14*ddd7d35cSQi Hu %r1 = alloca i32, align 4 15*ddd7d35cSQi Hu %r2 = alloca i32, align 4 16*ddd7d35cSQi Hu %r3 = alloca i32, align 4 17*ddd7d35cSQi Hu %r4 = alloca i32, align 4 18*ddd7d35cSQi Hu %r5 = alloca i32, align 4 19*ddd7d35cSQi Hu %r6 = alloca i32, align 4 20*ddd7d35cSQi Hu %r7 = alloca i32, align 4 21*ddd7d35cSQi Hu %r8 = alloca i32, align 4 22*ddd7d35cSQi Hu %r9 = alloca i32, align 4 23*ddd7d35cSQi Hu %r10 = alloca i32, align 4 24*ddd7d35cSQi Hu %r11 = alloca i32, align 4 25*ddd7d35cSQi Hu %r12 = alloca i32, align 4 26*ddd7d35cSQi Hu %r13 = alloca i32, align 4 27*ddd7d35cSQi Hu %r14 = alloca i32, align 4 28*ddd7d35cSQi Hu %0 = call { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } asm "movl $$0, $0;movl $$1, $1;movl $$2, $2;movl $$3, $3;movl $$4, $4;movl $$5, $5;movl $$6, $6;movl $$7, $7;movl $$8, $8;movl $$9, $9;movl $$10, $10;movl $$11, $11;movl $$12, $12;movl $$13, $13;movl $$14, $14;", "=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,~{dirflag},~{fpsr},~{flags}"() #1 29*ddd7d35cSQi Hu %asmresult = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 0 30*ddd7d35cSQi Hu %asmresult1 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 1 31*ddd7d35cSQi Hu %asmresult2 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 2 32*ddd7d35cSQi Hu %asmresult3 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 3 33*ddd7d35cSQi Hu %asmresult4 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 4 34*ddd7d35cSQi Hu %asmresult5 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 5 35*ddd7d35cSQi Hu %asmresult6 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 6 36*ddd7d35cSQi Hu %asmresult7 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 7 37*ddd7d35cSQi Hu %asmresult8 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 8 38*ddd7d35cSQi Hu %asmresult9 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 9 39*ddd7d35cSQi Hu %asmresult10 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 10 40*ddd7d35cSQi Hu %asmresult11 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 11 41*ddd7d35cSQi Hu %asmresult12 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 12 42*ddd7d35cSQi Hu %asmresult13 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 13 43*ddd7d35cSQi Hu %asmresult14 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %0, 14 44*ddd7d35cSQi Hu store i32 %asmresult, ptr %r0, align 4 45*ddd7d35cSQi Hu store i32 %asmresult1, ptr %r1, align 4 46*ddd7d35cSQi Hu store i32 %asmresult2, ptr %r2, align 4 47*ddd7d35cSQi Hu store i32 %asmresult3, ptr %r3, align 4 48*ddd7d35cSQi Hu store i32 %asmresult4, ptr %r4, align 4 49*ddd7d35cSQi Hu store i32 %asmresult5, ptr %r5, align 4 50*ddd7d35cSQi Hu store i32 %asmresult6, ptr %r6, align 4 51*ddd7d35cSQi Hu store i32 %asmresult7, ptr %r7, align 4 52*ddd7d35cSQi Hu store i32 %asmresult8, ptr %r8, align 4 53*ddd7d35cSQi Hu store i32 %asmresult9, ptr %r9, align 4 54*ddd7d35cSQi Hu store i32 %asmresult10, ptr %r10, align 4 55*ddd7d35cSQi Hu store i32 %asmresult11, ptr %r11, align 4 56*ddd7d35cSQi Hu store i32 %asmresult12, ptr %r12, align 4 57*ddd7d35cSQi Hu store i32 %asmresult13, ptr %r13, align 4 58*ddd7d35cSQi Hu store i32 %asmresult14, ptr %r14, align 4 59*ddd7d35cSQi Hu ret i32 0 60*ddd7d35cSQi Hu} 61*ddd7d35cSQi Hu 62*ddd7d35cSQi Huattributes #0 = { "frame-pointer"="all" } 63