1*b72ca799SKazushi (Jam) Marukawa; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s 2*b72ca799SKazushi (Jam) Marukawa 3*b72ca799SKazushi (Jam) Marukawa;;; Test insert intrinsic instructions 4*b72ca799SKazushi (Jam) Marukawa;;; 5*b72ca799SKazushi (Jam) Marukawa;;; Note: 6*b72ca799SKazushi (Jam) Marukawa;;; We test insert_vm512u and insert_vm512l pseudo instructions. 7*b72ca799SKazushi (Jam) Marukawa 8*b72ca799SKazushi (Jam) Marukawa; Function Attrs: nounwind readnone 9*b72ca799SKazushi (Jam) Marukawadefine fastcc <512 x i1> @insert_vm512u(<512 x i1> %0, <256 x i1> %1) { 10*b72ca799SKazushi (Jam) Marukawa; CHECK-LABEL: insert_vm512u: 11*b72ca799SKazushi (Jam) Marukawa; CHECK: # %bb.0: 12*b72ca799SKazushi (Jam) Marukawa; CHECK-NEXT: andm %vm2, %vm0, %vm4 13*b72ca799SKazushi (Jam) Marukawa; CHECK-NEXT: b.l.t (, %s10) 14*b72ca799SKazushi (Jam) Marukawa %3 = tail call <512 x i1> @llvm.ve.vl.insert.vm512u(<512 x i1> %0, <256 x i1> %1) 15*b72ca799SKazushi (Jam) Marukawa ret <512 x i1> %3 16*b72ca799SKazushi (Jam) Marukawa} 17*b72ca799SKazushi (Jam) Marukawa 18*b72ca799SKazushi (Jam) Marukawa; Function Attrs: nounwind readnone 19*b72ca799SKazushi (Jam) Marukawadeclare <512 x i1> @llvm.ve.vl.insert.vm512u(<512 x i1>, <256 x i1>) 20*b72ca799SKazushi (Jam) Marukawa 21*b72ca799SKazushi (Jam) Marukawa; Function Attrs: nounwind readnone 22*b72ca799SKazushi (Jam) Marukawadefine fastcc <512 x i1> @insert_vm512l(<512 x i1> %0, <256 x i1> %1) { 23*b72ca799SKazushi (Jam) Marukawa; CHECK-LABEL: insert_vm512l: 24*b72ca799SKazushi (Jam) Marukawa; CHECK: # %bb.0: 25*b72ca799SKazushi (Jam) Marukawa; CHECK-NEXT: andm %vm3, %vm0, %vm4 26*b72ca799SKazushi (Jam) Marukawa; CHECK-NEXT: b.l.t (, %s10) 27*b72ca799SKazushi (Jam) Marukawa %3 = tail call <512 x i1> @llvm.ve.vl.insert.vm512l(<512 x i1> %0, <256 x i1> %1) 28*b72ca799SKazushi (Jam) Marukawa ret <512 x i1> %3 29*b72ca799SKazushi (Jam) Marukawa} 30*b72ca799SKazushi (Jam) Marukawa 31*b72ca799SKazushi (Jam) Marukawa; Function Attrs: nounwind readnone 32*b72ca799SKazushi (Jam) Marukawadeclare <512 x i1> @llvm.ve.vl.insert.vm512l(<512 x i1>, <256 x i1>) 33