1*a65ccc1bSUlrich Weigand; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2*a65ccc1bSUlrich Weigand; Test 256-bit addition on z13 and higher 3*a65ccc1bSUlrich Weigand; 4*a65ccc1bSUlrich Weigand; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 5*a65ccc1bSUlrich Weigand 6*a65ccc1bSUlrich Weiganddefine zeroext i1 @f1(i256 %a, i256 %b, ptr %res) { 7*a65ccc1bSUlrich Weigand; CHECK-LABEL: f1: 8*a65ccc1bSUlrich Weigand; CHECK: # %bb.0: 9*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v2, 16(%r3), 3 10*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v3, 16(%r2), 3 11*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v0, 0(%r3), 3 12*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v1, 0(%r2), 3 13*a65ccc1bSUlrich Weigand; CHECK-NEXT: vaccq %v4, %v3, %v2 14*a65ccc1bSUlrich Weigand; CHECK-NEXT: vacccq %v5, %v1, %v0, %v4 15*a65ccc1bSUlrich Weigand; CHECK-NEXT: vlgvg %r2, %v5, 1 16*a65ccc1bSUlrich Weigand; CHECK-NEXT: vacq %v0, %v1, %v0, %v4 17*a65ccc1bSUlrich Weigand; CHECK-NEXT: vaq %v1, %v3, %v2 18*a65ccc1bSUlrich Weigand; CHECK-NEXT: vst %v1, 16(%r4), 3 19*a65ccc1bSUlrich Weigand; CHECK-NEXT: vst %v0, 0(%r4), 3 20*a65ccc1bSUlrich Weigand; CHECK-NEXT: br %r14 21*a65ccc1bSUlrich Weigand %t = call {i256, i1} @llvm.uadd.with.overflow.i256(i256 %a, i256 %b) 22*a65ccc1bSUlrich Weigand %val = extractvalue {i256, i1} %t, 0 23*a65ccc1bSUlrich Weigand %obit = extractvalue {i256, i1} %t, 1 24*a65ccc1bSUlrich Weigand store i256 %val, ptr %res 25*a65ccc1bSUlrich Weigand ret i1 %obit 26*a65ccc1bSUlrich Weigand} 27*a65ccc1bSUlrich Weigand 28*a65ccc1bSUlrich Weiganddefine zeroext i1 @f2(i256 %a, i256 %b) { 29*a65ccc1bSUlrich Weigand; CHECK-LABEL: f2: 30*a65ccc1bSUlrich Weigand; CHECK: # %bb.0: 31*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v2, 16(%r3), 3 32*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v3, 16(%r2), 3 33*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v0, 0(%r3), 3 34*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v1, 0(%r2), 3 35*a65ccc1bSUlrich Weigand; CHECK-NEXT: vaccq %v2, %v3, %v2 36*a65ccc1bSUlrich Weigand; CHECK-NEXT: vacccq %v0, %v1, %v0, %v2 37*a65ccc1bSUlrich Weigand; CHECK-NEXT: vlgvg %r2, %v0, 1 38*a65ccc1bSUlrich Weigand; CHECK-NEXT: br %r14 39*a65ccc1bSUlrich Weigand %t = call {i256, i1} @llvm.uadd.with.overflow.i256(i256 %a, i256 %b) 40*a65ccc1bSUlrich Weigand %obit = extractvalue {i256, i1} %t, 1 41*a65ccc1bSUlrich Weigand ret i1 %obit 42*a65ccc1bSUlrich Weigand} 43*a65ccc1bSUlrich Weigand 44*a65ccc1bSUlrich Weiganddefine i256 @f3(i256 %a, i256 %b) { 45*a65ccc1bSUlrich Weigand; CHECK-LABEL: f3: 46*a65ccc1bSUlrich Weigand; CHECK: # %bb.0: 47*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v2, 16(%r4), 3 48*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v3, 16(%r3), 3 49*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v0, 0(%r4), 3 50*a65ccc1bSUlrich Weigand; CHECK-NEXT: vl %v1, 0(%r3), 3 51*a65ccc1bSUlrich Weigand; CHECK-NEXT: vaccq %v4, %v3, %v2 52*a65ccc1bSUlrich Weigand; CHECK-NEXT: vacq %v0, %v1, %v0, %v4 53*a65ccc1bSUlrich Weigand; CHECK-NEXT: vaq %v1, %v3, %v2 54*a65ccc1bSUlrich Weigand; CHECK-NEXT: vst %v1, 16(%r2), 3 55*a65ccc1bSUlrich Weigand; CHECK-NEXT: vst %v0, 0(%r2), 3 56*a65ccc1bSUlrich Weigand; CHECK-NEXT: br %r14 57*a65ccc1bSUlrich Weigand %t = call {i256, i1} @llvm.uadd.with.overflow.i256(i256 %a, i256 %b) 58*a65ccc1bSUlrich Weigand %val = extractvalue {i256, i1} %t, 0 59*a65ccc1bSUlrich Weigand ret i256 %val 60*a65ccc1bSUlrich Weigand} 61*a65ccc1bSUlrich Weigand 62*a65ccc1bSUlrich Weiganddeclare {i256, i1} @llvm.uadd.with.overflow.i256(i256, i256) nounwind readnone 63*a65ccc1bSUlrich Weigand 64