19e3577ffSUlrich Weigand; Test 64-bit addition in which the second operand is constant. 29e3577ffSUlrich Weigand; 39e3577ffSUlrich Weigand; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 49e3577ffSUlrich Weigand 59e3577ffSUlrich Weigand; Check additions of 1. 69e3577ffSUlrich Weiganddefine i64 @f1(i64 %a) { 7*d24ab20eSStephen Lin; CHECK-LABEL: f1: 89e3577ffSUlrich Weigand; CHECK: {{aghi %r2, 1|la %r[0-5], 1\(%r2\)}} 99e3577ffSUlrich Weigand; CHECK: br %r14 109e3577ffSUlrich Weigand %add = add i64 %a, 1 119e3577ffSUlrich Weigand ret i64 %add 129e3577ffSUlrich Weigand} 139e3577ffSUlrich Weigand 149e3577ffSUlrich Weigand; Check the high end of the AGHI range. 159e3577ffSUlrich Weiganddefine i64 @f2(i64 %a) { 16*d24ab20eSStephen Lin; CHECK-LABEL: f2: 179e3577ffSUlrich Weigand; CHECK: aghi %r2, 32767 189e3577ffSUlrich Weigand; CHECK: br %r14 199e3577ffSUlrich Weigand %add = add i64 %a, 32767 209e3577ffSUlrich Weigand ret i64 %add 219e3577ffSUlrich Weigand} 229e3577ffSUlrich Weigand 239e3577ffSUlrich Weigand; Check the next value up, which must use AGFI instead. 249e3577ffSUlrich Weiganddefine i64 @f3(i64 %a) { 25*d24ab20eSStephen Lin; CHECK-LABEL: f3: 269e3577ffSUlrich Weigand; CHECK: {{agfi %r2, 32768|lay %r[0-5], 32768\(%r2\)}} 279e3577ffSUlrich Weigand; CHECK: br %r14 289e3577ffSUlrich Weigand %add = add i64 %a, 32768 299e3577ffSUlrich Weigand ret i64 %add 309e3577ffSUlrich Weigand} 319e3577ffSUlrich Weigand 329e3577ffSUlrich Weigand; Check the high end of the AGFI range. 339e3577ffSUlrich Weiganddefine i64 @f4(i64 %a) { 34*d24ab20eSStephen Lin; CHECK-LABEL: f4: 359e3577ffSUlrich Weigand; CHECK: agfi %r2, 2147483647 369e3577ffSUlrich Weigand; CHECK: br %r14 379e3577ffSUlrich Weigand %add = add i64 %a, 2147483647 389e3577ffSUlrich Weigand ret i64 %add 399e3577ffSUlrich Weigand} 409e3577ffSUlrich Weigand 419e3577ffSUlrich Weigand; Check the next value up, which must use ALGFI instead. 429e3577ffSUlrich Weiganddefine i64 @f5(i64 %a) { 43*d24ab20eSStephen Lin; CHECK-LABEL: f5: 449e3577ffSUlrich Weigand; CHECK: algfi %r2, 2147483648 459e3577ffSUlrich Weigand; CHECK: br %r14 469e3577ffSUlrich Weigand %add = add i64 %a, 2147483648 479e3577ffSUlrich Weigand ret i64 %add 489e3577ffSUlrich Weigand} 499e3577ffSUlrich Weigand 509e3577ffSUlrich Weigand; Check the high end of the ALGFI range. 519e3577ffSUlrich Weiganddefine i64 @f6(i64 %a) { 52*d24ab20eSStephen Lin; CHECK-LABEL: f6: 539e3577ffSUlrich Weigand; CHECK: algfi %r2, 4294967295 549e3577ffSUlrich Weigand; CHECK: br %r14 559e3577ffSUlrich Weigand %add = add i64 %a, 4294967295 569e3577ffSUlrich Weigand ret i64 %add 579e3577ffSUlrich Weigand} 589e3577ffSUlrich Weigand 599e3577ffSUlrich Weigand; Check the next value up, which must be loaded into a register first. 609e3577ffSUlrich Weiganddefine i64 @f7(i64 %a) { 61*d24ab20eSStephen Lin; CHECK-LABEL: f7: 629e3577ffSUlrich Weigand; CHECK: llihl %r0, 1 639e3577ffSUlrich Weigand; CHECK: agr 649e3577ffSUlrich Weigand; CHECK: br %r14 659e3577ffSUlrich Weigand %add = add i64 %a, 4294967296 669e3577ffSUlrich Weigand ret i64 %add 679e3577ffSUlrich Weigand} 689e3577ffSUlrich Weigand 699e3577ffSUlrich Weigand; Check the high end of the negative AGHI range. 709e3577ffSUlrich Weiganddefine i64 @f8(i64 %a) { 71*d24ab20eSStephen Lin; CHECK-LABEL: f8: 729e3577ffSUlrich Weigand; CHECK: aghi %r2, -1 739e3577ffSUlrich Weigand; CHECK: br %r14 749e3577ffSUlrich Weigand %add = add i64 %a, -1 759e3577ffSUlrich Weigand ret i64 %add 769e3577ffSUlrich Weigand} 779e3577ffSUlrich Weigand 789e3577ffSUlrich Weigand; Check the low end of the AGHI range. 799e3577ffSUlrich Weiganddefine i64 @f9(i64 %a) { 80*d24ab20eSStephen Lin; CHECK-LABEL: f9: 819e3577ffSUlrich Weigand; CHECK: aghi %r2, -32768 829e3577ffSUlrich Weigand; CHECK: br %r14 839e3577ffSUlrich Weigand %add = add i64 %a, -32768 849e3577ffSUlrich Weigand ret i64 %add 859e3577ffSUlrich Weigand} 869e3577ffSUlrich Weigand 879e3577ffSUlrich Weigand; Check the next value down, which must use AGFI instead. 889e3577ffSUlrich Weiganddefine i64 @f10(i64 %a) { 89*d24ab20eSStephen Lin; CHECK-LABEL: f10: 909e3577ffSUlrich Weigand; CHECK: {{agfi %r2, -32769|lay %r[0-5]+, -32769\(%r2\)}} 919e3577ffSUlrich Weigand; CHECK: br %r14 929e3577ffSUlrich Weigand %add = add i64 %a, -32769 939e3577ffSUlrich Weigand ret i64 %add 949e3577ffSUlrich Weigand} 959e3577ffSUlrich Weigand 969e3577ffSUlrich Weigand; Check the low end of the AGFI range. 979e3577ffSUlrich Weiganddefine i64 @f11(i64 %a) { 98*d24ab20eSStephen Lin; CHECK-LABEL: f11: 999e3577ffSUlrich Weigand; CHECK: agfi %r2, -2147483648 1009e3577ffSUlrich Weigand; CHECK: br %r14 1019e3577ffSUlrich Weigand %add = add i64 %a, -2147483648 1029e3577ffSUlrich Weigand ret i64 %add 1039e3577ffSUlrich Weigand} 1049e3577ffSUlrich Weigand 1059e3577ffSUlrich Weigand; Check the next value down, which must use SLGFI instead. 1069e3577ffSUlrich Weiganddefine i64 @f12(i64 %a) { 107*d24ab20eSStephen Lin; CHECK-LABEL: f12: 1089e3577ffSUlrich Weigand; CHECK: slgfi %r2, 2147483649 1099e3577ffSUlrich Weigand; CHECK: br %r14 1109e3577ffSUlrich Weigand %add = add i64 %a, -2147483649 1119e3577ffSUlrich Weigand ret i64 %add 1129e3577ffSUlrich Weigand} 1139e3577ffSUlrich Weigand 1149e3577ffSUlrich Weigand; Check the low end of the SLGFI range. 1159e3577ffSUlrich Weiganddefine i64 @f13(i64 %a) { 116*d24ab20eSStephen Lin; CHECK-LABEL: f13: 1179e3577ffSUlrich Weigand; CHECK: slgfi %r2, 4294967295 1189e3577ffSUlrich Weigand; CHECK: br %r14 1199e3577ffSUlrich Weigand %add = add i64 %a, -4294967295 1209e3577ffSUlrich Weigand ret i64 %add 1219e3577ffSUlrich Weigand} 1229e3577ffSUlrich Weigand 1239e3577ffSUlrich Weigand; Check the next value down, which must use register addition instead. 1249e3577ffSUlrich Weiganddefine i64 @f14(i64 %a) { 125*d24ab20eSStephen Lin; CHECK-LABEL: f14: 1269e3577ffSUlrich Weigand; CHECK: llihf %r0, 4294967295 1279e3577ffSUlrich Weigand; CHECK: agr 1289e3577ffSUlrich Weigand; CHECK: br %r14 1299e3577ffSUlrich Weigand %add = add i64 %a, -4294967296 1309e3577ffSUlrich Weigand ret i64 %add 1319e3577ffSUlrich Weigand} 132