xref: /llvm-project/llvm/test/CodeGen/RISCV/stack-realignment.ll (revision eabaee0c59110d0e11b33a69db54ccda526b35fd) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s -check-prefix=RV32I
4; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s -check-prefix=RV64I
6
7declare void @callee(ptr)
8
9define void @caller32() {
10; RV32I-LABEL: caller32:
11; RV32I:       # %bb.0:
12; RV32I-NEXT:    addi sp, sp, -32
13; RV32I-NEXT:    .cfi_def_cfa_offset 32
14; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
15; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
16; RV32I-NEXT:    .cfi_offset ra, -4
17; RV32I-NEXT:    .cfi_offset s0, -8
18; RV32I-NEXT:    addi s0, sp, 32
19; RV32I-NEXT:    .cfi_def_cfa s0, 0
20; RV32I-NEXT:    andi sp, sp, -32
21; RV32I-NEXT:    mv a0, sp
22; RV32I-NEXT:    call callee
23; RV32I-NEXT:    addi sp, s0, -32
24; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
25; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
26; RV32I-NEXT:    addi sp, sp, 32
27; RV32I-NEXT:    ret
28;
29; RV64I-LABEL: caller32:
30; RV64I:       # %bb.0:
31; RV64I-NEXT:    addi sp, sp, -32
32; RV64I-NEXT:    .cfi_def_cfa_offset 32
33; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
34; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
35; RV64I-NEXT:    .cfi_offset ra, -8
36; RV64I-NEXT:    .cfi_offset s0, -16
37; RV64I-NEXT:    addi s0, sp, 32
38; RV64I-NEXT:    .cfi_def_cfa s0, 0
39; RV64I-NEXT:    andi sp, sp, -32
40; RV64I-NEXT:    mv a0, sp
41; RV64I-NEXT:    call callee
42; RV64I-NEXT:    addi sp, s0, -32
43; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
44; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
45; RV64I-NEXT:    addi sp, sp, 32
46; RV64I-NEXT:    ret
47  %1 = alloca i8, align 32
48  call void @callee(ptr %1)
49  ret void
50}
51
52define void @caller_no_realign32() "no-realign-stack" {
53; RV32I-LABEL: caller_no_realign32:
54; RV32I:       # %bb.0:
55; RV32I-NEXT:    addi sp, sp, -16
56; RV32I-NEXT:    .cfi_def_cfa_offset 16
57; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
58; RV32I-NEXT:    .cfi_offset ra, -4
59; RV32I-NEXT:    mv a0, sp
60; RV32I-NEXT:    call callee
61; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
62; RV32I-NEXT:    addi sp, sp, 16
63; RV32I-NEXT:    ret
64;
65; RV64I-LABEL: caller_no_realign32:
66; RV64I:       # %bb.0:
67; RV64I-NEXT:    addi sp, sp, -16
68; RV64I-NEXT:    .cfi_def_cfa_offset 16
69; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
70; RV64I-NEXT:    .cfi_offset ra, -8
71; RV64I-NEXT:    mv a0, sp
72; RV64I-NEXT:    call callee
73; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
74; RV64I-NEXT:    addi sp, sp, 16
75; RV64I-NEXT:    ret
76  %1 = alloca i8, align 32
77  call void @callee(ptr %1)
78  ret void
79}
80
81define void @caller64() {
82; RV32I-LABEL: caller64:
83; RV32I:       # %bb.0:
84; RV32I-NEXT:    addi sp, sp, -64
85; RV32I-NEXT:    .cfi_def_cfa_offset 64
86; RV32I-NEXT:    sw ra, 60(sp) # 4-byte Folded Spill
87; RV32I-NEXT:    sw s0, 56(sp) # 4-byte Folded Spill
88; RV32I-NEXT:    .cfi_offset ra, -4
89; RV32I-NEXT:    .cfi_offset s0, -8
90; RV32I-NEXT:    addi s0, sp, 64
91; RV32I-NEXT:    .cfi_def_cfa s0, 0
92; RV32I-NEXT:    andi sp, sp, -64
93; RV32I-NEXT:    mv a0, sp
94; RV32I-NEXT:    call callee
95; RV32I-NEXT:    addi sp, s0, -64
96; RV32I-NEXT:    lw ra, 60(sp) # 4-byte Folded Reload
97; RV32I-NEXT:    lw s0, 56(sp) # 4-byte Folded Reload
98; RV32I-NEXT:    addi sp, sp, 64
99; RV32I-NEXT:    ret
100;
101; RV64I-LABEL: caller64:
102; RV64I:       # %bb.0:
103; RV64I-NEXT:    addi sp, sp, -64
104; RV64I-NEXT:    .cfi_def_cfa_offset 64
105; RV64I-NEXT:    sd ra, 56(sp) # 8-byte Folded Spill
106; RV64I-NEXT:    sd s0, 48(sp) # 8-byte Folded Spill
107; RV64I-NEXT:    .cfi_offset ra, -8
108; RV64I-NEXT:    .cfi_offset s0, -16
109; RV64I-NEXT:    addi s0, sp, 64
110; RV64I-NEXT:    .cfi_def_cfa s0, 0
111; RV64I-NEXT:    andi sp, sp, -64
112; RV64I-NEXT:    mv a0, sp
113; RV64I-NEXT:    call callee
114; RV64I-NEXT:    addi sp, s0, -64
115; RV64I-NEXT:    ld ra, 56(sp) # 8-byte Folded Reload
116; RV64I-NEXT:    ld s0, 48(sp) # 8-byte Folded Reload
117; RV64I-NEXT:    addi sp, sp, 64
118; RV64I-NEXT:    ret
119  %1 = alloca i8, align 64
120  call void @callee(ptr %1)
121  ret void
122}
123
124define void @caller_no_realign64() "no-realign-stack" {
125; RV32I-LABEL: caller_no_realign64:
126; RV32I:       # %bb.0:
127; RV32I-NEXT:    addi sp, sp, -16
128; RV32I-NEXT:    .cfi_def_cfa_offset 16
129; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
130; RV32I-NEXT:    .cfi_offset ra, -4
131; RV32I-NEXT:    mv a0, sp
132; RV32I-NEXT:    call callee
133; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
134; RV32I-NEXT:    addi sp, sp, 16
135; RV32I-NEXT:    ret
136;
137; RV64I-LABEL: caller_no_realign64:
138; RV64I:       # %bb.0:
139; RV64I-NEXT:    addi sp, sp, -16
140; RV64I-NEXT:    .cfi_def_cfa_offset 16
141; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
142; RV64I-NEXT:    .cfi_offset ra, -8
143; RV64I-NEXT:    mv a0, sp
144; RV64I-NEXT:    call callee
145; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
146; RV64I-NEXT:    addi sp, sp, 16
147; RV64I-NEXT:    ret
148  %1 = alloca i8, align 64
149  call void @callee(ptr %1)
150  ret void
151}
152
153define void @caller128() {
154; RV32I-LABEL: caller128:
155; RV32I:       # %bb.0:
156; RV32I-NEXT:    addi sp, sp, -128
157; RV32I-NEXT:    .cfi_def_cfa_offset 128
158; RV32I-NEXT:    sw ra, 124(sp) # 4-byte Folded Spill
159; RV32I-NEXT:    sw s0, 120(sp) # 4-byte Folded Spill
160; RV32I-NEXT:    .cfi_offset ra, -4
161; RV32I-NEXT:    .cfi_offset s0, -8
162; RV32I-NEXT:    addi s0, sp, 128
163; RV32I-NEXT:    .cfi_def_cfa s0, 0
164; RV32I-NEXT:    andi sp, sp, -128
165; RV32I-NEXT:    mv a0, sp
166; RV32I-NEXT:    call callee
167; RV32I-NEXT:    addi sp, s0, -128
168; RV32I-NEXT:    lw ra, 124(sp) # 4-byte Folded Reload
169; RV32I-NEXT:    lw s0, 120(sp) # 4-byte Folded Reload
170; RV32I-NEXT:    addi sp, sp, 128
171; RV32I-NEXT:    ret
172;
173; RV64I-LABEL: caller128:
174; RV64I:       # %bb.0:
175; RV64I-NEXT:    addi sp, sp, -128
176; RV64I-NEXT:    .cfi_def_cfa_offset 128
177; RV64I-NEXT:    sd ra, 120(sp) # 8-byte Folded Spill
178; RV64I-NEXT:    sd s0, 112(sp) # 8-byte Folded Spill
179; RV64I-NEXT:    .cfi_offset ra, -8
180; RV64I-NEXT:    .cfi_offset s0, -16
181; RV64I-NEXT:    addi s0, sp, 128
182; RV64I-NEXT:    .cfi_def_cfa s0, 0
183; RV64I-NEXT:    andi sp, sp, -128
184; RV64I-NEXT:    mv a0, sp
185; RV64I-NEXT:    call callee
186; RV64I-NEXT:    addi sp, s0, -128
187; RV64I-NEXT:    ld ra, 120(sp) # 8-byte Folded Reload
188; RV64I-NEXT:    ld s0, 112(sp) # 8-byte Folded Reload
189; RV64I-NEXT:    addi sp, sp, 128
190; RV64I-NEXT:    ret
191  %1 = alloca i8, align 128
192  call void @callee(ptr %1)
193  ret void
194}
195
196define void @caller_no_realign128() "no-realign-stack" {
197; RV32I-LABEL: caller_no_realign128:
198; RV32I:       # %bb.0:
199; RV32I-NEXT:    addi sp, sp, -16
200; RV32I-NEXT:    .cfi_def_cfa_offset 16
201; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
202; RV32I-NEXT:    .cfi_offset ra, -4
203; RV32I-NEXT:    mv a0, sp
204; RV32I-NEXT:    call callee
205; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
206; RV32I-NEXT:    addi sp, sp, 16
207; RV32I-NEXT:    ret
208;
209; RV64I-LABEL: caller_no_realign128:
210; RV64I:       # %bb.0:
211; RV64I-NEXT:    addi sp, sp, -16
212; RV64I-NEXT:    .cfi_def_cfa_offset 16
213; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
214; RV64I-NEXT:    .cfi_offset ra, -8
215; RV64I-NEXT:    mv a0, sp
216; RV64I-NEXT:    call callee
217; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
218; RV64I-NEXT:    addi sp, sp, 16
219; RV64I-NEXT:    ret
220  %1 = alloca i8, align 128
221  call void @callee(ptr %1)
222  ret void
223}
224
225define void @caller256() {
226; RV32I-LABEL: caller256:
227; RV32I:       # %bb.0:
228; RV32I-NEXT:    addi sp, sp, -256
229; RV32I-NEXT:    .cfi_def_cfa_offset 256
230; RV32I-NEXT:    sw ra, 252(sp) # 4-byte Folded Spill
231; RV32I-NEXT:    sw s0, 248(sp) # 4-byte Folded Spill
232; RV32I-NEXT:    .cfi_offset ra, -4
233; RV32I-NEXT:    .cfi_offset s0, -8
234; RV32I-NEXT:    addi s0, sp, 256
235; RV32I-NEXT:    .cfi_def_cfa s0, 0
236; RV32I-NEXT:    andi sp, sp, -256
237; RV32I-NEXT:    mv a0, sp
238; RV32I-NEXT:    call callee
239; RV32I-NEXT:    addi sp, s0, -256
240; RV32I-NEXT:    lw ra, 252(sp) # 4-byte Folded Reload
241; RV32I-NEXT:    lw s0, 248(sp) # 4-byte Folded Reload
242; RV32I-NEXT:    addi sp, sp, 256
243; RV32I-NEXT:    ret
244;
245; RV64I-LABEL: caller256:
246; RV64I:       # %bb.0:
247; RV64I-NEXT:    addi sp, sp, -256
248; RV64I-NEXT:    .cfi_def_cfa_offset 256
249; RV64I-NEXT:    sd ra, 248(sp) # 8-byte Folded Spill
250; RV64I-NEXT:    sd s0, 240(sp) # 8-byte Folded Spill
251; RV64I-NEXT:    .cfi_offset ra, -8
252; RV64I-NEXT:    .cfi_offset s0, -16
253; RV64I-NEXT:    addi s0, sp, 256
254; RV64I-NEXT:    .cfi_def_cfa s0, 0
255; RV64I-NEXT:    andi sp, sp, -256
256; RV64I-NEXT:    mv a0, sp
257; RV64I-NEXT:    call callee
258; RV64I-NEXT:    addi sp, s0, -256
259; RV64I-NEXT:    ld ra, 248(sp) # 8-byte Folded Reload
260; RV64I-NEXT:    ld s0, 240(sp) # 8-byte Folded Reload
261; RV64I-NEXT:    addi sp, sp, 256
262; RV64I-NEXT:    ret
263  %1 = alloca i8, align 256
264  call void @callee(ptr %1)
265  ret void
266}
267
268define void @caller_no_realign256() "no-realign-stack" {
269; RV32I-LABEL: caller_no_realign256:
270; RV32I:       # %bb.0:
271; RV32I-NEXT:    addi sp, sp, -16
272; RV32I-NEXT:    .cfi_def_cfa_offset 16
273; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
274; RV32I-NEXT:    .cfi_offset ra, -4
275; RV32I-NEXT:    mv a0, sp
276; RV32I-NEXT:    call callee
277; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
278; RV32I-NEXT:    addi sp, sp, 16
279; RV32I-NEXT:    ret
280;
281; RV64I-LABEL: caller_no_realign256:
282; RV64I:       # %bb.0:
283; RV64I-NEXT:    addi sp, sp, -16
284; RV64I-NEXT:    .cfi_def_cfa_offset 16
285; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
286; RV64I-NEXT:    .cfi_offset ra, -8
287; RV64I-NEXT:    mv a0, sp
288; RV64I-NEXT:    call callee
289; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
290; RV64I-NEXT:    addi sp, sp, 16
291; RV64I-NEXT:    ret
292  %1 = alloca i8, align 256
293  call void @callee(ptr %1)
294  ret void
295}
296
297define void @caller512() {
298; RV32I-LABEL: caller512:
299; RV32I:       # %bb.0:
300; RV32I-NEXT:    addi sp, sp, -1024
301; RV32I-NEXT:    .cfi_def_cfa_offset 1024
302; RV32I-NEXT:    sw ra, 1020(sp) # 4-byte Folded Spill
303; RV32I-NEXT:    sw s0, 1016(sp) # 4-byte Folded Spill
304; RV32I-NEXT:    .cfi_offset ra, -4
305; RV32I-NEXT:    .cfi_offset s0, -8
306; RV32I-NEXT:    addi s0, sp, 1024
307; RV32I-NEXT:    .cfi_def_cfa s0, 0
308; RV32I-NEXT:    andi sp, sp, -512
309; RV32I-NEXT:    addi a0, sp, 512
310; RV32I-NEXT:    call callee
311; RV32I-NEXT:    addi sp, s0, -1024
312; RV32I-NEXT:    lw ra, 1020(sp) # 4-byte Folded Reload
313; RV32I-NEXT:    lw s0, 1016(sp) # 4-byte Folded Reload
314; RV32I-NEXT:    addi sp, sp, 1024
315; RV32I-NEXT:    ret
316;
317; RV64I-LABEL: caller512:
318; RV64I:       # %bb.0:
319; RV64I-NEXT:    addi sp, sp, -1024
320; RV64I-NEXT:    .cfi_def_cfa_offset 1024
321; RV64I-NEXT:    sd ra, 1016(sp) # 8-byte Folded Spill
322; RV64I-NEXT:    sd s0, 1008(sp) # 8-byte Folded Spill
323; RV64I-NEXT:    .cfi_offset ra, -8
324; RV64I-NEXT:    .cfi_offset s0, -16
325; RV64I-NEXT:    addi s0, sp, 1024
326; RV64I-NEXT:    .cfi_def_cfa s0, 0
327; RV64I-NEXT:    andi sp, sp, -512
328; RV64I-NEXT:    addi a0, sp, 512
329; RV64I-NEXT:    call callee
330; RV64I-NEXT:    addi sp, s0, -1024
331; RV64I-NEXT:    ld ra, 1016(sp) # 8-byte Folded Reload
332; RV64I-NEXT:    ld s0, 1008(sp) # 8-byte Folded Reload
333; RV64I-NEXT:    addi sp, sp, 1024
334; RV64I-NEXT:    ret
335  %1 = alloca i8, align 512
336  call void @callee(ptr %1)
337  ret void
338}
339
340define void @caller_no_realign512() "no-realign-stack" {
341; RV32I-LABEL: caller_no_realign512:
342; RV32I:       # %bb.0:
343; RV32I-NEXT:    addi sp, sp, -16
344; RV32I-NEXT:    .cfi_def_cfa_offset 16
345; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
346; RV32I-NEXT:    .cfi_offset ra, -4
347; RV32I-NEXT:    mv a0, sp
348; RV32I-NEXT:    call callee
349; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
350; RV32I-NEXT:    addi sp, sp, 16
351; RV32I-NEXT:    ret
352;
353; RV64I-LABEL: caller_no_realign512:
354; RV64I:       # %bb.0:
355; RV64I-NEXT:    addi sp, sp, -16
356; RV64I-NEXT:    .cfi_def_cfa_offset 16
357; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
358; RV64I-NEXT:    .cfi_offset ra, -8
359; RV64I-NEXT:    mv a0, sp
360; RV64I-NEXT:    call callee
361; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
362; RV64I-NEXT:    addi sp, sp, 16
363; RV64I-NEXT:    ret
364  %1 = alloca i8, align 512
365  call void @callee(ptr %1)
366  ret void
367}
368
369define void @caller1024() {
370; RV32I-LABEL: caller1024:
371; RV32I:       # %bb.0:
372; RV32I-NEXT:    addi sp, sp, -2032
373; RV32I-NEXT:    .cfi_def_cfa_offset 2032
374; RV32I-NEXT:    sw ra, 2028(sp) # 4-byte Folded Spill
375; RV32I-NEXT:    sw s0, 2024(sp) # 4-byte Folded Spill
376; RV32I-NEXT:    .cfi_offset ra, -4
377; RV32I-NEXT:    .cfi_offset s0, -8
378; RV32I-NEXT:    addi s0, sp, 2032
379; RV32I-NEXT:    .cfi_def_cfa s0, 0
380; RV32I-NEXT:    addi sp, sp, -16
381; RV32I-NEXT:    andi sp, sp, -1024
382; RV32I-NEXT:    addi a0, sp, 1024
383; RV32I-NEXT:    call callee
384; RV32I-NEXT:    addi sp, s0, -2048
385; RV32I-NEXT:    addi sp, sp, 16
386; RV32I-NEXT:    lw ra, 2028(sp) # 4-byte Folded Reload
387; RV32I-NEXT:    lw s0, 2024(sp) # 4-byte Folded Reload
388; RV32I-NEXT:    addi sp, sp, 2032
389; RV32I-NEXT:    ret
390;
391; RV64I-LABEL: caller1024:
392; RV64I:       # %bb.0:
393; RV64I-NEXT:    addi sp, sp, -2032
394; RV64I-NEXT:    .cfi_def_cfa_offset 2032
395; RV64I-NEXT:    sd ra, 2024(sp) # 8-byte Folded Spill
396; RV64I-NEXT:    sd s0, 2016(sp) # 8-byte Folded Spill
397; RV64I-NEXT:    .cfi_offset ra, -8
398; RV64I-NEXT:    .cfi_offset s0, -16
399; RV64I-NEXT:    addi s0, sp, 2032
400; RV64I-NEXT:    .cfi_def_cfa s0, 0
401; RV64I-NEXT:    addi sp, sp, -16
402; RV64I-NEXT:    andi sp, sp, -1024
403; RV64I-NEXT:    addi a0, sp, 1024
404; RV64I-NEXT:    call callee
405; RV64I-NEXT:    addi sp, s0, -2048
406; RV64I-NEXT:    addi sp, sp, 16
407; RV64I-NEXT:    ld ra, 2024(sp) # 8-byte Folded Reload
408; RV64I-NEXT:    ld s0, 2016(sp) # 8-byte Folded Reload
409; RV64I-NEXT:    addi sp, sp, 2032
410; RV64I-NEXT:    ret
411  %1 = alloca i8, align 1024
412  call void @callee(ptr %1)
413  ret void
414}
415
416define void @caller_no_realign1024() "no-realign-stack" {
417; RV32I-LABEL: caller_no_realign1024:
418; RV32I:       # %bb.0:
419; RV32I-NEXT:    addi sp, sp, -16
420; RV32I-NEXT:    .cfi_def_cfa_offset 16
421; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
422; RV32I-NEXT:    .cfi_offset ra, -4
423; RV32I-NEXT:    mv a0, sp
424; RV32I-NEXT:    call callee
425; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
426; RV32I-NEXT:    addi sp, sp, 16
427; RV32I-NEXT:    ret
428;
429; RV64I-LABEL: caller_no_realign1024:
430; RV64I:       # %bb.0:
431; RV64I-NEXT:    addi sp, sp, -16
432; RV64I-NEXT:    .cfi_def_cfa_offset 16
433; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
434; RV64I-NEXT:    .cfi_offset ra, -8
435; RV64I-NEXT:    mv a0, sp
436; RV64I-NEXT:    call callee
437; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
438; RV64I-NEXT:    addi sp, sp, 16
439; RV64I-NEXT:    ret
440  %1 = alloca i8, align 1024
441  call void @callee(ptr %1)
442  ret void
443}
444
445define void @caller2048() {
446; RV32I-LABEL: caller2048:
447; RV32I:       # %bb.0:
448; RV32I-NEXT:    addi sp, sp, -2032
449; RV32I-NEXT:    .cfi_def_cfa_offset 2032
450; RV32I-NEXT:    sw ra, 2028(sp) # 4-byte Folded Spill
451; RV32I-NEXT:    sw s0, 2024(sp) # 4-byte Folded Spill
452; RV32I-NEXT:    .cfi_offset ra, -4
453; RV32I-NEXT:    .cfi_offset s0, -8
454; RV32I-NEXT:    addi s0, sp, 2032
455; RV32I-NEXT:    .cfi_def_cfa s0, 0
456; RV32I-NEXT:    addi sp, sp, -2048
457; RV32I-NEXT:    addi sp, sp, -16
458; RV32I-NEXT:    andi sp, sp, -2048
459; RV32I-NEXT:    addi a0, sp, 2047
460; RV32I-NEXT:    addi a0, a0, 1
461; RV32I-NEXT:    call callee
462; RV32I-NEXT:    lui a0, 1
463; RV32I-NEXT:    sub sp, s0, a0
464; RV32I-NEXT:    addi sp, sp, 2032
465; RV32I-NEXT:    addi sp, sp, 32
466; RV32I-NEXT:    lw ra, 2028(sp) # 4-byte Folded Reload
467; RV32I-NEXT:    lw s0, 2024(sp) # 4-byte Folded Reload
468; RV32I-NEXT:    addi sp, sp, 2032
469; RV32I-NEXT:    ret
470;
471; RV64I-LABEL: caller2048:
472; RV64I:       # %bb.0:
473; RV64I-NEXT:    addi sp, sp, -2032
474; RV64I-NEXT:    .cfi_def_cfa_offset 2032
475; RV64I-NEXT:    sd ra, 2024(sp) # 8-byte Folded Spill
476; RV64I-NEXT:    sd s0, 2016(sp) # 8-byte Folded Spill
477; RV64I-NEXT:    .cfi_offset ra, -8
478; RV64I-NEXT:    .cfi_offset s0, -16
479; RV64I-NEXT:    addi s0, sp, 2032
480; RV64I-NEXT:    .cfi_def_cfa s0, 0
481; RV64I-NEXT:    addi sp, sp, -2048
482; RV64I-NEXT:    addi sp, sp, -16
483; RV64I-NEXT:    andi sp, sp, -2048
484; RV64I-NEXT:    addi a0, sp, 2047
485; RV64I-NEXT:    addi a0, a0, 1
486; RV64I-NEXT:    call callee
487; RV64I-NEXT:    lui a0, 1
488; RV64I-NEXT:    sub sp, s0, a0
489; RV64I-NEXT:    addi sp, sp, 2032
490; RV64I-NEXT:    addi sp, sp, 32
491; RV64I-NEXT:    ld ra, 2024(sp) # 8-byte Folded Reload
492; RV64I-NEXT:    ld s0, 2016(sp) # 8-byte Folded Reload
493; RV64I-NEXT:    addi sp, sp, 2032
494; RV64I-NEXT:    ret
495  %1 = alloca i8, align 2048
496  call void @callee(ptr %1)
497  ret void
498}
499
500define void @caller_no_realign2048() "no-realign-stack" {
501; RV32I-LABEL: caller_no_realign2048:
502; RV32I:       # %bb.0:
503; RV32I-NEXT:    addi sp, sp, -16
504; RV32I-NEXT:    .cfi_def_cfa_offset 16
505; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
506; RV32I-NEXT:    .cfi_offset ra, -4
507; RV32I-NEXT:    mv a0, sp
508; RV32I-NEXT:    call callee
509; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
510; RV32I-NEXT:    addi sp, sp, 16
511; RV32I-NEXT:    ret
512;
513; RV64I-LABEL: caller_no_realign2048:
514; RV64I:       # %bb.0:
515; RV64I-NEXT:    addi sp, sp, -16
516; RV64I-NEXT:    .cfi_def_cfa_offset 16
517; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
518; RV64I-NEXT:    .cfi_offset ra, -8
519; RV64I-NEXT:    mv a0, sp
520; RV64I-NEXT:    call callee
521; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
522; RV64I-NEXT:    addi sp, sp, 16
523; RV64I-NEXT:    ret
524  %1 = alloca i8, align 2048
525  call void @callee(ptr %1)
526  ret void
527}
528
529define void @caller4096() {
530; RV32I-LABEL: caller4096:
531; RV32I:       # %bb.0:
532; RV32I-NEXT:    addi sp, sp, -2032
533; RV32I-NEXT:    .cfi_def_cfa_offset 2032
534; RV32I-NEXT:    sw ra, 2028(sp) # 4-byte Folded Spill
535; RV32I-NEXT:    sw s0, 2024(sp) # 4-byte Folded Spill
536; RV32I-NEXT:    .cfi_offset ra, -4
537; RV32I-NEXT:    .cfi_offset s0, -8
538; RV32I-NEXT:    addi s0, sp, 2032
539; RV32I-NEXT:    .cfi_def_cfa s0, 0
540; RV32I-NEXT:    lui a0, 2
541; RV32I-NEXT:    addi a0, a0, -2032
542; RV32I-NEXT:    sub sp, sp, a0
543; RV32I-NEXT:    srli a0, sp, 12
544; RV32I-NEXT:    slli sp, a0, 12
545; RV32I-NEXT:    lui a0, 1
546; RV32I-NEXT:    add a0, sp, a0
547; RV32I-NEXT:    call callee
548; RV32I-NEXT:    lui a0, 2
549; RV32I-NEXT:    sub sp, s0, a0
550; RV32I-NEXT:    addi a0, a0, -2032
551; RV32I-NEXT:    add sp, sp, a0
552; RV32I-NEXT:    lw ra, 2028(sp) # 4-byte Folded Reload
553; RV32I-NEXT:    lw s0, 2024(sp) # 4-byte Folded Reload
554; RV32I-NEXT:    addi sp, sp, 2032
555; RV32I-NEXT:    ret
556;
557; RV64I-LABEL: caller4096:
558; RV64I:       # %bb.0:
559; RV64I-NEXT:    addi sp, sp, -2032
560; RV64I-NEXT:    .cfi_def_cfa_offset 2032
561; RV64I-NEXT:    sd ra, 2024(sp) # 8-byte Folded Spill
562; RV64I-NEXT:    sd s0, 2016(sp) # 8-byte Folded Spill
563; RV64I-NEXT:    .cfi_offset ra, -8
564; RV64I-NEXT:    .cfi_offset s0, -16
565; RV64I-NEXT:    addi s0, sp, 2032
566; RV64I-NEXT:    .cfi_def_cfa s0, 0
567; RV64I-NEXT:    lui a0, 2
568; RV64I-NEXT:    addiw a0, a0, -2032
569; RV64I-NEXT:    sub sp, sp, a0
570; RV64I-NEXT:    srli a0, sp, 12
571; RV64I-NEXT:    slli sp, a0, 12
572; RV64I-NEXT:    lui a0, 1
573; RV64I-NEXT:    add a0, sp, a0
574; RV64I-NEXT:    call callee
575; RV64I-NEXT:    lui a0, 2
576; RV64I-NEXT:    sub sp, s0, a0
577; RV64I-NEXT:    addiw a0, a0, -2032
578; RV64I-NEXT:    add sp, sp, a0
579; RV64I-NEXT:    ld ra, 2024(sp) # 8-byte Folded Reload
580; RV64I-NEXT:    ld s0, 2016(sp) # 8-byte Folded Reload
581; RV64I-NEXT:    addi sp, sp, 2032
582; RV64I-NEXT:    ret
583  %1 = alloca i8, align 4096
584  call void @callee(ptr %1)
585  ret void
586}
587
588define void @caller_no_realign4096() "no-realign-stack" {
589; RV32I-LABEL: caller_no_realign4096:
590; RV32I:       # %bb.0:
591; RV32I-NEXT:    addi sp, sp, -16
592; RV32I-NEXT:    .cfi_def_cfa_offset 16
593; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
594; RV32I-NEXT:    .cfi_offset ra, -4
595; RV32I-NEXT:    mv a0, sp
596; RV32I-NEXT:    call callee
597; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
598; RV32I-NEXT:    addi sp, sp, 16
599; RV32I-NEXT:    ret
600;
601; RV64I-LABEL: caller_no_realign4096:
602; RV64I:       # %bb.0:
603; RV64I-NEXT:    addi sp, sp, -16
604; RV64I-NEXT:    .cfi_def_cfa_offset 16
605; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
606; RV64I-NEXT:    .cfi_offset ra, -8
607; RV64I-NEXT:    mv a0, sp
608; RV64I-NEXT:    call callee
609; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
610; RV64I-NEXT:    addi sp, sp, 16
611; RV64I-NEXT:    ret
612  %1 = alloca i8, align 4096
613  call void @callee(ptr %1)
614  ret void
615}
616