1*04a2baf5SPhilipp Tomsich; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2*04a2baf5SPhilipp Tomsich; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 3*04a2baf5SPhilipp Tomsich; RUN: | FileCheck %s -check-prefixes=RV64I 4*04a2baf5SPhilipp Tomsich; RUN: llc -mtriple=riscv64 -mattr=+xtheadbs -verify-machineinstrs < %s \ 5*04a2baf5SPhilipp Tomsich; RUN: | FileCheck %s -check-prefixes=RV64XTHEADBS 6*04a2baf5SPhilipp Tomsich 7*04a2baf5SPhilipp Tomsichdefine signext i32 @th_tst_i32(i32 signext %a) nounwind { 8*04a2baf5SPhilipp Tomsich; RV64I-LABEL: th_tst_i32: 9*04a2baf5SPhilipp Tomsich; RV64I: # %bb.0: 10*04a2baf5SPhilipp Tomsich; RV64I-NEXT: slli a0, a0, 58 11*04a2baf5SPhilipp Tomsich; RV64I-NEXT: srli a0, a0, 63 12*04a2baf5SPhilipp Tomsich; RV64I-NEXT: ret 13*04a2baf5SPhilipp Tomsich; 14*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-LABEL: th_tst_i32: 15*04a2baf5SPhilipp Tomsich; RV64XTHEADBS: # %bb.0: 16*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-NEXT: th.tst a0, a0, 5 17*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-NEXT: ret 18*04a2baf5SPhilipp Tomsich %shr = lshr i32 %a, 5 19*04a2baf5SPhilipp Tomsich %and = and i32 %shr, 1 20*04a2baf5SPhilipp Tomsich ret i32 %and 21*04a2baf5SPhilipp Tomsich} 22*04a2baf5SPhilipp Tomsich 23*04a2baf5SPhilipp Tomsichdefine i64 @the_tst_i64(i64 %a) nounwind { 24*04a2baf5SPhilipp Tomsich; RV64I-LABEL: the_tst_i64: 25*04a2baf5SPhilipp Tomsich; RV64I: # %bb.0: 26*04a2baf5SPhilipp Tomsich; RV64I-NEXT: slli a0, a0, 58 27*04a2baf5SPhilipp Tomsich; RV64I-NEXT: srli a0, a0, 63 28*04a2baf5SPhilipp Tomsich; RV64I-NEXT: ret 29*04a2baf5SPhilipp Tomsich; 30*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-LABEL: the_tst_i64: 31*04a2baf5SPhilipp Tomsich; RV64XTHEADBS: # %bb.0: 32*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-NEXT: th.tst a0, a0, 5 33*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-NEXT: ret 34*04a2baf5SPhilipp Tomsich %shr = lshr i64 %a, 5 35*04a2baf5SPhilipp Tomsich %and = and i64 %shr, 1 36*04a2baf5SPhilipp Tomsich ret i64 %and 37*04a2baf5SPhilipp Tomsich} 38*04a2baf5SPhilipp Tomsich 39*04a2baf5SPhilipp Tomsichdefine signext i32 @th_tst_i32_cmp(i32 signext %a) nounwind { 40*04a2baf5SPhilipp Tomsich; RV64I-LABEL: th_tst_i32_cmp: 41*04a2baf5SPhilipp Tomsich; RV64I: # %bb.0: 42*04a2baf5SPhilipp Tomsich; RV64I-NEXT: slli a0, a0, 58 43*04a2baf5SPhilipp Tomsich; RV64I-NEXT: srli a0, a0, 63 44*04a2baf5SPhilipp Tomsich; RV64I-NEXT: ret 45*04a2baf5SPhilipp Tomsich; 46*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-LABEL: th_tst_i32_cmp: 47*04a2baf5SPhilipp Tomsich; RV64XTHEADBS: # %bb.0: 48*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-NEXT: th.tst a0, a0, 5 49*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-NEXT: ret 50*04a2baf5SPhilipp Tomsich %and = and i32 %a, 32 51*04a2baf5SPhilipp Tomsich %cmp = icmp ne i32 %and, 0 52*04a2baf5SPhilipp Tomsich %zext = zext i1 %cmp to i32 53*04a2baf5SPhilipp Tomsich ret i32 %zext 54*04a2baf5SPhilipp Tomsich} 55*04a2baf5SPhilipp Tomsich 56*04a2baf5SPhilipp Tomsichdefine i64 @th_tst_i64_cmp(i64 %a) nounwind { 57*04a2baf5SPhilipp Tomsich; RV64I-LABEL: th_tst_i64_cmp: 58*04a2baf5SPhilipp Tomsich; RV64I: # %bb.0: 59*04a2baf5SPhilipp Tomsich; RV64I-NEXT: slli a0, a0, 58 60*04a2baf5SPhilipp Tomsich; RV64I-NEXT: srli a0, a0, 63 61*04a2baf5SPhilipp Tomsich; RV64I-NEXT: ret 62*04a2baf5SPhilipp Tomsich; 63*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-LABEL: th_tst_i64_cmp: 64*04a2baf5SPhilipp Tomsich; RV64XTHEADBS: # %bb.0: 65*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-NEXT: th.tst a0, a0, 5 66*04a2baf5SPhilipp Tomsich; RV64XTHEADBS-NEXT: ret 67*04a2baf5SPhilipp Tomsich %and = and i64 %a, 32 68*04a2baf5SPhilipp Tomsich %cmp = icmp ne i64 %and, 0 69*04a2baf5SPhilipp Tomsich %zext = zext i1 %cmp to i64 70*04a2baf5SPhilipp Tomsich ret i64 %zext 71*04a2baf5SPhilipp Tomsich} 72