1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs < %s \ 3; RUN: | FileCheck %s -check-prefix=RV32ZBKB 4 5declare i32 @llvm.riscv.brev8(i32); 6 7define i32 @brev8(i32 %a) nounwind { 8; RV32ZBKB-LABEL: brev8: 9; RV32ZBKB: # %bb.0: 10; RV32ZBKB-NEXT: brev8 a0, a0 11; RV32ZBKB-NEXT: ret 12 %val = call i32 @llvm.riscv.brev8(i32 %a) 13 ret i32 %val 14} 15 16; Test that rev8 is recognized as preserving zero extension. 17define zeroext i16 @brev8_knownbits(i16 zeroext %a) nounwind { 18; RV32ZBKB-LABEL: brev8_knownbits: 19; RV32ZBKB: # %bb.0: 20; RV32ZBKB-NEXT: brev8 a0, a0 21; RV32ZBKB-NEXT: ret 22 %zext = zext i16 %a to i32 23 %val = call i32 @llvm.riscv.brev8(i32 %zext) 24 %trunc = trunc i32 %val to i16 25 ret i16 %trunc 26} 27 28declare i32 @llvm.bswap.i32(i32) 29 30define i32 @rev8_i32(i32 %a) nounwind { 31; RV32ZBKB-LABEL: rev8_i32: 32; RV32ZBKB: # %bb.0: 33; RV32ZBKB-NEXT: rev8 a0, a0 34; RV32ZBKB-NEXT: ret 35 %1 = tail call i32 @llvm.bswap.i32(i32 %a) 36 ret i32 %1 37} 38 39declare i32 @llvm.riscv.zip(i32); 40 41define i32 @zip(i32 %a) nounwind { 42; RV32ZBKB-LABEL: zip: 43; RV32ZBKB: # %bb.0: 44; RV32ZBKB-NEXT: zip a0, a0 45; RV32ZBKB-NEXT: ret 46 %val = call i32 @llvm.riscv.zip(i32 %a) 47 ret i32 %val 48} 49 50declare i32 @llvm.riscv.unzip(i32); 51 52define i32 @unzip(i32 %a) nounwind { 53; RV32ZBKB-LABEL: unzip: 54; RV32ZBKB: # %bb.0: 55; RV32ZBKB-NEXT: unzip a0, a0 56; RV32ZBKB-NEXT: ret 57 %val = call i32 @llvm.riscv.unzip(i32 %a) 58 ret i32 %val 59} 60