xref: /llvm-project/llvm/test/CodeGen/RISCV/rv32xtheadbs.ll (revision 9e1ad3cff6a855fdfdc1d91323e2021726da04ea)
1*04a2baf5SPhilipp Tomsich; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2*04a2baf5SPhilipp Tomsich; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3*04a2baf5SPhilipp Tomsich; RUN:   | FileCheck %s -check-prefixes=RV32I
4*04a2baf5SPhilipp Tomsich; RUN: llc -mtriple=riscv32 -mattr=+xtheadbs -verify-machineinstrs < %s \
5*04a2baf5SPhilipp Tomsich; RUN:   | FileCheck %s -check-prefixes=RV32XTHEADBS
6*04a2baf5SPhilipp Tomsich
7*04a2baf5SPhilipp Tomsichdefine i32 @th_tst_i32(i32 %a) nounwind {
8*04a2baf5SPhilipp Tomsich; RV32I-LABEL: th_tst_i32:
9*04a2baf5SPhilipp Tomsich; RV32I:       # %bb.0:
10*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    slli a0, a0, 26
11*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    srli a0, a0, 31
12*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    ret
13*04a2baf5SPhilipp Tomsich;
14*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-LABEL: th_tst_i32:
15*04a2baf5SPhilipp Tomsich; RV32XTHEADBS:       # %bb.0:
16*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    th.tst a0, a0, 5
17*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    ret
18*04a2baf5SPhilipp Tomsich  %shr = lshr i32 %a, 5
19*04a2baf5SPhilipp Tomsich  %and = and i32 %shr, 1
20*04a2baf5SPhilipp Tomsich  ret i32 %and
21*04a2baf5SPhilipp Tomsich}
22*04a2baf5SPhilipp Tomsich
23*04a2baf5SPhilipp Tomsichdefine i64 @th_tst_i64(i64 %a) nounwind {
24*04a2baf5SPhilipp Tomsich; RV32I-LABEL: th_tst_i64:
25*04a2baf5SPhilipp Tomsich; RV32I:       # %bb.0:
26*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    slli a0, a0, 26
27*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    srli a0, a0, 31
28*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    li a1, 0
29*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    ret
30*04a2baf5SPhilipp Tomsich;
31*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-LABEL: th_tst_i64:
32*04a2baf5SPhilipp Tomsich; RV32XTHEADBS:       # %bb.0:
33*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    th.tst a0, a0, 5
34*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    li a1, 0
35*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    ret
36*04a2baf5SPhilipp Tomsich  %shr = lshr i64 %a, 5
37*04a2baf5SPhilipp Tomsich  %and = and i64 %shr, 1
38*04a2baf5SPhilipp Tomsich  ret i64 %and
39*04a2baf5SPhilipp Tomsich}
40*04a2baf5SPhilipp Tomsich
41*04a2baf5SPhilipp Tomsichdefine signext i32 @th_tst_i32_cmp(i32 signext %a) nounwind {
42*04a2baf5SPhilipp Tomsich; RV32I-LABEL: th_tst_i32_cmp:
43*04a2baf5SPhilipp Tomsich; RV32I:       # %bb.0:
44*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    slli a0, a0, 26
45*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    srli a0, a0, 31
46*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    ret
47*04a2baf5SPhilipp Tomsich;
48*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-LABEL: th_tst_i32_cmp:
49*04a2baf5SPhilipp Tomsich; RV32XTHEADBS:       # %bb.0:
50*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    th.tst a0, a0, 5
51*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    ret
52*04a2baf5SPhilipp Tomsich  %and = and i32 %a, 32
53*04a2baf5SPhilipp Tomsich  %cmp = icmp ne i32 %and, 0
54*04a2baf5SPhilipp Tomsich  %zext = zext i1 %cmp to i32
55*04a2baf5SPhilipp Tomsich  ret i32 %zext
56*04a2baf5SPhilipp Tomsich}
57*04a2baf5SPhilipp Tomsich
58*04a2baf5SPhilipp Tomsichdefine i64 @th_tst_i64_cmp(i64 %a) nounwind {
59*04a2baf5SPhilipp Tomsich; RV32I-LABEL: th_tst_i64_cmp:
60*04a2baf5SPhilipp Tomsich; RV32I:       # %bb.0:
61*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    slli a0, a0, 26
62*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    srli a0, a0, 31
63*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    li a1, 0
64*04a2baf5SPhilipp Tomsich; RV32I-NEXT:    ret
65*04a2baf5SPhilipp Tomsich;
66*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-LABEL: th_tst_i64_cmp:
67*04a2baf5SPhilipp Tomsich; RV32XTHEADBS:       # %bb.0:
68*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    th.tst a0, a0, 5
69*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    li a1, 0
70*04a2baf5SPhilipp Tomsich; RV32XTHEADBS-NEXT:    ret
71*04a2baf5SPhilipp Tomsich  %and = and i64 %a, 32
72*04a2baf5SPhilipp Tomsich  %cmp = icmp ne i64 %and, 0
73*04a2baf5SPhilipp Tomsich  %zext = zext i1 %cmp to i64
74*04a2baf5SPhilipp Tomsich  ret i64 %zext
75*04a2baf5SPhilipp Tomsich}
76