1ca33796dSSimon Pilgrim; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2ca33796dSSimon Pilgrim; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s | FileCheck -check-prefix=RV32I %s 3ca33796dSSimon Pilgrim; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck -check-prefix=RV64I %s 4ca33796dSSimon Pilgrim 5ca33796dSSimon Pilgrimdefine i32 @PR95271(ptr %p) { 6ca33796dSSimon Pilgrim; RV32I-LABEL: PR95271: 7ca33796dSSimon Pilgrim; RV32I: # %bb.0: 8ca33796dSSimon Pilgrim; RV32I-NEXT: lw a0, 0(a0) 9*9122c523SPengcheng Wang; RV32I-NEXT: lui a1, 349525 10*9122c523SPengcheng Wang; RV32I-NEXT: addi a1, a1, 1365 11ca33796dSSimon Pilgrim; RV32I-NEXT: addi a0, a0, 1 12*9122c523SPengcheng Wang; RV32I-NEXT: srli a2, a0, 1 13*9122c523SPengcheng Wang; RV32I-NEXT: and a1, a2, a1 14*9122c523SPengcheng Wang; RV32I-NEXT: lui a2, 209715 15*9122c523SPengcheng Wang; RV32I-NEXT: addi a2, a2, 819 164527fba9SSergei Barannikov; RV32I-NEXT: sub a0, a0, a1 17*9122c523SPengcheng Wang; RV32I-NEXT: and a1, a0, a2 184527fba9SSergei Barannikov; RV32I-NEXT: srli a0, a0, 2 19*9122c523SPengcheng Wang; RV32I-NEXT: and a0, a0, a2 20*9122c523SPengcheng Wang; RV32I-NEXT: lui a2, 61681 21*9122c523SPengcheng Wang; RV32I-NEXT: add a0, a1, a0 224527fba9SSergei Barannikov; RV32I-NEXT: srli a1, a0, 4 234527fba9SSergei Barannikov; RV32I-NEXT: add a0, a0, a1 24*9122c523SPengcheng Wang; RV32I-NEXT: addi a1, a2, -241 254527fba9SSergei Barannikov; RV32I-NEXT: and a0, a0, a1 264527fba9SSergei Barannikov; RV32I-NEXT: slli a1, a0, 8 274527fba9SSergei Barannikov; RV32I-NEXT: add a0, a0, a1 284527fba9SSergei Barannikov; RV32I-NEXT: slli a1, a0, 16 294527fba9SSergei Barannikov; RV32I-NEXT: add a0, a0, a1 304527fba9SSergei Barannikov; RV32I-NEXT: srli a0, a0, 24 314527fba9SSergei Barannikov; RV32I-NEXT: ret 32ca33796dSSimon Pilgrim; 33ca33796dSSimon Pilgrim; RV64I-LABEL: PR95271: 34ca33796dSSimon Pilgrim; RV64I: # %bb.0: 35ca33796dSSimon Pilgrim; RV64I-NEXT: lw a0, 0(a0) 36*9122c523SPengcheng Wang; RV64I-NEXT: lui a1, 349525 37*9122c523SPengcheng Wang; RV64I-NEXT: addiw a1, a1, 1365 38*9122c523SPengcheng Wang; RV64I-NEXT: addi a2, a0, 1 39*9122c523SPengcheng Wang; RV64I-NEXT: srli a2, a2, 1 40*9122c523SPengcheng Wang; RV64I-NEXT: and a1, a2, a1 41*9122c523SPengcheng Wang; RV64I-NEXT: lui a2, 209715 42*9122c523SPengcheng Wang; RV64I-NEXT: addiw a2, a2, 819 43*9122c523SPengcheng Wang; RV64I-NEXT: addiw a0, a0, 1 44*9122c523SPengcheng Wang; RV64I-NEXT: sub a0, a0, a1 45*9122c523SPengcheng Wang; RV64I-NEXT: and a1, a0, a2 46*9122c523SPengcheng Wang; RV64I-NEXT: srli a0, a0, 2 47ca33796dSSimon Pilgrim; RV64I-NEXT: and a0, a0, a2 48*9122c523SPengcheng Wang; RV64I-NEXT: lui a2, 61681 49*9122c523SPengcheng Wang; RV64I-NEXT: add a0, a1, a0 50ca33796dSSimon Pilgrim; RV64I-NEXT: srli a1, a0, 4 51ca33796dSSimon Pilgrim; RV64I-NEXT: add a0, a0, a1 52*9122c523SPengcheng Wang; RV64I-NEXT: addi a1, a2, -241 53ca33796dSSimon Pilgrim; RV64I-NEXT: and a0, a0, a1 54ca33796dSSimon Pilgrim; RV64I-NEXT: slli a1, a0, 8 55ca33796dSSimon Pilgrim; RV64I-NEXT: add a0, a0, a1 56ca33796dSSimon Pilgrim; RV64I-NEXT: slli a1, a0, 16 57ca33796dSSimon Pilgrim; RV64I-NEXT: add a0, a0, a1 58ca33796dSSimon Pilgrim; RV64I-NEXT: srliw a0, a0, 24 59ca33796dSSimon Pilgrim; RV64I-NEXT: ret 60ca33796dSSimon Pilgrim %load = load i32, ptr %p, align 4 61ca33796dSSimon Pilgrim %inc = add i32 %load, 1 62ca33796dSSimon Pilgrim %pop = tail call i32 @llvm.ctpop.i32(i32 %inc) 63ca33796dSSimon Pilgrim ret i32 %pop 64ca33796dSSimon Pilgrim} 65