1*c9a86fa9SSimon Pilgrim; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2*c9a86fa9SSimon Pilgrim; RUN: llc < %s -mtriple=riscv32-- | FileCheck %s 3*c9a86fa9SSimon Pilgrim; RUN: llc < %s -mtriple=riscv64-- | FileCheck %s 4*c9a86fa9SSimon Pilgrim 5*c9a86fa9SSimon Pilgrimdefine i32 @PR94145(i16 %a0) { 6*c9a86fa9SSimon Pilgrim; CHECK-LABEL: PR94145: 7*c9a86fa9SSimon Pilgrim; CHECK: # %bb.0: 8*c9a86fa9SSimon Pilgrim; CHECK-NEXT: andi a0, a0, 2 9*c9a86fa9SSimon Pilgrim; CHECK-NEXT: seqz a0, a0 10*c9a86fa9SSimon Pilgrim; CHECK-NEXT: li a1, 1 11*c9a86fa9SSimon Pilgrim; CHECK-NEXT: sll a0, a1, a0 12*c9a86fa9SSimon Pilgrim; CHECK-NEXT: ret 13*c9a86fa9SSimon Pilgrim %lshr = lshr i16 %a0, 1 14*c9a86fa9SSimon Pilgrim %and = and i16 %lshr, 1 15*c9a86fa9SSimon Pilgrim %xor = xor i16 %and, 1 16*c9a86fa9SSimon Pilgrim %shl = shl i16 1, %xor 17*c9a86fa9SSimon Pilgrim %freeze = freeze i16 %shl 18*c9a86fa9SSimon Pilgrim %zext = zext i16 %freeze to i32 19*c9a86fa9SSimon Pilgrim ret i32 %zext 20*c9a86fa9SSimon Pilgrim} 21