xref: /llvm-project/llvm/test/CodeGen/RISCV/pr40333.ll (revision 299d690a502b5a1d56e5e73b2bd7c137b82c20a6)
1cd26560eSAlex Bradbury; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2cd26560eSAlex Bradbury; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
3cd26560eSAlex Bradbury; RUN:   | FileCheck -check-prefix=RV64I %s
4cd26560eSAlex Bradbury
5cd26560eSAlex Bradbury; This test case is significantly simplified from the submitted .ll but
6cd26560eSAlex Bradbury; demonstrates the same issue. At the time of this problem report, an infinite
7cd26560eSAlex Bradbury; loop would be created in DAGCombine, converting ANY_EXTEND to SIGN_EXTEND
8cd26560eSAlex Bradbury; and back again.
9cd26560eSAlex Bradbury
10cd26560eSAlex Bradburydefine signext i8 @foo(i32 %a, i32 %b) nounwind {
11cd26560eSAlex Bradbury; RV64I-LABEL: foo:
12cd26560eSAlex Bradbury; RV64I:       # %bb.0:
13*299d690aSAlex Bradbury; RV64I-NEXT:    srlw a0, a0, a1
14cd26560eSAlex Bradbury; RV64I-NEXT:    slli a0, a0, 56
15cd26560eSAlex Bradbury; RV64I-NEXT:    srai a0, a0, 56
16cd26560eSAlex Bradbury; RV64I-NEXT:    ret
17cd26560eSAlex Bradbury %1 = lshr i32 %a, %b
18cd26560eSAlex Bradbury %2 = trunc i32 %1 to i8
19cd26560eSAlex Bradbury ret i8 %2
20cd26560eSAlex Bradbury}
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