xref: /llvm-project/llvm/test/CodeGen/RISCV/make-compressible.mir (revision 7e97ae35ae2d1c38d149e670139a538bdba86e93)

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -o - %s -mtriple=riscv32 -mattr=+c,+f,+d -simplify-mir \
# RUN:   -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV32,RV32C %s
# RUN: llc -o - %s -mtriple=riscv64 -mattr=+c,+f,+d -simplify-mir \
# RUN:   -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV64,RV64C %s
# RUN: llc -o - %s -mtriple=riscv32 -mattr=+d,+zcf -simplify-mir \
# RUN:   -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV32,RV32ZCF %s
# RUN: llc -o - %s -mtriple=riscv32 -mattr=+d,+zca -simplify-mir \
# RUN:   -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV32,RV32ZCA %s
# RUN: llc -o - %s -mtriple=riscv64 -mattr=+d,+zca -simplify-mir \
# RUN:   -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV64,RV64ZCA %s
--- |

  define void @store_common_value(ptr %a, ptr %b, ptr %c) #0 {
  entry:
    store i32 0, ptr %a, align 4
    store i32 0, ptr %b, align 4
    store i32 0, ptr %c, align 4
    ret void
  }

  define void @store_common_value_float(ptr %a, ptr %b, ptr %c, float %d, float %e, float %f, float %g, float %h, float %i, float %j) #0 {
  entry:
    store float %j, ptr %a, align 4
    store float %j, ptr %b, align 4
    store float %j, ptr %c, align 4
    ret void
  }

  define void @store_common_value_double(ptr %a, ptr %b, ptr %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j) #0 {
  entry:
    store double %j, ptr %a, align 8
    store double %j, ptr %b, align 8
    store double %j, ptr %c, align 8
    ret void
  }

  define void @store_common_ptr(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
  entry:
    store volatile i32 1, ptr %p, align 4
    store volatile i32 3, ptr %p, align 4
    store volatile i32 5, ptr %p, align 4
    ret void
  }

  define void @store_common_ptr_self(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
  entry:
    %q = bitcast ptr %p to ptr
    store volatile i32 1, ptr %p, align 4
    store volatile i32 3, ptr %p, align 4
    store volatile ptr %p, ptr %q, align 4
    ret void
  }

  define void @store_common_ptr_float(float %a, float %b, float %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, ptr %p) #0 {
  entry:
    store volatile float %a, ptr %p, align 4
    store volatile float %b, ptr %p, align 4
    store volatile float %c, ptr %p, align 4
    ret void
  }

  define void @store_common_ptr_double(double %a, double %b, double %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, ptr %p) #0 {
  entry:
    store volatile double %a, ptr %p, align 8
    store volatile double %b, ptr %p, align 8
    store volatile double %c, ptr %p, align 8
    ret void
  }

  define void @load_common_ptr(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
  entry:
    %g = load volatile i32, ptr %p, align 4
    %h = load volatile i32, ptr %p, align 4
    %i = load volatile i32, ptr %p, align 4
    ret void
  }

  define void @load_common_ptr_float(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
  entry:
    %0 = load float, ptr %g, align 4
    %arrayidx1 = getelementptr inbounds float, ptr %g, i32 1
    %1 = load float, ptr %arrayidx1, align 4
    %arrayidx2 = getelementptr inbounds float, ptr %g, i32 2
    %2 = load float, ptr %arrayidx2, align 4
    tail call void @load_common_ptr_float_1(float %0, float %1, float %2)
    ret void
  }

  declare void @load_common_ptr_float_1(float, float, float) #0

  define void @load_common_ptr_double(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
  entry:
    %0 = load double, ptr %g, align 8
    %arrayidx1 = getelementptr inbounds double, ptr %g, i32 1
    %1 = load double, ptr %arrayidx1, align 8
    %arrayidx2 = getelementptr inbounds double, ptr %g, i32 2
    %2 = load double, ptr %arrayidx2, align 8
    tail call void @load_common_ptr_double_1(double %0, double %1, double %2)
    ret void
  }

  declare void @load_common_ptr_double_1(double, double, double) #0

  define void @store_large_offset(ptr %p) #0 {
  entry:
    %0 = getelementptr inbounds i32, ptr %p, i32 100
    store volatile i32 1, ptr %0, align 4
    %1 = getelementptr inbounds i32, ptr %p, i32 101
    store volatile i32 3, ptr %1, align 4
    %2 = getelementptr inbounds i32, ptr %p, i32 102
    store volatile i32 5, ptr %2, align 4
    %3 = getelementptr inbounds i32, ptr %p, i32 103
    store volatile i32 7, ptr %3, align 4
    ret void
  }

  define void @store_large_offset_float(ptr %p, float %a, float %b, float %c, float %d) #0 {
  entry:
    %0 = getelementptr inbounds float, ptr %p, i32 100
    store volatile float %a, ptr %0, align 4
    %1 = getelementptr inbounds float, ptr %p, i32 101
    store volatile float %b, ptr %1, align 4
    %2 = getelementptr inbounds float, ptr %p, i32 102
    store volatile float %c, ptr %2, align 4
    %3 = getelementptr inbounds float, ptr %p, i32 103
    store volatile float %d, ptr %3, align 4
    ret void
  }

  define void @store_large_offset_double(ptr %p, double %a, double %b, double %c, double %d) #0 {
  entry:
    %0 = getelementptr inbounds double, ptr %p, i32 100
    store volatile double %a, ptr %0, align 8
    %1 = getelementptr inbounds double, ptr %p, i32 101
    store volatile double %b, ptr %1, align 8
    %2 = getelementptr inbounds double, ptr %p, i32 102
    store volatile double %c, ptr %2, align 8
    %3 = getelementptr inbounds double, ptr %p, i32 103
    store volatile double %d, ptr %3, align 8
    ret void
  }

  define void @load_large_offset(ptr %p) #0 {
  entry:
    %0 = getelementptr inbounds i32, ptr %p, i32 100
    %a = load volatile i32, ptr %0, align 4
    %1 = getelementptr inbounds i32, ptr %p, i32 101
    %b = load volatile i32, ptr %1, align 4
    %2 = getelementptr inbounds i32, ptr %p, i32 102
    %c = load volatile i32, ptr %2, align 4
    %3 = getelementptr inbounds i32, ptr %p, i32 103
    %d = load volatile i32, ptr %3, align 4
    ret void
  }

  define void @load_large_offset_float(ptr %p) #0 {
  entry:
    %arrayidx = getelementptr inbounds float, ptr %p, i32 100
    %0 = load float, ptr %arrayidx, align 4
    %arrayidx1 = getelementptr inbounds float, ptr %p, i32 101
    %1 = load float, ptr %arrayidx1, align 4
    %arrayidx2 = getelementptr inbounds float, ptr %p, i32 102
    %2 = load float, ptr %arrayidx2, align 4
    tail call void @load_large_offset_float_1(float %0, float %1, float %2)
    ret void
  }

  declare void @load_large_offset_float_1(float, float, float) #0

  define void @load_large_offset_double(ptr %p) #0 {
  entry:
    %arrayidx = getelementptr inbounds double, ptr %p, i32 100
    %0 = load double, ptr %arrayidx, align 8
    %arrayidx1 = getelementptr inbounds double, ptr %p, i32 101
    %1 = load double, ptr %arrayidx1, align 8
    %arrayidx2 = getelementptr inbounds double, ptr %p, i32 102
    %2 = load double, ptr %arrayidx2, align 8
    tail call void @load_large_offset_double_1(double %0, double %1, double %2)
    ret void
  }

  declare void @load_large_offset_double_1(double, double, double) #0

  define void @store_common_value_no_opt(ptr %a) #0 {
  entry:
    store i32 0, ptr %a, align 4
    ret void
  }

  define void @store_common_value_float_no_opt(ptr %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h) #0 {
  entry:
    store float %h, ptr %a, align 4
    ret void
  }

  define void @store_common_value_double_no_opt(ptr %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h) #0 {
  entry:
    store double %h, ptr %a, align 8
    ret void
  }

  define void @store_common_ptr_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
  entry:
    store volatile i32 1, ptr %p, align 4
    ret void
  }

  define void @store_common_ptr_float_no_opt(float %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, ptr %p) #0 {
  entry:
    store volatile float %a, ptr %p, align 4
    ret void
  }

  define void @store_common_ptr_double_no_opt(double %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, ptr %p) #0 {
  entry:
    store volatile double %a, ptr %p, align 8
    ret void
  }

  define void @load_common_ptr_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
  entry:
    %g = load volatile i32, ptr %p, align 4
    ret void
  }

  define float @load_common_ptr_float_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
  entry:
    %0 = load float, ptr %g, align 4
    ret float %0
  }

  define double @load_common_ptr_double_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
  entry:
    %0 = load double, ptr %g, align 8
    ret double %0
  }

  define void @store_large_offset_no_opt(ptr %p) #0 {
  entry:
    %0 = getelementptr inbounds i32, ptr %p, i32 100
    store volatile i32 1, ptr %0, align 4
    %1 = getelementptr inbounds i32, ptr %p, i32 101
    store volatile i32 3, ptr %1, align 4
    ret void
  }

  define void @store_large_offset_float_no_opt(ptr %p, float %a, float %b) #0 {
  entry:
    %0 = getelementptr inbounds float, ptr %p, i32 100
    store volatile float %a, ptr %0, align 4
    %1 = getelementptr inbounds float, ptr %p, i32 101
    store volatile float %b, ptr %1, align 4
    ret void
  }

  define void @store_large_offset_double_no_opt(ptr %p, double %a, double %b) #0 {
  entry:
    %0 = getelementptr inbounds double, ptr %p, i32 100
    store volatile double %a, ptr %0, align 8
    %1 = getelementptr inbounds double, ptr %p, i32 101
    store volatile double %b, ptr %1, align 8
    ret void
  }

  define void @load_large_offset_no_opt(ptr %p) #0 {
  entry:
    %0 = getelementptr inbounds i32, ptr %p, i32 100
    %a = load volatile i32, ptr %0, align 4
    %1 = getelementptr inbounds i32, ptr %p, i32 101
    %b = load volatile i32, ptr %1, align 4
    ret void
  }

  define { float, float } @load_large_offset_float_no_opt(ptr %p) #0 {
  entry:
    %arrayidx = getelementptr inbounds float, ptr %p, i32 100
    %0 = load float, ptr %arrayidx, align 4
    %arrayidx1 = getelementptr inbounds float, ptr %p, i32 101
    %1 = load float, ptr %arrayidx1, align 4
    %2 = insertvalue { float, float } undef, float %0, 0
    %3 = insertvalue { float, float } %2, float %1, 1
    ret { float, float } %3
  }

  define { double, double } @load_large_offset_double_no_opt(ptr %p) #0 {
  entry:
    %arrayidx = getelementptr inbounds double, ptr %p, i32 100
    %0 = load double, ptr %arrayidx, align 8
    %arrayidx1 = getelementptr inbounds double, ptr %p, i32 101
    %1 = load double, ptr %arrayidx1, align 8
    %2 = insertvalue { double, double } undef, double %0, 0
    %3 = insertvalue { double, double } %2, double %1, 1
    ret { double, double } %3
  }

  attributes #0 = { minsize }

...
---
name:            store_common_value
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11, $x12

    ; RV32-LABEL: name: store_common_value
    ; RV32: liveins: $x10, $x11, $x12
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: $x13 = ADDI $x0, 0
    ; RV32-NEXT: SW $x13, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV32-NEXT: SW $x13, killed renamable $x11, 0 :: (store (s32) into %ir.b)
    ; RV32-NEXT: SW $x13, killed renamable $x12, 0 :: (store (s32) into %ir.c)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_value
    ; RV64: liveins: $x10, $x11, $x12
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: $x13 = ADDI $x0, 0
    ; RV64-NEXT: SW $x13, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV64-NEXT: SW $x13, killed renamable $x11, 0 :: (store (s32) into %ir.b)
    ; RV64-NEXT: SW $x13, killed renamable $x12, 0 :: (store (s32) into %ir.c)
    ; RV64-NEXT: PseudoRET
    SW $x0, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    SW $x0, killed renamable $x11, 0 :: (store (s32) into %ir.b)
    SW $x0, killed renamable $x12, 0 :: (store (s32) into %ir.c)
    PseudoRET

...
---
name:            store_common_value_float
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11, $x12, $f16_f

    ; RV32C-LABEL: name: store_common_value_float
    ; RV32C: liveins: $x10, $x11, $x12, $f16_f
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $f15_f = FSGNJ_S $f16_f, $f16_f
    ; RV32C-NEXT: FSW $f15_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV32C-NEXT: FSW $f15_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
    ; RV32C-NEXT: FSW killed $f15_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
    ; RV32C-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_value_float
    ; RV64: liveins: $x10, $x11, $x12, $f16_f
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: FSW renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV64-NEXT: FSW renamable $f16_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
    ; RV64-NEXT: FSW killed renamable $f16_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
    ; RV64-NEXT: PseudoRET
    ;
    ; RV32ZCF-LABEL: name: store_common_value_float
    ; RV32ZCF: liveins: $x10, $x11, $x12, $f16_f
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: $f15_f = FSGNJ_S $f16_f, $f16_f
    ; RV32ZCF-NEXT: FSW $f15_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV32ZCF-NEXT: FSW $f15_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
    ; RV32ZCF-NEXT: FSW killed $f15_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
    ; RV32ZCF-NEXT: PseudoRET
    ;
    ; RV32ZCA-LABEL: name: store_common_value_float
    ; RV32ZCA: liveins: $x10, $x11, $x12, $f16_f
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: FSW renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV32ZCA-NEXT: FSW renamable $f16_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
    ; RV32ZCA-NEXT: FSW killed renamable $f16_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
    ; RV32ZCA-NEXT: PseudoRET
    FSW renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    FSW renamable $f16_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
    FSW killed renamable $f16_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
    PseudoRET

...
---
name:            store_common_value_double
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11, $x12, $f16_d

    ; RV32C-LABEL: name: store_common_value_double
    ; RV32C: liveins: $x10, $x11, $x12, $f16_d
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $f15_d = FSGNJ_D $f16_d, $f16_d
    ; RV32C-NEXT: FSD $f15_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
    ; RV32C-NEXT: FSD $f15_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
    ; RV32C-NEXT: FSD killed $f15_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
    ; RV32C-NEXT: PseudoRET
    ;
    ; RV64C-LABEL: name: store_common_value_double
    ; RV64C: liveins: $x10, $x11, $x12, $f16_d
    ; RV64C-NEXT: {{  $}}
    ; RV64C-NEXT: $f15_d = FSGNJ_D $f16_d, $f16_d
    ; RV64C-NEXT: FSD $f15_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
    ; RV64C-NEXT: FSD $f15_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
    ; RV64C-NEXT: FSD killed $f15_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
    ; RV64C-NEXT: PseudoRET
    ;
    ; RV32ZCF-LABEL: name: store_common_value_double
    ; RV32ZCF: liveins: $x10, $x11, $x12, $f16_d
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: FSD renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
    ; RV32ZCF-NEXT: FSD renamable $f16_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
    ; RV32ZCF-NEXT: FSD killed renamable $f16_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
    ; RV32ZCF-NEXT: PseudoRET
    ;
    ; RV32ZCA-LABEL: name: store_common_value_double
    ; RV32ZCA: liveins: $x10, $x11, $x12, $f16_d
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: FSD renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
    ; RV32ZCA-NEXT: FSD renamable $f16_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
    ; RV32ZCA-NEXT: FSD killed renamable $f16_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
    ; RV32ZCA-NEXT: PseudoRET
    ;
    ; RV64ZCA-LABEL: name: store_common_value_double
    ; RV64ZCA: liveins: $x10, $x11, $x12, $f16_d
    ; RV64ZCA-NEXT: {{  $}}
    ; RV64ZCA-NEXT: FSD renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
    ; RV64ZCA-NEXT: FSD renamable $f16_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
    ; RV64ZCA-NEXT: FSD killed renamable $f16_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
    ; RV64ZCA-NEXT: PseudoRET
    FSD renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
    FSD renamable $f16_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
    FSD killed renamable $f16_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
    PseudoRET

...
---
name:            store_common_ptr
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; RV32-LABEL: name: store_common_ptr
    ; RV32: liveins: $x16
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: renamable $x10 = ADDI $x0, 1
    ; RV32-NEXT: $x11 = ADDI $x16, 0
    ; RV32-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV32-NEXT: renamable $x10 = ADDI $x0, 3
    ; RV32-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV32-NEXT: renamable $x10 = ADDI $x0, 5
    ; RV32-NEXT: SW killed renamable $x10, killed $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_ptr
    ; RV64: liveins: $x16
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $x10 = ADDI $x0, 1
    ; RV64-NEXT: $x11 = ADDI $x16, 0
    ; RV64-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: renamable $x10 = ADDI $x0, 3
    ; RV64-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: renamable $x10 = ADDI $x0, 5
    ; RV64-NEXT: SW killed renamable $x10, killed $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: PseudoRET
    renamable $x10 = ADDI $x0, 1
    SW killed renamable $x10, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    renamable $x10 = ADDI $x0, 3
    SW killed renamable $x10, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    renamable $x10 = ADDI $x0, 5
    SW killed renamable $x10, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    PseudoRET

...
---
name:            store_common_ptr_self
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; RV32-LABEL: name: store_common_ptr_self
    ; RV32: liveins: $x16
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: renamable $x10 = ADDI $x0, 1
    ; RV32-NEXT: $x11 = ADDI $x16, 0
    ; RV32-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV32-NEXT: renamable $x10 = ADDI $x0, 3
    ; RV32-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV32-NEXT: SW killed $x11, $x11, 0 :: (volatile store (s32) into %ir.q)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_ptr_self
    ; RV64: liveins: $x16
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $x10 = ADDI $x0, 1
    ; RV64-NEXT: $x11 = ADDI $x16, 0
    ; RV64-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: renamable $x10 = ADDI $x0, 3
    ; RV64-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: SW killed $x11, $x11, 0 :: (volatile store (s32) into %ir.q)
    ; RV64-NEXT: PseudoRET
    renamable $x10 = ADDI $x0, 1
    SW killed renamable $x10, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    renamable $x10 = ADDI $x0, 3
    SW killed renamable $x10, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    SW killed renamable $x16, renamable $x16, 0 :: (volatile store (s32) into %ir.q)
    PseudoRET

...
---
name:            store_common_ptr_float
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16, $f10_f, $f11_f, $f12_f

    ; RV32C-LABEL: name: store_common_ptr_float
    ; RV32C: liveins: $x16, $f10_f, $f11_f, $f12_f
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $x10 = ADDI $x16, 0
    ; RV32C-NEXT: FSW killed renamable $f10_f, $x10, 0 :: (volatile store (s32) into %ir.p)
    ; RV32C-NEXT: FSW killed renamable $f11_f, $x10, 0 :: (volatile store (s32) into %ir.p)
    ; RV32C-NEXT: FSW killed renamable $f12_f, killed $x10, 0 :: (volatile store (s32) into %ir.p)
    ; RV32C-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_ptr_float
    ; RV64: liveins: $x16, $f10_f, $f11_f, $f12_f
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: FSW killed renamable $f10_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: FSW killed renamable $f11_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: FSW killed renamable $f12_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: PseudoRET
    ;
    ; RV32ZCF-LABEL: name: store_common_ptr_float
    ; RV32ZCF: liveins: $x16, $f10_f, $f11_f, $f12_f
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: $x10 = ADDI $x16, 0
    ; RV32ZCF-NEXT: FSW killed renamable $f10_f, $x10, 0 :: (volatile store (s32) into %ir.p)
    ; RV32ZCF-NEXT: FSW killed renamable $f11_f, $x10, 0 :: (volatile store (s32) into %ir.p)
    ; RV32ZCF-NEXT: FSW killed renamable $f12_f, killed $x10, 0 :: (volatile store (s32) into %ir.p)
    ; RV32ZCF-NEXT: PseudoRET
    ;
    ; RV32ZCA-LABEL: name: store_common_ptr_float
    ; RV32ZCA: liveins: $x16, $f10_f, $f11_f, $f12_f
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: FSW killed renamable $f10_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV32ZCA-NEXT: FSW killed renamable $f11_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV32ZCA-NEXT: FSW killed renamable $f12_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV32ZCA-NEXT: PseudoRET
    FSW killed renamable $f10_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    FSW killed renamable $f11_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    FSW killed renamable $f12_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    PseudoRET

...
---
name:            store_common_ptr_double
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16, $f10_d, $f11_d, $f12_d

    ; RV32C-LABEL: name: store_common_ptr_double
    ; RV32C: liveins: $x16, $f10_d, $f11_d, $f12_d
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $x10 = ADDI $x16, 0
    ; RV32C-NEXT: FSD killed renamable $f10_d, $x10, 0 :: (volatile store (s64) into %ir.p)
    ; RV32C-NEXT: FSD killed renamable $f11_d, $x10, 0 :: (volatile store (s64) into %ir.p)
    ; RV32C-NEXT: FSD killed renamable $f12_d, killed $x10, 0 :: (volatile store (s64) into %ir.p)
    ; RV32C-NEXT: PseudoRET
    ;
    ; RV64C-LABEL: name: store_common_ptr_double
    ; RV64C: liveins: $x16, $f10_d, $f11_d, $f12_d
    ; RV64C-NEXT: {{  $}}
    ; RV64C-NEXT: $x10 = ADDI $x16, 0
    ; RV64C-NEXT: FSD killed renamable $f10_d, $x10, 0 :: (volatile store (s64) into %ir.p)
    ; RV64C-NEXT: FSD killed renamable $f11_d, $x10, 0 :: (volatile store (s64) into %ir.p)
    ; RV64C-NEXT: FSD killed renamable $f12_d, killed $x10, 0 :: (volatile store (s64) into %ir.p)
    ; RV64C-NEXT: PseudoRET
    ;
    ; RV32ZCF-LABEL: name: store_common_ptr_double
    ; RV32ZCF: liveins: $x16, $f10_d, $f11_d, $f12_d
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: FSD killed renamable $f10_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV32ZCF-NEXT: FSD killed renamable $f11_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV32ZCF-NEXT: FSD killed renamable $f12_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV32ZCF-NEXT: PseudoRET
    ;
    ; RV32ZCA-LABEL: name: store_common_ptr_double
    ; RV32ZCA: liveins: $x16, $f10_d, $f11_d, $f12_d
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: FSD killed renamable $f10_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV32ZCA-NEXT: FSD killed renamable $f11_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV32ZCA-NEXT: FSD killed renamable $f12_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV32ZCA-NEXT: PseudoRET
    ;
    ; RV64ZCA-LABEL: name: store_common_ptr_double
    ; RV64ZCA: liveins: $x16, $f10_d, $f11_d, $f12_d
    ; RV64ZCA-NEXT: {{  $}}
    ; RV64ZCA-NEXT: FSD killed renamable $f10_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV64ZCA-NEXT: FSD killed renamable $f11_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV64ZCA-NEXT: FSD killed renamable $f12_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV64ZCA-NEXT: PseudoRET
    FSD killed renamable $f10_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    FSD killed renamable $f11_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    FSD killed renamable $f12_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    PseudoRET

...
---
name:            load_common_ptr
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; RV32-LABEL: name: load_common_ptr
    ; RV32: liveins: $x16
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: $x11 = ADDI $x16, 0
    ; RV32-NEXT: dead renamable $x10 = LW $x11, 0 :: (volatile load (s32) from %ir.p)
    ; RV32-NEXT: dead renamable $x10 = LW $x11, 0 :: (volatile load (s32) from %ir.p)
    ; RV32-NEXT: dead renamable $x10 = LW killed $x11, 0 :: (volatile load (s32) from %ir.p)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: load_common_ptr
    ; RV64: liveins: $x16
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: $x11 = ADDI $x16, 0
    ; RV64-NEXT: dead renamable $x10 = LW $x11, 0 :: (volatile load (s32) from %ir.p)
    ; RV64-NEXT: dead renamable $x10 = LW $x11, 0 :: (volatile load (s32) from %ir.p)
    ; RV64-NEXT: dead renamable $x10 = LW killed $x11, 0 :: (volatile load (s32) from %ir.p)
    ; RV64-NEXT: PseudoRET
    dead renamable $x10 = LW renamable $x16, 0 :: (volatile load (s32) from %ir.p)
    dead renamable $x10 = LW renamable $x16, 0 :: (volatile load (s32) from %ir.p)
    dead renamable $x10 = LW killed renamable $x16, 0 :: (volatile load (s32) from %ir.p)
    PseudoRET

...
---
name:            load_common_ptr_float
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; RV32C-LABEL: name: load_common_ptr_float
    ; RV32C: liveins: $x16
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $x10 = ADDI $x16, 0
    ; RV32C-NEXT: renamable $f10_f = FLW $x10, 0 :: (load (s32) from %ir.g)
    ; RV32C-NEXT: renamable $f11_f = FLW $x10, 4 :: (load (s32) from %ir.arrayidx1)
    ; RV32C-NEXT: renamable $f12_f = FLW killed $x10, 8 :: (load (s32) from %ir.arrayidx2)
    ; RV32C-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
    ;
    ; RV64-LABEL: name: load_common_ptr_float
    ; RV64: liveins: $x16
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $f10_f = FLW renamable $x16, 0 :: (load (s32) from %ir.g)
    ; RV64-NEXT: renamable $f11_f = FLW renamable $x16, 4 :: (load (s32) from %ir.arrayidx1)
    ; RV64-NEXT: renamable $f12_f = FLW killed renamable $x16, 8 :: (load (s32) from %ir.arrayidx2)
    ; RV64-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
    ;
    ; RV32ZCF-LABEL: name: load_common_ptr_float
    ; RV32ZCF: liveins: $x16
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: $x10 = ADDI $x16, 0
    ; RV32ZCF-NEXT: renamable $f10_f = FLW $x10, 0 :: (load (s32) from %ir.g)
    ; RV32ZCF-NEXT: renamable $f11_f = FLW $x10, 4 :: (load (s32) from %ir.arrayidx1)
    ; RV32ZCF-NEXT: renamable $f12_f = FLW killed $x10, 8 :: (load (s32) from %ir.arrayidx2)
    ; RV32ZCF-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
    ;
    ; RV32ZCA-LABEL: name: load_common_ptr_float
    ; RV32ZCA: liveins: $x16
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: renamable $f10_f = FLW renamable $x16, 0 :: (load (s32) from %ir.g)
    ; RV32ZCA-NEXT: renamable $f11_f = FLW renamable $x16, 4 :: (load (s32) from %ir.arrayidx1)
    ; RV32ZCA-NEXT: renamable $f12_f = FLW killed renamable $x16, 8 :: (load (s32) from %ir.arrayidx2)
    ; RV32ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
    renamable $f10_f = FLW renamable $x16, 0 :: (load (s32) from %ir.g)
    renamable $f11_f = FLW renamable $x16, 4 :: (load (s32) from %ir.arrayidx1)
    renamable $f12_f = FLW killed renamable $x16, 8 :: (load (s32) from %ir.arrayidx2)
    PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f

...
---
name:            load_common_ptr_double
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; RV32C-LABEL: name: load_common_ptr_double
    ; RV32C: liveins: $x16
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $x10 = ADDI $x16, 0
    ; RV32C-NEXT: renamable $f10_d = FLD $x10, 0 :: (load (s64) from %ir.g)
    ; RV32C-NEXT: renamable $f11_d = FLD $x10, 8 :: (load (s64) from %ir.arrayidx1)
    ; RV32C-NEXT: renamable $f12_d = FLD killed $x10, 16 :: (load (s64) from %ir.arrayidx2)
    ; RV32C-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    ;
    ; RV64C-LABEL: name: load_common_ptr_double
    ; RV64C: liveins: $x16
    ; RV64C-NEXT: {{  $}}
    ; RV64C-NEXT: $x10 = ADDI $x16, 0
    ; RV64C-NEXT: renamable $f10_d = FLD $x10, 0 :: (load (s64) from %ir.g)
    ; RV64C-NEXT: renamable $f11_d = FLD $x10, 8 :: (load (s64) from %ir.arrayidx1)
    ; RV64C-NEXT: renamable $f12_d = FLD killed $x10, 16 :: (load (s64) from %ir.arrayidx2)
    ; RV64C-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    ;
    ; RV32ZCF-LABEL: name: load_common_ptr_double
    ; RV32ZCF: liveins: $x16
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: renamable $f10_d = FLD renamable $x16, 0 :: (load (s64) from %ir.g)
    ; RV32ZCF-NEXT: renamable $f11_d = FLD renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)
    ; RV32ZCF-NEXT: renamable $f12_d = FLD killed renamable $x16, 16 :: (load (s64) from %ir.arrayidx2)
    ; RV32ZCF-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    ;
    ; RV32ZCA-LABEL: name: load_common_ptr_double
    ; RV32ZCA: liveins: $x16
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: renamable $f10_d = FLD renamable $x16, 0 :: (load (s64) from %ir.g)
    ; RV32ZCA-NEXT: renamable $f11_d = FLD renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)
    ; RV32ZCA-NEXT: renamable $f12_d = FLD killed renamable $x16, 16 :: (load (s64) from %ir.arrayidx2)
    ; RV32ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    ;
    ; RV64ZCA-LABEL: name: load_common_ptr_double
    ; RV64ZCA: liveins: $x16
    ; RV64ZCA-NEXT: {{  $}}
    ; RV64ZCA-NEXT: renamable $f10_d = FLD renamable $x16, 0 :: (load (s64) from %ir.g)
    ; RV64ZCA-NEXT: renamable $f11_d = FLD renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)
    ; RV64ZCA-NEXT: renamable $f12_d = FLD killed renamable $x16, 16 :: (load (s64) from %ir.arrayidx2)
    ; RV64ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    renamable $f10_d = FLD renamable $x16, 0 :: (load (s64) from %ir.g)
    renamable $f11_d = FLD renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)
    renamable $f12_d = FLD killed renamable $x16, 16 :: (load (s64) from %ir.arrayidx2)
    PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d

...
---
name:            store_large_offset
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10

    ; RV32-LABEL: name: store_large_offset
    ; RV32: liveins: $x10
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: renamable $x11 = ADDI $x0, 1
    ; RV32-NEXT: $x12 = ADDI $x10, 384
    ; RV32-NEXT: SW killed renamable $x11, $x12, 16 :: (volatile store (s32) into %ir.0)
    ; RV32-NEXT: renamable $x11 = ADDI $x0, 3
    ; RV32-NEXT: SW killed renamable $x11, $x12, 20 :: (volatile store (s32) into %ir.1)
    ; RV32-NEXT: renamable $x11 = ADDI $x0, 5
    ; RV32-NEXT: SW killed renamable $x11, $x12, 24 :: (volatile store (s32) into %ir.2)
    ; RV32-NEXT: renamable $x11 = ADDI $x0, 7
    ; RV32-NEXT: SW killed renamable $x11, killed $x12, 28 :: (volatile store (s32) into %ir.3)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_large_offset
    ; RV64: liveins: $x10
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $x11 = ADDI $x0, 1
    ; RV64-NEXT: $x12 = ADDI $x10, 384
    ; RV64-NEXT: SW killed renamable $x11, $x12, 16 :: (volatile store (s32) into %ir.0)
    ; RV64-NEXT: renamable $x11 = ADDI $x0, 3
    ; RV64-NEXT: SW killed renamable $x11, $x12, 20 :: (volatile store (s32) into %ir.1)
    ; RV64-NEXT: renamable $x11 = ADDI $x0, 5
    ; RV64-NEXT: SW killed renamable $x11, $x12, 24 :: (volatile store (s32) into %ir.2)
    ; RV64-NEXT: renamable $x11 = ADDI $x0, 7
    ; RV64-NEXT: SW killed renamable $x11, killed $x12, 28 :: (volatile store (s32) into %ir.3)
    ; RV64-NEXT: PseudoRET
    renamable $x11 = ADDI $x0, 1
    SW killed renamable $x11, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    renamable $x11 = ADDI $x0, 3
    SW killed renamable $x11, renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    renamable $x11 = ADDI $x0, 5
    SW killed renamable $x11, renamable $x10, 408 :: (volatile store (s32) into %ir.2)
    renamable $x11 = ADDI $x0, 7
    SW killed renamable $x11, killed renamable $x10, 412 :: (volatile store (s32) into %ir.3)
    PseudoRET

...
---
name:            store_large_offset_float
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f

    ; RV32C-LABEL: name: store_large_offset_float
    ; RV32C: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $x11 = ADDI $x10, 384
    ; RV32C-NEXT: FSW killed renamable $f10_f, $x11, 16 :: (volatile store (s32) into %ir.0)
    ; RV32C-NEXT: FSW killed renamable $f11_f, $x11, 20 :: (volatile store (s32) into %ir.1)
    ; RV32C-NEXT: FSW killed renamable $f12_f, $x11, 24 :: (volatile store (s32) into %ir.2)
    ; RV32C-NEXT: FSW killed renamable $f13_f, killed $x11, 28 :: (volatile store (s32) into %ir.3)
    ; RV32C-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_large_offset_float
    ; RV64: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    ; RV64-NEXT: FSW killed renamable $f11_f, renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    ; RV64-NEXT: FSW killed renamable $f12_f, renamable $x10, 408 :: (volatile store (s32) into %ir.2)
    ; RV64-NEXT: FSW killed renamable $f13_f, killed renamable $x10, 412 :: (volatile store (s32) into %ir.3)
    ; RV64-NEXT: PseudoRET
    ;
    ; RV32ZCF-LABEL: name: store_large_offset_float
    ; RV32ZCF: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: $x11 = ADDI $x10, 384
    ; RV32ZCF-NEXT: FSW killed renamable $f10_f, $x11, 16 :: (volatile store (s32) into %ir.0)
    ; RV32ZCF-NEXT: FSW killed renamable $f11_f, $x11, 20 :: (volatile store (s32) into %ir.1)
    ; RV32ZCF-NEXT: FSW killed renamable $f12_f, $x11, 24 :: (volatile store (s32) into %ir.2)
    ; RV32ZCF-NEXT: FSW killed renamable $f13_f, killed $x11, 28 :: (volatile store (s32) into %ir.3)
    ; RV32ZCF-NEXT: PseudoRET
    ;
    ; RV32ZCA-LABEL: name: store_large_offset_float
    ; RV32ZCA: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    ; RV32ZCA-NEXT: FSW killed renamable $f11_f, renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    ; RV32ZCA-NEXT: FSW killed renamable $f12_f, renamable $x10, 408 :: (volatile store (s32) into %ir.2)
    ; RV32ZCA-NEXT: FSW killed renamable $f13_f, killed renamable $x10, 412 :: (volatile store (s32) into %ir.3)
    ; RV32ZCA-NEXT: PseudoRET
    FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    FSW killed renamable $f11_f, renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    FSW killed renamable $f12_f, renamable $x10, 408 :: (volatile store (s32) into %ir.2)
    FSW killed renamable $f13_f, killed renamable $x10, 412 :: (volatile store (s32) into %ir.3)
    PseudoRET

...
---
name:            store_large_offset_double
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d

    ; RV32C-LABEL: name: store_large_offset_double
    ; RV32C: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $x11 = ADDI $x10, 768
    ; RV32C-NEXT: FSD killed renamable $f10_d, $x11, 32 :: (volatile store (s64) into %ir.0)
    ; RV32C-NEXT: FSD killed renamable $f11_d, $x11, 40 :: (volatile store (s64) into %ir.1)
    ; RV32C-NEXT: FSD killed renamable $f12_d, $x11, 48 :: (volatile store (s64) into %ir.2)
    ; RV32C-NEXT: FSD killed renamable $f13_d, killed $x11, 56 :: (volatile store (s64) into %ir.3)
    ; RV32C-NEXT: PseudoRET
    ;
    ; RV64C-LABEL: name: store_large_offset_double
    ; RV64C: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
    ; RV64C-NEXT: {{  $}}
    ; RV64C-NEXT: $x11 = ADDI $x10, 768
    ; RV64C-NEXT: FSD killed renamable $f10_d, $x11, 32 :: (volatile store (s64) into %ir.0)
    ; RV64C-NEXT: FSD killed renamable $f11_d, $x11, 40 :: (volatile store (s64) into %ir.1)
    ; RV64C-NEXT: FSD killed renamable $f12_d, $x11, 48 :: (volatile store (s64) into %ir.2)
    ; RV64C-NEXT: FSD killed renamable $f13_d, killed $x11, 56 :: (volatile store (s64) into %ir.3)
    ; RV64C-NEXT: PseudoRET
    ;
    ; RV32ZCF-LABEL: name: store_large_offset_double
    ; RV32ZCF: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
    ; RV32ZCF-NEXT: FSD killed renamable $f11_d, renamable $x10, 808 :: (volatile store (s64) into %ir.1)
    ; RV32ZCF-NEXT: FSD killed renamable $f12_d, renamable $x10, 816 :: (volatile store (s64) into %ir.2)
    ; RV32ZCF-NEXT: FSD killed renamable $f13_d, killed renamable $x10, 824 :: (volatile store (s64) into %ir.3)
    ; RV32ZCF-NEXT: PseudoRET
    ;
    ; RV32ZCA-LABEL: name: store_large_offset_double
    ; RV32ZCA: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
    ; RV32ZCA-NEXT: FSD killed renamable $f11_d, renamable $x10, 808 :: (volatile store (s64) into %ir.1)
    ; RV32ZCA-NEXT: FSD killed renamable $f12_d, renamable $x10, 816 :: (volatile store (s64) into %ir.2)
    ; RV32ZCA-NEXT: FSD killed renamable $f13_d, killed renamable $x10, 824 :: (volatile store (s64) into %ir.3)
    ; RV32ZCA-NEXT: PseudoRET
    ;
    ; RV64ZCA-LABEL: name: store_large_offset_double
    ; RV64ZCA: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
    ; RV64ZCA-NEXT: {{  $}}
    ; RV64ZCA-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
    ; RV64ZCA-NEXT: FSD killed renamable $f11_d, renamable $x10, 808 :: (volatile store (s64) into %ir.1)
    ; RV64ZCA-NEXT: FSD killed renamable $f12_d, renamable $x10, 816 :: (volatile store (s64) into %ir.2)
    ; RV64ZCA-NEXT: FSD killed renamable $f13_d, killed renamable $x10, 824 :: (volatile store (s64) into %ir.3)
    ; RV64ZCA-NEXT: PseudoRET
    FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
    FSD killed renamable $f11_d, renamable $x10, 808 :: (volatile store (s64) into %ir.1)
    FSD killed renamable $f12_d, renamable $x10, 816 :: (volatile store (s64) into %ir.2)
    FSD killed renamable $f13_d, killed renamable $x10, 824 :: (volatile store (s64) into %ir.3)
    PseudoRET

...
---
name:            load_large_offset
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10

    ; RV32-LABEL: name: load_large_offset
    ; RV32: liveins: $x10
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: $x12 = ADDI $x10, 384
    ; RV32-NEXT: dead renamable $x11 = LW $x12, 16 :: (volatile load (s32) from %ir.0)
    ; RV32-NEXT: dead renamable $x11 = LW $x12, 20 :: (volatile load (s32) from %ir.1)
    ; RV32-NEXT: dead renamable $x11 = LW $x12, 24 :: (volatile load (s32) from %ir.2)
    ; RV32-NEXT: dead renamable $x10 = LW killed $x12, 28 :: (volatile load (s32) from %ir.3)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: load_large_offset
    ; RV64: liveins: $x10
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: $x12 = ADDI $x10, 384
    ; RV64-NEXT: dead renamable $x11 = LW $x12, 16 :: (volatile load (s32) from %ir.0)
    ; RV64-NEXT: dead renamable $x11 = LW $x12, 20 :: (volatile load (s32) from %ir.1)
    ; RV64-NEXT: dead renamable $x11 = LW $x12, 24 :: (volatile load (s32) from %ir.2)
    ; RV64-NEXT: dead renamable $x10 = LW killed $x12, 28 :: (volatile load (s32) from %ir.3)
    ; RV64-NEXT: PseudoRET
    dead renamable $x11 = LW renamable $x10, 400 :: (volatile load (s32) from %ir.0)
    dead renamable $x11 = LW renamable $x10, 404 :: (volatile load (s32) from %ir.1)
    dead renamable $x11 = LW renamable $x10, 408 :: (volatile load (s32) from %ir.2)
    dead renamable $x10 = LW killed renamable $x10, 412 :: (volatile load (s32) from %ir.3)
    PseudoRET

...
---
name:            load_large_offset_float
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10

    ; RV32C-LABEL: name: load_large_offset_float
    ; RV32C: liveins: $x10
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $x11 = ADDI $x10, 384
    ; RV32C-NEXT: renamable $f10_f = FLW $x11, 16 :: (load (s32) from %ir.arrayidx)
    ; RV32C-NEXT: renamable $f11_f = FLW $x11, 20 :: (load (s32) from %ir.arrayidx1)
    ; RV32C-NEXT: renamable $f12_f = FLW killed $x11, 24 :: (load (s32) from %ir.arrayidx2)
    ; RV32C-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
    ;
    ; RV64-LABEL: name: load_large_offset_float
    ; RV64: liveins: $x10
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
    ; RV64-NEXT: renamable $f11_f = FLW renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
    ; RV64-NEXT: renamable $f12_f = FLW killed renamable $x10, 408 :: (load (s32) from %ir.arrayidx2)
    ; RV64-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
    ;
    ; RV32ZCF-LABEL: name: load_large_offset_float
    ; RV32ZCF: liveins: $x10
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: $x11 = ADDI $x10, 384
    ; RV32ZCF-NEXT: renamable $f10_f = FLW $x11, 16 :: (load (s32) from %ir.arrayidx)
    ; RV32ZCF-NEXT: renamable $f11_f = FLW $x11, 20 :: (load (s32) from %ir.arrayidx1)
    ; RV32ZCF-NEXT: renamable $f12_f = FLW killed $x11, 24 :: (load (s32) from %ir.arrayidx2)
    ; RV32ZCF-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
    ;
    ; RV32ZCA-LABEL: name: load_large_offset_float
    ; RV32ZCA: liveins: $x10
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
    ; RV32ZCA-NEXT: renamable $f11_f = FLW renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
    ; RV32ZCA-NEXT: renamable $f12_f = FLW killed renamable $x10, 408 :: (load (s32) from %ir.arrayidx2)
    ; RV32ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
    renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
    renamable $f11_f = FLW renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
    renamable $f12_f = FLW killed renamable $x10, 408 :: (load (s32) from %ir.arrayidx2)
    PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f

...
---
name:            load_large_offset_double
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10

    ; RV32C-LABEL: name: load_large_offset_double
    ; RV32C: liveins: $x10
    ; RV32C-NEXT: {{  $}}
    ; RV32C-NEXT: $x11 = ADDI $x10, 768
    ; RV32C-NEXT: renamable $f10_d = FLD $x11, 32 :: (load (s64) from %ir.arrayidx)
    ; RV32C-NEXT: renamable $f11_d = FLD $x11, 40 :: (load (s64) from %ir.arrayidx1)
    ; RV32C-NEXT: renamable $f12_d = FLD killed $x11, 48 :: (load (s64) from %ir.arrayidx2)
    ; RV32C-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    ;
    ; RV64C-LABEL: name: load_large_offset_double
    ; RV64C: liveins: $x10
    ; RV64C-NEXT: {{  $}}
    ; RV64C-NEXT: $x11 = ADDI $x10, 768
    ; RV64C-NEXT: renamable $f10_d = FLD $x11, 32 :: (load (s64) from %ir.arrayidx)
    ; RV64C-NEXT: renamable $f11_d = FLD $x11, 40 :: (load (s64) from %ir.arrayidx1)
    ; RV64C-NEXT: renamable $f12_d = FLD killed $x11, 48 :: (load (s64) from %ir.arrayidx2)
    ; RV64C-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    ;
    ; RV32ZCF-LABEL: name: load_large_offset_double
    ; RV32ZCF: liveins: $x10
    ; RV32ZCF-NEXT: {{  $}}
    ; RV32ZCF-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
    ; RV32ZCF-NEXT: renamable $f11_d = FLD renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
    ; RV32ZCF-NEXT: renamable $f12_d = FLD killed renamable $x10, 816 :: (load (s64) from %ir.arrayidx2)
    ; RV32ZCF-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    ;
    ; RV32ZCA-LABEL: name: load_large_offset_double
    ; RV32ZCA: liveins: $x10
    ; RV32ZCA-NEXT: {{  $}}
    ; RV32ZCA-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
    ; RV32ZCA-NEXT: renamable $f11_d = FLD renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
    ; RV32ZCA-NEXT: renamable $f12_d = FLD killed renamable $x10, 816 :: (load (s64) from %ir.arrayidx2)
    ; RV32ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    ;
    ; RV64ZCA-LABEL: name: load_large_offset_double
    ; RV64ZCA: liveins: $x10
    ; RV64ZCA-NEXT: {{  $}}
    ; RV64ZCA-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
    ; RV64ZCA-NEXT: renamable $f11_d = FLD renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
    ; RV64ZCA-NEXT: renamable $f12_d = FLD killed renamable $x10, 816 :: (load (s64) from %ir.arrayidx2)
    ; RV64ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
    renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
    renamable $f11_d = FLD renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
    renamable $f12_d = FLD killed renamable $x10, 816 :: (load (s64) from %ir.arrayidx2)
    PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d

...
---
name:            store_common_value_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10

    ; RV32-LABEL: name: store_common_value_no_opt
    ; RV32: liveins: $x10
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: SW $x0, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_value_no_opt
    ; RV64: liveins: $x10
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: SW $x0, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV64-NEXT: PseudoRET
    SW $x0, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    PseudoRET

...
---
name:            store_common_value_float_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f16_f

    ; RV32-LABEL: name: store_common_value_float_no_opt
    ; RV32: liveins: $x10, $f16_f
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: FSW killed renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_value_float_no_opt
    ; RV64: liveins: $x10, $f16_f
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: FSW killed renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    ; RV64-NEXT: PseudoRET
    FSW killed renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
    PseudoRET

...
---
name:            store_common_value_double_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f16_d

    ; RV32-LABEL: name: store_common_value_double_no_opt
    ; RV32: liveins: $x10, $f16_d
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: FSD killed renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_value_double_no_opt
    ; RV64: liveins: $x10, $f16_d
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: FSD killed renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
    ; RV64-NEXT: PseudoRET
    FSD killed renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
    PseudoRET

...
---
name:            store_common_ptr_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; RV32-LABEL: name: store_common_ptr_no_opt
    ; RV32: liveins: $x16
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: renamable $x10 = ADDI $x0, 1
    ; RV32-NEXT: SW killed renamable $x10, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_ptr_no_opt
    ; RV64: liveins: $x16
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $x10 = ADDI $x0, 1
    ; RV64-NEXT: SW killed renamable $x10, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: PseudoRET
    renamable $x10 = ADDI $x0, 1
    SW killed renamable $x10, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    PseudoRET

...
---
name:            store_common_ptr_float_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16, $f10_f

    ; RV32-LABEL: name: store_common_ptr_float_no_opt
    ; RV32: liveins: $x16, $f10_f
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: FSW killed renamable $f10_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_ptr_float_no_opt
    ; RV64: liveins: $x16, $f10_f
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: FSW killed renamable $f10_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    ; RV64-NEXT: PseudoRET
    FSW killed renamable $f10_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
    PseudoRET

...
---
name:            store_common_ptr_double_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16, $f10_d

    ; RV32-LABEL: name: store_common_ptr_double_no_opt
    ; RV32: liveins: $x16, $f10_d
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: FSD killed renamable $f10_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_common_ptr_double_no_opt
    ; RV64: liveins: $x16, $f10_d
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: FSD killed renamable $f10_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    ; RV64-NEXT: PseudoRET
    FSD killed renamable $f10_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
    PseudoRET

...
---
name:            load_common_ptr_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; RV32-LABEL: name: load_common_ptr_no_opt
    ; RV32: liveins: $x16
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: dead renamable $x10 = LW killed renamable $x16, 0 :: (volatile load (s32) from %ir.p)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: load_common_ptr_no_opt
    ; RV64: liveins: $x16
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: dead renamable $x10 = LW killed renamable $x16, 0 :: (volatile load (s32) from %ir.p)
    ; RV64-NEXT: PseudoRET
    dead renamable $x10 = LW killed renamable $x16, 0 :: (volatile load (s32) from %ir.p)
    PseudoRET

...
---
name:            load_common_ptr_float_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; RV32-LABEL: name: load_common_ptr_float_no_opt
    ; RV32: liveins: $x16
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: renamable $f10_f = FLW killed renamable $x16, 0 :: (load (s32) from %ir.g)
    ; RV32-NEXT: PseudoRET implicit $f10_f
    ;
    ; RV64-LABEL: name: load_common_ptr_float_no_opt
    ; RV64: liveins: $x16
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $f10_f = FLW killed renamable $x16, 0 :: (load (s32) from %ir.g)
    ; RV64-NEXT: PseudoRET implicit $f10_f
    renamable $f10_f = FLW killed renamable $x16, 0 :: (load (s32) from %ir.g)
    PseudoRET implicit $f10_f

...
---
name:            load_common_ptr_double_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; RV32-LABEL: name: load_common_ptr_double_no_opt
    ; RV32: liveins: $x16
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: renamable $f10_d = FLD killed renamable $x16, 0 :: (load (s64) from %ir.g)
    ; RV32-NEXT: PseudoRET implicit $f10_d
    ;
    ; RV64-LABEL: name: load_common_ptr_double_no_opt
    ; RV64: liveins: $x16
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $f10_d = FLD killed renamable $x16, 0 :: (load (s64) from %ir.g)
    ; RV64-NEXT: PseudoRET implicit $f10_d
    renamable $f10_d = FLD killed renamable $x16, 0 :: (load (s64) from %ir.g)
    PseudoRET implicit $f10_d

...
---
name:            store_large_offset_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10

    ; RV32-LABEL: name: store_large_offset_no_opt
    ; RV32: liveins: $x10
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: renamable $x11 = ADDI $x0, 1
    ; RV32-NEXT: SW killed renamable $x11, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    ; RV32-NEXT: renamable $x11 = ADDI $x0, 3
    ; RV32-NEXT: SW killed renamable $x11, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_large_offset_no_opt
    ; RV64: liveins: $x10
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $x11 = ADDI $x0, 1
    ; RV64-NEXT: SW killed renamable $x11, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    ; RV64-NEXT: renamable $x11 = ADDI $x0, 3
    ; RV64-NEXT: SW killed renamable $x11, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    ; RV64-NEXT: PseudoRET
    renamable $x11 = ADDI $x0, 1
    SW killed renamable $x11, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    renamable $x11 = ADDI $x0, 3
    SW killed renamable $x11, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    PseudoRET

...
---
name:            store_large_offset_float_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f10_f, $f11_f

    ; RV32-LABEL: name: store_large_offset_float_no_opt
    ; RV32: liveins: $x10, $f10_f, $f11_f
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    ; RV32-NEXT: FSW killed renamable $f11_f, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_large_offset_float_no_opt
    ; RV64: liveins: $x10, $f10_f, $f11_f
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    ; RV64-NEXT: FSW killed renamable $f11_f, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    ; RV64-NEXT: PseudoRET
    FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
    FSW killed renamable $f11_f, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
    PseudoRET

...
---
name:            store_large_offset_double_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f10_d, $f11_d

    ; RV32-LABEL: name: store_large_offset_double_no_opt
    ; RV32: liveins: $x10, $f10_d, $f11_d
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
    ; RV32-NEXT: FSD killed renamable $f11_d, killed renamable $x10, 808 :: (volatile store (s64) into %ir.1)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: store_large_offset_double_no_opt
    ; RV64: liveins: $x10, $f10_d, $f11_d
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
    ; RV64-NEXT: FSD killed renamable $f11_d, killed renamable $x10, 808 :: (volatile store (s64) into %ir.1)
    ; RV64-NEXT: PseudoRET
    FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
    FSD killed renamable $f11_d, killed renamable $x10, 808 :: (volatile store (s64) into %ir.1)
    PseudoRET

...
---
name:            load_large_offset_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10

    ; RV32-LABEL: name: load_large_offset_no_opt
    ; RV32: liveins: $x10
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: dead renamable $x11 = LW renamable $x10, 400 :: (volatile load (s32) from %ir.0)
    ; RV32-NEXT: dead renamable $x10 = LW killed renamable $x10, 404 :: (volatile load (s32) from %ir.1)
    ; RV32-NEXT: PseudoRET
    ;
    ; RV64-LABEL: name: load_large_offset_no_opt
    ; RV64: liveins: $x10
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: dead renamable $x11 = LW renamable $x10, 400 :: (volatile load (s32) from %ir.0)
    ; RV64-NEXT: dead renamable $x10 = LW killed renamable $x10, 404 :: (volatile load (s32) from %ir.1)
    ; RV64-NEXT: PseudoRET
    dead renamable $x11 = LW renamable $x10, 400 :: (volatile load (s32) from %ir.0)
    dead renamable $x10 = LW killed renamable $x10, 404 :: (volatile load (s32) from %ir.1)
    PseudoRET

...
---
name:            load_large_offset_float_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10

    ; RV32-LABEL: name: load_large_offset_float_no_opt
    ; RV32: liveins: $x10
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
    ; RV32-NEXT: renamable $f11_f = FLW killed renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
    ; RV32-NEXT: PseudoRET implicit $f10_f, implicit $f11_f
    ;
    ; RV64-LABEL: name: load_large_offset_float_no_opt
    ; RV64: liveins: $x10
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
    ; RV64-NEXT: renamable $f11_f = FLW killed renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
    ; RV64-NEXT: PseudoRET implicit $f10_f, implicit $f11_f
    renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
    renamable $f11_f = FLW killed renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
    PseudoRET implicit $f10_f, implicit $f11_f

...
---
name:            load_large_offset_double_no_opt
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10

    ; RV32-LABEL: name: load_large_offset_double_no_opt
    ; RV32: liveins: $x10
    ; RV32-NEXT: {{  $}}
    ; RV32-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
    ; RV32-NEXT: renamable $f11_d = FLD killed renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
    ; RV32-NEXT: PseudoRET implicit $f10_d, implicit $f11_d
    ;
    ; RV64-LABEL: name: load_large_offset_double_no_opt
    ; RV64: liveins: $x10
    ; RV64-NEXT: {{  $}}
    ; RV64-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
    ; RV64-NEXT: renamable $f11_d = FLD killed renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
    ; RV64-NEXT: PseudoRET implicit $f10_d, implicit $f11_d
    renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
    renamable $f11_d = FLD killed renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
    PseudoRET implicit $f10_d, implicit $f11_d

...