1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ 3; RUN: | FileCheck %s -check-prefix=RV32I 4; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 5; RUN: | FileCheck %s -check-prefix=RV64I 6; 7; Before getExceptionPointerRegister() and getExceptionSelectorRegister() 8; lowering hooks were defined this would trigger an assertion during live 9; variable analysis 10 11declare void @foo(i1* %p); 12declare void @bar(i1* %p); 13declare dso_local i32 @__gxx_personality_v0(...) 14 15define void @caller(i1* %p) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 16; RV32I-LABEL: caller: 17; RV32I: # %bb.0: # %entry 18; RV32I-NEXT: addi sp, sp, -16 19; RV32I-NEXT: .cfi_def_cfa_offset 16 20; RV32I-NEXT: sw ra, 12(sp) 21; RV32I-NEXT: sw s0, 8(sp) 22; RV32I-NEXT: sw s1, 4(sp) 23; RV32I-NEXT: .cfi_offset ra, -4 24; RV32I-NEXT: .cfi_offset s0, -8 25; RV32I-NEXT: .cfi_offset s1, -12 26; RV32I-NEXT: mv s0, a0 27; RV32I-NEXT: beqz a0, .LBB0_2 28; RV32I-NEXT: # %bb.1: # %bb2 29; RV32I-NEXT: .Ltmp0: 30; RV32I-NEXT: mv a0, s0 31; RV32I-NEXT: call bar 32; RV32I-NEXT: .Ltmp1: 33; RV32I-NEXT: j .LBB0_3 34; RV32I-NEXT: .LBB0_2: # %bb1 35; RV32I-NEXT: .Ltmp2: 36; RV32I-NEXT: mv a0, s0 37; RV32I-NEXT: call foo 38; RV32I-NEXT: .Ltmp3: 39; RV32I-NEXT: .LBB0_3: # %end2 40; RV32I-NEXT: lw s1, 4(sp) 41; RV32I-NEXT: lw s0, 8(sp) 42; RV32I-NEXT: lw ra, 12(sp) 43; RV32I-NEXT: .cfi_restore ra 44; RV32I-NEXT: .cfi_restore s0 45; RV32I-NEXT: .cfi_restore s1 46; RV32I-NEXT: addi sp, sp, 16 47; RV32I-NEXT: .cfi_def_cfa_offset 0 48; RV32I-NEXT: ret 49; RV32I-NEXT: .LBB0_4: # %lpad 50; RV32I-NEXT: .Ltmp4: 51; RV32I-NEXT: mv s1, a0 52; RV32I-NEXT: mv a0, s0 53; RV32I-NEXT: call callee 54; RV32I-NEXT: mv a0, s1 55; RV32I-NEXT: call _Unwind_Resume 56; 57; RV64I-LABEL: caller: 58; RV64I: # %bb.0: # %entry 59; RV64I-NEXT: addi sp, sp, -32 60; RV64I-NEXT: .cfi_def_cfa_offset 32 61; RV64I-NEXT: sd ra, 24(sp) 62; RV64I-NEXT: sd s0, 16(sp) 63; RV64I-NEXT: sd s1, 8(sp) 64; RV64I-NEXT: .cfi_offset ra, -8 65; RV64I-NEXT: .cfi_offset s0, -16 66; RV64I-NEXT: .cfi_offset s1, -24 67; RV64I-NEXT: mv s0, a0 68; RV64I-NEXT: beqz a0, .LBB0_2 69; RV64I-NEXT: # %bb.1: # %bb2 70; RV64I-NEXT: .Ltmp0: 71; RV64I-NEXT: mv a0, s0 72; RV64I-NEXT: call bar 73; RV64I-NEXT: .Ltmp1: 74; RV64I-NEXT: j .LBB0_3 75; RV64I-NEXT: .LBB0_2: # %bb1 76; RV64I-NEXT: .Ltmp2: 77; RV64I-NEXT: mv a0, s0 78; RV64I-NEXT: call foo 79; RV64I-NEXT: .Ltmp3: 80; RV64I-NEXT: .LBB0_3: # %end2 81; RV64I-NEXT: ld s1, 8(sp) 82; RV64I-NEXT: ld s0, 16(sp) 83; RV64I-NEXT: ld ra, 24(sp) 84; RV64I-NEXT: .cfi_restore ra 85; RV64I-NEXT: .cfi_restore s0 86; RV64I-NEXT: .cfi_restore s1 87; RV64I-NEXT: addi sp, sp, 32 88; RV64I-NEXT: .cfi_def_cfa_offset 0 89; RV64I-NEXT: ret 90; RV64I-NEXT: .LBB0_4: # %lpad 91; RV64I-NEXT: .Ltmp4: 92; RV64I-NEXT: mv s1, a0 93; RV64I-NEXT: mv a0, s0 94; RV64I-NEXT: call callee 95; RV64I-NEXT: mv a0, s1 96; RV64I-NEXT: call _Unwind_Resume 97entry: 98 %0 = icmp eq i1* %p, null 99 br i1 %0, label %bb1, label %bb2 100 101bb1: 102 invoke void @foo(i1* %p) to label %end1 unwind label %lpad 103 104bb2: 105 invoke void @bar(i1* %p) to label %end2 unwind label %lpad 106 107lpad: 108 %1 = landingpad { i8*, i32 } cleanup 109 call void @callee(i1* %p) 110 resume { i8*, i32 } %1 111 112end1: 113 ret void 114 115end2: 116 ret void 117} 118 119define internal void @callee(i1* %p) { 120; RV32I-LABEL: callee: 121; RV32I: # %bb.0: 122; RV32I-NEXT: .cfi_def_cfa_offset 0 123; RV32I-NEXT: ret 124; 125; RV64I-LABEL: callee: 126; RV64I: # %bb.0: 127; RV64I-NEXT: .cfi_def_cfa_offset 0 128; RV64I-NEXT: ret 129 ret void 130} 131