1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ 3; RUN: | FileCheck %s -check-prefixes=RV32_NOZBB,RV32I 4; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 5; RUN: | FileCheck %s -check-prefixes=RV64NOZBB,RV64I 6; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \ 7; RUN: | FileCheck %s -check-prefixes=RV32_NOZBB,RV32M 8; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \ 9; RUN: | FileCheck %s -check-prefixes=RV64NOZBB,RV64M 10; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \ 11; RUN: | FileCheck %s -check-prefix=RV32ZBB 12; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \ 13; RUN: | FileCheck %s -check-prefix=RV64ZBB 14; RUN: llc -mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs < %s \ 15; RUN: | FileCheck %s -check-prefix=RV32XTHEADBB 16; RUN: llc -mtriple=riscv64 -mattr=+xtheadbb -verify-machineinstrs < %s \ 17; RUN: | FileCheck %s -check-prefix=RV64XTHEADBB 18 19declare i8 @llvm.cttz.i8(i8, i1) 20declare i16 @llvm.cttz.i16(i16, i1) 21declare i32 @llvm.cttz.i32(i32, i1) 22declare i64 @llvm.cttz.i64(i64, i1) 23declare i8 @llvm.ctlz.i8(i8, i1) 24declare i16 @llvm.ctlz.i16(i16, i1) 25declare i32 @llvm.ctlz.i32(i32, i1) 26declare i64 @llvm.ctlz.i64(i64, i1) 27declare i8 @llvm.ctpop.i8(i8) 28declare i16 @llvm.ctpop.i16(i16) 29declare i32 @llvm.ctpop.i32(i32) 30declare i64 @llvm.ctpop.i64(i64) 31 32define i8 @test_cttz_i8(i8 %a) nounwind { 33; RV32_NOZBB-LABEL: test_cttz_i8: 34; RV32_NOZBB: # %bb.0: 35; RV32_NOZBB-NEXT: andi a1, a0, 255 36; RV32_NOZBB-NEXT: beqz a1, .LBB0_2 37; RV32_NOZBB-NEXT: # %bb.1: # %cond.false 38; RV32_NOZBB-NEXT: addi a1, a0, -1 39; RV32_NOZBB-NEXT: not a0, a0 40; RV32_NOZBB-NEXT: and a0, a0, a1 41; RV32_NOZBB-NEXT: srli a1, a0, 1 42; RV32_NOZBB-NEXT: andi a1, a1, 85 43; RV32_NOZBB-NEXT: sub a0, a0, a1 44; RV32_NOZBB-NEXT: andi a1, a0, 51 45; RV32_NOZBB-NEXT: srli a0, a0, 2 46; RV32_NOZBB-NEXT: andi a0, a0, 51 47; RV32_NOZBB-NEXT: add a0, a1, a0 48; RV32_NOZBB-NEXT: srli a1, a0, 4 49; RV32_NOZBB-NEXT: add a0, a0, a1 50; RV32_NOZBB-NEXT: andi a0, a0, 15 51; RV32_NOZBB-NEXT: ret 52; RV32_NOZBB-NEXT: .LBB0_2: 53; RV32_NOZBB-NEXT: li a0, 8 54; RV32_NOZBB-NEXT: ret 55; 56; RV64NOZBB-LABEL: test_cttz_i8: 57; RV64NOZBB: # %bb.0: 58; RV64NOZBB-NEXT: andi a1, a0, 255 59; RV64NOZBB-NEXT: beqz a1, .LBB0_2 60; RV64NOZBB-NEXT: # %bb.1: # %cond.false 61; RV64NOZBB-NEXT: addi a1, a0, -1 62; RV64NOZBB-NEXT: not a0, a0 63; RV64NOZBB-NEXT: and a0, a0, a1 64; RV64NOZBB-NEXT: srli a1, a0, 1 65; RV64NOZBB-NEXT: andi a1, a1, 85 66; RV64NOZBB-NEXT: subw a0, a0, a1 67; RV64NOZBB-NEXT: andi a1, a0, 51 68; RV64NOZBB-NEXT: srli a0, a0, 2 69; RV64NOZBB-NEXT: andi a0, a0, 51 70; RV64NOZBB-NEXT: add a0, a1, a0 71; RV64NOZBB-NEXT: srli a1, a0, 4 72; RV64NOZBB-NEXT: add a0, a0, a1 73; RV64NOZBB-NEXT: andi a0, a0, 15 74; RV64NOZBB-NEXT: ret 75; RV64NOZBB-NEXT: .LBB0_2: 76; RV64NOZBB-NEXT: li a0, 8 77; RV64NOZBB-NEXT: ret 78; 79; RV32ZBB-LABEL: test_cttz_i8: 80; RV32ZBB: # %bb.0: 81; RV32ZBB-NEXT: ori a0, a0, 256 82; RV32ZBB-NEXT: ctz a0, a0 83; RV32ZBB-NEXT: ret 84; 85; RV64ZBB-LABEL: test_cttz_i8: 86; RV64ZBB: # %bb.0: 87; RV64ZBB-NEXT: ori a0, a0, 256 88; RV64ZBB-NEXT: ctz a0, a0 89; RV64ZBB-NEXT: ret 90; 91; RV32XTHEADBB-LABEL: test_cttz_i8: 92; RV32XTHEADBB: # %bb.0: 93; RV32XTHEADBB-NEXT: andi a1, a0, 255 94; RV32XTHEADBB-NEXT: beqz a1, .LBB0_2 95; RV32XTHEADBB-NEXT: # %bb.1: # %cond.false 96; RV32XTHEADBB-NEXT: addi a1, a0, -1 97; RV32XTHEADBB-NEXT: not a0, a0 98; RV32XTHEADBB-NEXT: and a0, a0, a1 99; RV32XTHEADBB-NEXT: th.ff1 a0, a0 100; RV32XTHEADBB-NEXT: li a1, 32 101; RV32XTHEADBB-NEXT: sub a0, a1, a0 102; RV32XTHEADBB-NEXT: ret 103; RV32XTHEADBB-NEXT: .LBB0_2: 104; RV32XTHEADBB-NEXT: li a0, 8 105; RV32XTHEADBB-NEXT: ret 106; 107; RV64XTHEADBB-LABEL: test_cttz_i8: 108; RV64XTHEADBB: # %bb.0: 109; RV64XTHEADBB-NEXT: andi a1, a0, 255 110; RV64XTHEADBB-NEXT: beqz a1, .LBB0_2 111; RV64XTHEADBB-NEXT: # %bb.1: # %cond.false 112; RV64XTHEADBB-NEXT: addi a1, a0, -1 113; RV64XTHEADBB-NEXT: not a0, a0 114; RV64XTHEADBB-NEXT: and a0, a0, a1 115; RV64XTHEADBB-NEXT: th.ff1 a0, a0 116; RV64XTHEADBB-NEXT: li a1, 64 117; RV64XTHEADBB-NEXT: sub a0, a1, a0 118; RV64XTHEADBB-NEXT: ret 119; RV64XTHEADBB-NEXT: .LBB0_2: 120; RV64XTHEADBB-NEXT: li a0, 8 121; RV64XTHEADBB-NEXT: ret 122 %tmp = call i8 @llvm.cttz.i8(i8 %a, i1 false) 123 ret i8 %tmp 124} 125 126define i16 @test_cttz_i16(i16 %a) nounwind { 127; RV32_NOZBB-LABEL: test_cttz_i16: 128; RV32_NOZBB: # %bb.0: 129; RV32_NOZBB-NEXT: slli a1, a0, 16 130; RV32_NOZBB-NEXT: beqz a1, .LBB1_2 131; RV32_NOZBB-NEXT: # %bb.1: # %cond.false 132; RV32_NOZBB-NEXT: addi a1, a0, -1 133; RV32_NOZBB-NEXT: not a0, a0 134; RV32_NOZBB-NEXT: lui a2, 5 135; RV32_NOZBB-NEXT: and a0, a0, a1 136; RV32_NOZBB-NEXT: addi a1, a2, 1365 137; RV32_NOZBB-NEXT: srli a2, a0, 1 138; RV32_NOZBB-NEXT: and a1, a2, a1 139; RV32_NOZBB-NEXT: lui a2, 3 140; RV32_NOZBB-NEXT: addi a2, a2, 819 141; RV32_NOZBB-NEXT: sub a0, a0, a1 142; RV32_NOZBB-NEXT: and a1, a0, a2 143; RV32_NOZBB-NEXT: srli a0, a0, 2 144; RV32_NOZBB-NEXT: and a0, a0, a2 145; RV32_NOZBB-NEXT: add a0, a1, a0 146; RV32_NOZBB-NEXT: srli a1, a0, 4 147; RV32_NOZBB-NEXT: add a0, a0, a1 148; RV32_NOZBB-NEXT: andi a1, a0, 15 149; RV32_NOZBB-NEXT: slli a0, a0, 20 150; RV32_NOZBB-NEXT: srli a0, a0, 28 151; RV32_NOZBB-NEXT: add a0, a1, a0 152; RV32_NOZBB-NEXT: ret 153; RV32_NOZBB-NEXT: .LBB1_2: 154; RV32_NOZBB-NEXT: li a0, 16 155; RV32_NOZBB-NEXT: ret 156; 157; RV64NOZBB-LABEL: test_cttz_i16: 158; RV64NOZBB: # %bb.0: 159; RV64NOZBB-NEXT: slli a1, a0, 48 160; RV64NOZBB-NEXT: beqz a1, .LBB1_2 161; RV64NOZBB-NEXT: # %bb.1: # %cond.false 162; RV64NOZBB-NEXT: addi a1, a0, -1 163; RV64NOZBB-NEXT: not a0, a0 164; RV64NOZBB-NEXT: lui a2, 5 165; RV64NOZBB-NEXT: and a0, a0, a1 166; RV64NOZBB-NEXT: addiw a1, a2, 1365 167; RV64NOZBB-NEXT: srli a2, a0, 1 168; RV64NOZBB-NEXT: and a1, a2, a1 169; RV64NOZBB-NEXT: lui a2, 3 170; RV64NOZBB-NEXT: addiw a2, a2, 819 171; RV64NOZBB-NEXT: sub a0, a0, a1 172; RV64NOZBB-NEXT: and a1, a0, a2 173; RV64NOZBB-NEXT: srli a0, a0, 2 174; RV64NOZBB-NEXT: and a0, a0, a2 175; RV64NOZBB-NEXT: add a0, a1, a0 176; RV64NOZBB-NEXT: srli a1, a0, 4 177; RV64NOZBB-NEXT: add a0, a0, a1 178; RV64NOZBB-NEXT: andi a1, a0, 15 179; RV64NOZBB-NEXT: slli a0, a0, 52 180; RV64NOZBB-NEXT: srli a0, a0, 60 181; RV64NOZBB-NEXT: add a0, a1, a0 182; RV64NOZBB-NEXT: ret 183; RV64NOZBB-NEXT: .LBB1_2: 184; RV64NOZBB-NEXT: li a0, 16 185; RV64NOZBB-NEXT: ret 186; 187; RV32ZBB-LABEL: test_cttz_i16: 188; RV32ZBB: # %bb.0: 189; RV32ZBB-NEXT: lui a1, 16 190; RV32ZBB-NEXT: or a0, a0, a1 191; RV32ZBB-NEXT: ctz a0, a0 192; RV32ZBB-NEXT: ret 193; 194; RV64ZBB-LABEL: test_cttz_i16: 195; RV64ZBB: # %bb.0: 196; RV64ZBB-NEXT: lui a1, 16 197; RV64ZBB-NEXT: or a0, a0, a1 198; RV64ZBB-NEXT: ctz a0, a0 199; RV64ZBB-NEXT: ret 200; 201; RV32XTHEADBB-LABEL: test_cttz_i16: 202; RV32XTHEADBB: # %bb.0: 203; RV32XTHEADBB-NEXT: slli a1, a0, 16 204; RV32XTHEADBB-NEXT: beqz a1, .LBB1_2 205; RV32XTHEADBB-NEXT: # %bb.1: # %cond.false 206; RV32XTHEADBB-NEXT: addi a1, a0, -1 207; RV32XTHEADBB-NEXT: not a0, a0 208; RV32XTHEADBB-NEXT: and a0, a0, a1 209; RV32XTHEADBB-NEXT: th.ff1 a0, a0 210; RV32XTHEADBB-NEXT: li a1, 32 211; RV32XTHEADBB-NEXT: sub a0, a1, a0 212; RV32XTHEADBB-NEXT: ret 213; RV32XTHEADBB-NEXT: .LBB1_2: 214; RV32XTHEADBB-NEXT: li a0, 16 215; RV32XTHEADBB-NEXT: ret 216; 217; RV64XTHEADBB-LABEL: test_cttz_i16: 218; RV64XTHEADBB: # %bb.0: 219; RV64XTHEADBB-NEXT: slli a1, a0, 48 220; RV64XTHEADBB-NEXT: beqz a1, .LBB1_2 221; RV64XTHEADBB-NEXT: # %bb.1: # %cond.false 222; RV64XTHEADBB-NEXT: addi a1, a0, -1 223; RV64XTHEADBB-NEXT: not a0, a0 224; RV64XTHEADBB-NEXT: and a0, a0, a1 225; RV64XTHEADBB-NEXT: th.ff1 a0, a0 226; RV64XTHEADBB-NEXT: li a1, 64 227; RV64XTHEADBB-NEXT: sub a0, a1, a0 228; RV64XTHEADBB-NEXT: ret 229; RV64XTHEADBB-NEXT: .LBB1_2: 230; RV64XTHEADBB-NEXT: li a0, 16 231; RV64XTHEADBB-NEXT: ret 232 %tmp = call i16 @llvm.cttz.i16(i16 %a, i1 false) 233 ret i16 %tmp 234} 235 236define i32 @test_cttz_i32(i32 %a) nounwind { 237; RV32I-LABEL: test_cttz_i32: 238; RV32I: # %bb.0: 239; RV32I-NEXT: beqz a0, .LBB2_2 240; RV32I-NEXT: # %bb.1: # %cond.false 241; RV32I-NEXT: addi sp, sp, -16 242; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 243; RV32I-NEXT: neg a1, a0 244; RV32I-NEXT: and a0, a0, a1 245; RV32I-NEXT: lui a1, 30667 246; RV32I-NEXT: addi a1, a1, 1329 247; RV32I-NEXT: call __mulsi3 248; RV32I-NEXT: srli a0, a0, 27 249; RV32I-NEXT: lui a1, %hi(.LCPI2_0) 250; RV32I-NEXT: addi a1, a1, %lo(.LCPI2_0) 251; RV32I-NEXT: add a0, a1, a0 252; RV32I-NEXT: lbu a0, 0(a0) 253; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 254; RV32I-NEXT: addi sp, sp, 16 255; RV32I-NEXT: ret 256; RV32I-NEXT: .LBB2_2: 257; RV32I-NEXT: li a0, 32 258; RV32I-NEXT: ret 259; 260; RV64I-LABEL: test_cttz_i32: 261; RV64I: # %bb.0: 262; RV64I-NEXT: sext.w a1, a0 263; RV64I-NEXT: beqz a1, .LBB2_2 264; RV64I-NEXT: # %bb.1: # %cond.false 265; RV64I-NEXT: addi sp, sp, -16 266; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 267; RV64I-NEXT: neg a1, a0 268; RV64I-NEXT: and a0, a0, a1 269; RV64I-NEXT: lui a1, 30667 270; RV64I-NEXT: addiw a1, a1, 1329 271; RV64I-NEXT: call __muldi3 272; RV64I-NEXT: srliw a0, a0, 27 273; RV64I-NEXT: lui a1, %hi(.LCPI2_0) 274; RV64I-NEXT: addi a1, a1, %lo(.LCPI2_0) 275; RV64I-NEXT: add a0, a1, a0 276; RV64I-NEXT: lbu a0, 0(a0) 277; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 278; RV64I-NEXT: addi sp, sp, 16 279; RV64I-NEXT: ret 280; RV64I-NEXT: .LBB2_2: 281; RV64I-NEXT: li a0, 32 282; RV64I-NEXT: ret 283; 284; RV32M-LABEL: test_cttz_i32: 285; RV32M: # %bb.0: 286; RV32M-NEXT: beqz a0, .LBB2_2 287; RV32M-NEXT: # %bb.1: # %cond.false 288; RV32M-NEXT: neg a1, a0 289; RV32M-NEXT: and a0, a0, a1 290; RV32M-NEXT: lui a1, 30667 291; RV32M-NEXT: addi a1, a1, 1329 292; RV32M-NEXT: mul a0, a0, a1 293; RV32M-NEXT: srli a0, a0, 27 294; RV32M-NEXT: lui a1, %hi(.LCPI2_0) 295; RV32M-NEXT: addi a1, a1, %lo(.LCPI2_0) 296; RV32M-NEXT: add a0, a1, a0 297; RV32M-NEXT: lbu a0, 0(a0) 298; RV32M-NEXT: ret 299; RV32M-NEXT: .LBB2_2: 300; RV32M-NEXT: li a0, 32 301; RV32M-NEXT: ret 302; 303; RV64M-LABEL: test_cttz_i32: 304; RV64M: # %bb.0: 305; RV64M-NEXT: sext.w a1, a0 306; RV64M-NEXT: beqz a1, .LBB2_2 307; RV64M-NEXT: # %bb.1: # %cond.false 308; RV64M-NEXT: negw a1, a0 309; RV64M-NEXT: and a0, a0, a1 310; RV64M-NEXT: lui a1, 30667 311; RV64M-NEXT: addi a1, a1, 1329 312; RV64M-NEXT: mul a0, a0, a1 313; RV64M-NEXT: srliw a0, a0, 27 314; RV64M-NEXT: lui a1, %hi(.LCPI2_0) 315; RV64M-NEXT: addi a1, a1, %lo(.LCPI2_0) 316; RV64M-NEXT: add a0, a1, a0 317; RV64M-NEXT: lbu a0, 0(a0) 318; RV64M-NEXT: ret 319; RV64M-NEXT: .LBB2_2: 320; RV64M-NEXT: li a0, 32 321; RV64M-NEXT: ret 322; 323; RV32ZBB-LABEL: test_cttz_i32: 324; RV32ZBB: # %bb.0: 325; RV32ZBB-NEXT: ctz a0, a0 326; RV32ZBB-NEXT: ret 327; 328; RV64ZBB-LABEL: test_cttz_i32: 329; RV64ZBB: # %bb.0: 330; RV64ZBB-NEXT: ctzw a0, a0 331; RV64ZBB-NEXT: ret 332; 333; RV32XTHEADBB-LABEL: test_cttz_i32: 334; RV32XTHEADBB: # %bb.0: 335; RV32XTHEADBB-NEXT: beqz a0, .LBB2_2 336; RV32XTHEADBB-NEXT: # %bb.1: # %cond.false 337; RV32XTHEADBB-NEXT: addi a1, a0, -1 338; RV32XTHEADBB-NEXT: not a0, a0 339; RV32XTHEADBB-NEXT: and a0, a0, a1 340; RV32XTHEADBB-NEXT: th.ff1 a0, a0 341; RV32XTHEADBB-NEXT: li a1, 32 342; RV32XTHEADBB-NEXT: sub a0, a1, a0 343; RV32XTHEADBB-NEXT: ret 344; RV32XTHEADBB-NEXT: .LBB2_2: 345; RV32XTHEADBB-NEXT: li a0, 32 346; RV32XTHEADBB-NEXT: ret 347; 348; RV64XTHEADBB-LABEL: test_cttz_i32: 349; RV64XTHEADBB: # %bb.0: 350; RV64XTHEADBB-NEXT: sext.w a1, a0 351; RV64XTHEADBB-NEXT: beqz a1, .LBB2_2 352; RV64XTHEADBB-NEXT: # %bb.1: # %cond.false 353; RV64XTHEADBB-NEXT: addi a1, a0, -1 354; RV64XTHEADBB-NEXT: not a0, a0 355; RV64XTHEADBB-NEXT: and a0, a0, a1 356; RV64XTHEADBB-NEXT: th.ff1 a0, a0 357; RV64XTHEADBB-NEXT: li a1, 64 358; RV64XTHEADBB-NEXT: sub a0, a1, a0 359; RV64XTHEADBB-NEXT: ret 360; RV64XTHEADBB-NEXT: .LBB2_2: 361; RV64XTHEADBB-NEXT: li a0, 32 362; RV64XTHEADBB-NEXT: ret 363 %tmp = call i32 @llvm.cttz.i32(i32 %a, i1 false) 364 ret i32 %tmp 365} 366 367define i64 @test_cttz_i64(i64 %a) nounwind { 368; RV32I-LABEL: test_cttz_i64: 369; RV32I: # %bb.0: 370; RV32I-NEXT: addi sp, sp, -32 371; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 372; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 373; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 374; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 375; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 376; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 377; RV32I-NEXT: mv s2, a1 378; RV32I-NEXT: mv s0, a0 379; RV32I-NEXT: neg a0, a0 380; RV32I-NEXT: and a0, s0, a0 381; RV32I-NEXT: lui a1, 30667 382; RV32I-NEXT: addi s3, a1, 1329 383; RV32I-NEXT: mv a1, s3 384; RV32I-NEXT: call __mulsi3 385; RV32I-NEXT: mv s1, a0 386; RV32I-NEXT: lui s4, %hi(.LCPI3_0) 387; RV32I-NEXT: addi s4, s4, %lo(.LCPI3_0) 388; RV32I-NEXT: neg a0, s2 389; RV32I-NEXT: and a0, s2, a0 390; RV32I-NEXT: mv a1, s3 391; RV32I-NEXT: call __mulsi3 392; RV32I-NEXT: bnez s2, .LBB3_3 393; RV32I-NEXT: # %bb.1: 394; RV32I-NEXT: li a0, 32 395; RV32I-NEXT: beqz s0, .LBB3_4 396; RV32I-NEXT: .LBB3_2: 397; RV32I-NEXT: srli s1, s1, 27 398; RV32I-NEXT: add s1, s4, s1 399; RV32I-NEXT: lbu a0, 0(s1) 400; RV32I-NEXT: j .LBB3_5 401; RV32I-NEXT: .LBB3_3: 402; RV32I-NEXT: srli a0, a0, 27 403; RV32I-NEXT: add a0, s4, a0 404; RV32I-NEXT: lbu a0, 0(a0) 405; RV32I-NEXT: bnez s0, .LBB3_2 406; RV32I-NEXT: .LBB3_4: 407; RV32I-NEXT: addi a0, a0, 32 408; RV32I-NEXT: .LBB3_5: 409; RV32I-NEXT: li a1, 0 410; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 411; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 412; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 413; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 414; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 415; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 416; RV32I-NEXT: addi sp, sp, 32 417; RV32I-NEXT: ret 418; 419; RV64I-LABEL: test_cttz_i64: 420; RV64I: # %bb.0: 421; RV64I-NEXT: beqz a0, .LBB3_2 422; RV64I-NEXT: # %bb.1: # %cond.false 423; RV64I-NEXT: addi sp, sp, -16 424; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 425; RV64I-NEXT: neg a1, a0 426; RV64I-NEXT: and a0, a0, a1 427; RV64I-NEXT: lui a1, %hi(.LCPI3_0) 428; RV64I-NEXT: ld a1, %lo(.LCPI3_0)(a1) 429; RV64I-NEXT: call __muldi3 430; RV64I-NEXT: srli a0, a0, 58 431; RV64I-NEXT: lui a1, %hi(.LCPI3_1) 432; RV64I-NEXT: addi a1, a1, %lo(.LCPI3_1) 433; RV64I-NEXT: add a0, a1, a0 434; RV64I-NEXT: lbu a0, 0(a0) 435; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 436; RV64I-NEXT: addi sp, sp, 16 437; RV64I-NEXT: ret 438; RV64I-NEXT: .LBB3_2: 439; RV64I-NEXT: li a0, 64 440; RV64I-NEXT: ret 441; 442; RV32M-LABEL: test_cttz_i64: 443; RV32M: # %bb.0: 444; RV32M-NEXT: lui a2, 30667 445; RV32M-NEXT: addi a3, a2, 1329 446; RV32M-NEXT: lui a2, %hi(.LCPI3_0) 447; RV32M-NEXT: addi a2, a2, %lo(.LCPI3_0) 448; RV32M-NEXT: bnez a1, .LBB3_3 449; RV32M-NEXT: # %bb.1: 450; RV32M-NEXT: li a1, 32 451; RV32M-NEXT: beqz a0, .LBB3_4 452; RV32M-NEXT: .LBB3_2: 453; RV32M-NEXT: neg a1, a0 454; RV32M-NEXT: and a0, a0, a1 455; RV32M-NEXT: mul a0, a0, a3 456; RV32M-NEXT: srli a0, a0, 27 457; RV32M-NEXT: add a0, a2, a0 458; RV32M-NEXT: lbu a0, 0(a0) 459; RV32M-NEXT: li a1, 0 460; RV32M-NEXT: ret 461; RV32M-NEXT: .LBB3_3: 462; RV32M-NEXT: neg a4, a1 463; RV32M-NEXT: and a1, a1, a4 464; RV32M-NEXT: mul a1, a1, a3 465; RV32M-NEXT: srli a1, a1, 27 466; RV32M-NEXT: add a1, a2, a1 467; RV32M-NEXT: lbu a1, 0(a1) 468; RV32M-NEXT: bnez a0, .LBB3_2 469; RV32M-NEXT: .LBB3_4: 470; RV32M-NEXT: addi a0, a1, 32 471; RV32M-NEXT: li a1, 0 472; RV32M-NEXT: ret 473; 474; RV64M-LABEL: test_cttz_i64: 475; RV64M: # %bb.0: 476; RV64M-NEXT: beqz a0, .LBB3_2 477; RV64M-NEXT: # %bb.1: # %cond.false 478; RV64M-NEXT: lui a1, %hi(.LCPI3_0) 479; RV64M-NEXT: ld a1, %lo(.LCPI3_0)(a1) 480; RV64M-NEXT: neg a2, a0 481; RV64M-NEXT: and a0, a0, a2 482; RV64M-NEXT: mul a0, a0, a1 483; RV64M-NEXT: srli a0, a0, 58 484; RV64M-NEXT: lui a1, %hi(.LCPI3_1) 485; RV64M-NEXT: addi a1, a1, %lo(.LCPI3_1) 486; RV64M-NEXT: add a0, a1, a0 487; RV64M-NEXT: lbu a0, 0(a0) 488; RV64M-NEXT: ret 489; RV64M-NEXT: .LBB3_2: 490; RV64M-NEXT: li a0, 64 491; RV64M-NEXT: ret 492; 493; RV32ZBB-LABEL: test_cttz_i64: 494; RV32ZBB: # %bb.0: 495; RV32ZBB-NEXT: bnez a0, .LBB3_2 496; RV32ZBB-NEXT: # %bb.1: 497; RV32ZBB-NEXT: ctz a0, a1 498; RV32ZBB-NEXT: addi a0, a0, 32 499; RV32ZBB-NEXT: li a1, 0 500; RV32ZBB-NEXT: ret 501; RV32ZBB-NEXT: .LBB3_2: 502; RV32ZBB-NEXT: ctz a0, a0 503; RV32ZBB-NEXT: li a1, 0 504; RV32ZBB-NEXT: ret 505; 506; RV64ZBB-LABEL: test_cttz_i64: 507; RV64ZBB: # %bb.0: 508; RV64ZBB-NEXT: ctz a0, a0 509; RV64ZBB-NEXT: ret 510; 511; RV32XTHEADBB-LABEL: test_cttz_i64: 512; RV32XTHEADBB: # %bb.0: 513; RV32XTHEADBB-NEXT: bnez a0, .LBB3_2 514; RV32XTHEADBB-NEXT: # %bb.1: 515; RV32XTHEADBB-NEXT: addi a0, a1, -1 516; RV32XTHEADBB-NEXT: not a1, a1 517; RV32XTHEADBB-NEXT: and a0, a1, a0 518; RV32XTHEADBB-NEXT: th.ff1 a0, a0 519; RV32XTHEADBB-NEXT: li a1, 64 520; RV32XTHEADBB-NEXT: j .LBB3_3 521; RV32XTHEADBB-NEXT: .LBB3_2: 522; RV32XTHEADBB-NEXT: addi a1, a0, -1 523; RV32XTHEADBB-NEXT: not a0, a0 524; RV32XTHEADBB-NEXT: and a0, a0, a1 525; RV32XTHEADBB-NEXT: th.ff1 a0, a0 526; RV32XTHEADBB-NEXT: li a1, 32 527; RV32XTHEADBB-NEXT: .LBB3_3: 528; RV32XTHEADBB-NEXT: sub a0, a1, a0 529; RV32XTHEADBB-NEXT: li a1, 0 530; RV32XTHEADBB-NEXT: ret 531; 532; RV64XTHEADBB-LABEL: test_cttz_i64: 533; RV64XTHEADBB: # %bb.0: 534; RV64XTHEADBB-NEXT: beqz a0, .LBB3_2 535; RV64XTHEADBB-NEXT: # %bb.1: # %cond.false 536; RV64XTHEADBB-NEXT: addi a1, a0, -1 537; RV64XTHEADBB-NEXT: not a0, a0 538; RV64XTHEADBB-NEXT: and a0, a0, a1 539; RV64XTHEADBB-NEXT: th.ff1 a0, a0 540; RV64XTHEADBB-NEXT: li a1, 64 541; RV64XTHEADBB-NEXT: sub a0, a1, a0 542; RV64XTHEADBB-NEXT: ret 543; RV64XTHEADBB-NEXT: .LBB3_2: 544; RV64XTHEADBB-NEXT: li a0, 64 545; RV64XTHEADBB-NEXT: ret 546 %tmp = call i64 @llvm.cttz.i64(i64 %a, i1 false) 547 ret i64 %tmp 548} 549 550define i8 @test_cttz_i8_zero_undef(i8 %a) nounwind { 551; RV32_NOZBB-LABEL: test_cttz_i8_zero_undef: 552; RV32_NOZBB: # %bb.0: 553; RV32_NOZBB-NEXT: addi a1, a0, -1 554; RV32_NOZBB-NEXT: not a0, a0 555; RV32_NOZBB-NEXT: and a0, a0, a1 556; RV32_NOZBB-NEXT: srli a1, a0, 1 557; RV32_NOZBB-NEXT: andi a1, a1, 85 558; RV32_NOZBB-NEXT: sub a0, a0, a1 559; RV32_NOZBB-NEXT: andi a1, a0, 51 560; RV32_NOZBB-NEXT: srli a0, a0, 2 561; RV32_NOZBB-NEXT: andi a0, a0, 51 562; RV32_NOZBB-NEXT: add a0, a1, a0 563; RV32_NOZBB-NEXT: srli a1, a0, 4 564; RV32_NOZBB-NEXT: add a0, a0, a1 565; RV32_NOZBB-NEXT: andi a0, a0, 15 566; RV32_NOZBB-NEXT: ret 567; 568; RV64NOZBB-LABEL: test_cttz_i8_zero_undef: 569; RV64NOZBB: # %bb.0: 570; RV64NOZBB-NEXT: addi a1, a0, -1 571; RV64NOZBB-NEXT: not a0, a0 572; RV64NOZBB-NEXT: and a0, a0, a1 573; RV64NOZBB-NEXT: srli a1, a0, 1 574; RV64NOZBB-NEXT: andi a1, a1, 85 575; RV64NOZBB-NEXT: subw a0, a0, a1 576; RV64NOZBB-NEXT: andi a1, a0, 51 577; RV64NOZBB-NEXT: srli a0, a0, 2 578; RV64NOZBB-NEXT: andi a0, a0, 51 579; RV64NOZBB-NEXT: add a0, a1, a0 580; RV64NOZBB-NEXT: srli a1, a0, 4 581; RV64NOZBB-NEXT: add a0, a0, a1 582; RV64NOZBB-NEXT: andi a0, a0, 15 583; RV64NOZBB-NEXT: ret 584; 585; RV32ZBB-LABEL: test_cttz_i8_zero_undef: 586; RV32ZBB: # %bb.0: 587; RV32ZBB-NEXT: ctz a0, a0 588; RV32ZBB-NEXT: ret 589; 590; RV64ZBB-LABEL: test_cttz_i8_zero_undef: 591; RV64ZBB: # %bb.0: 592; RV64ZBB-NEXT: ctz a0, a0 593; RV64ZBB-NEXT: ret 594; 595; RV32XTHEADBB-LABEL: test_cttz_i8_zero_undef: 596; RV32XTHEADBB: # %bb.0: 597; RV32XTHEADBB-NEXT: addi a1, a0, -1 598; RV32XTHEADBB-NEXT: not a0, a0 599; RV32XTHEADBB-NEXT: and a0, a0, a1 600; RV32XTHEADBB-NEXT: th.ff1 a0, a0 601; RV32XTHEADBB-NEXT: li a1, 32 602; RV32XTHEADBB-NEXT: sub a0, a1, a0 603; RV32XTHEADBB-NEXT: ret 604; 605; RV64XTHEADBB-LABEL: test_cttz_i8_zero_undef: 606; RV64XTHEADBB: # %bb.0: 607; RV64XTHEADBB-NEXT: addi a1, a0, -1 608; RV64XTHEADBB-NEXT: not a0, a0 609; RV64XTHEADBB-NEXT: and a0, a0, a1 610; RV64XTHEADBB-NEXT: th.ff1 a0, a0 611; RV64XTHEADBB-NEXT: li a1, 64 612; RV64XTHEADBB-NEXT: sub a0, a1, a0 613; RV64XTHEADBB-NEXT: ret 614 %tmp = call i8 @llvm.cttz.i8(i8 %a, i1 true) 615 ret i8 %tmp 616} 617 618define i16 @test_cttz_i16_zero_undef(i16 %a) nounwind { 619; RV32_NOZBB-LABEL: test_cttz_i16_zero_undef: 620; RV32_NOZBB: # %bb.0: 621; RV32_NOZBB-NEXT: addi a1, a0, -1 622; RV32_NOZBB-NEXT: not a0, a0 623; RV32_NOZBB-NEXT: lui a2, 5 624; RV32_NOZBB-NEXT: and a0, a0, a1 625; RV32_NOZBB-NEXT: addi a1, a2, 1365 626; RV32_NOZBB-NEXT: srli a2, a0, 1 627; RV32_NOZBB-NEXT: and a1, a2, a1 628; RV32_NOZBB-NEXT: lui a2, 3 629; RV32_NOZBB-NEXT: addi a2, a2, 819 630; RV32_NOZBB-NEXT: sub a0, a0, a1 631; RV32_NOZBB-NEXT: and a1, a0, a2 632; RV32_NOZBB-NEXT: srli a0, a0, 2 633; RV32_NOZBB-NEXT: and a0, a0, a2 634; RV32_NOZBB-NEXT: add a0, a1, a0 635; RV32_NOZBB-NEXT: srli a1, a0, 4 636; RV32_NOZBB-NEXT: add a0, a0, a1 637; RV32_NOZBB-NEXT: andi a1, a0, 15 638; RV32_NOZBB-NEXT: slli a0, a0, 20 639; RV32_NOZBB-NEXT: srli a0, a0, 28 640; RV32_NOZBB-NEXT: add a0, a1, a0 641; RV32_NOZBB-NEXT: ret 642; 643; RV64NOZBB-LABEL: test_cttz_i16_zero_undef: 644; RV64NOZBB: # %bb.0: 645; RV64NOZBB-NEXT: addi a1, a0, -1 646; RV64NOZBB-NEXT: not a0, a0 647; RV64NOZBB-NEXT: lui a2, 5 648; RV64NOZBB-NEXT: and a0, a0, a1 649; RV64NOZBB-NEXT: addiw a1, a2, 1365 650; RV64NOZBB-NEXT: srli a2, a0, 1 651; RV64NOZBB-NEXT: and a1, a2, a1 652; RV64NOZBB-NEXT: lui a2, 3 653; RV64NOZBB-NEXT: addiw a2, a2, 819 654; RV64NOZBB-NEXT: sub a0, a0, a1 655; RV64NOZBB-NEXT: and a1, a0, a2 656; RV64NOZBB-NEXT: srli a0, a0, 2 657; RV64NOZBB-NEXT: and a0, a0, a2 658; RV64NOZBB-NEXT: add a0, a1, a0 659; RV64NOZBB-NEXT: srli a1, a0, 4 660; RV64NOZBB-NEXT: add a0, a0, a1 661; RV64NOZBB-NEXT: andi a1, a0, 15 662; RV64NOZBB-NEXT: slli a0, a0, 52 663; RV64NOZBB-NEXT: srli a0, a0, 60 664; RV64NOZBB-NEXT: add a0, a1, a0 665; RV64NOZBB-NEXT: ret 666; 667; RV32ZBB-LABEL: test_cttz_i16_zero_undef: 668; RV32ZBB: # %bb.0: 669; RV32ZBB-NEXT: ctz a0, a0 670; RV32ZBB-NEXT: ret 671; 672; RV64ZBB-LABEL: test_cttz_i16_zero_undef: 673; RV64ZBB: # %bb.0: 674; RV64ZBB-NEXT: ctz a0, a0 675; RV64ZBB-NEXT: ret 676; 677; RV32XTHEADBB-LABEL: test_cttz_i16_zero_undef: 678; RV32XTHEADBB: # %bb.0: 679; RV32XTHEADBB-NEXT: addi a1, a0, -1 680; RV32XTHEADBB-NEXT: not a0, a0 681; RV32XTHEADBB-NEXT: and a0, a0, a1 682; RV32XTHEADBB-NEXT: th.ff1 a0, a0 683; RV32XTHEADBB-NEXT: li a1, 32 684; RV32XTHEADBB-NEXT: sub a0, a1, a0 685; RV32XTHEADBB-NEXT: ret 686; 687; RV64XTHEADBB-LABEL: test_cttz_i16_zero_undef: 688; RV64XTHEADBB: # %bb.0: 689; RV64XTHEADBB-NEXT: addi a1, a0, -1 690; RV64XTHEADBB-NEXT: not a0, a0 691; RV64XTHEADBB-NEXT: and a0, a0, a1 692; RV64XTHEADBB-NEXT: th.ff1 a0, a0 693; RV64XTHEADBB-NEXT: li a1, 64 694; RV64XTHEADBB-NEXT: sub a0, a1, a0 695; RV64XTHEADBB-NEXT: ret 696 %tmp = call i16 @llvm.cttz.i16(i16 %a, i1 true) 697 ret i16 %tmp 698} 699 700define i32 @test_cttz_i32_zero_undef(i32 %a) nounwind { 701; RV32I-LABEL: test_cttz_i32_zero_undef: 702; RV32I: # %bb.0: 703; RV32I-NEXT: addi sp, sp, -16 704; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 705; RV32I-NEXT: neg a1, a0 706; RV32I-NEXT: and a0, a0, a1 707; RV32I-NEXT: lui a1, 30667 708; RV32I-NEXT: addi a1, a1, 1329 709; RV32I-NEXT: call __mulsi3 710; RV32I-NEXT: srli a0, a0, 27 711; RV32I-NEXT: lui a1, %hi(.LCPI6_0) 712; RV32I-NEXT: addi a1, a1, %lo(.LCPI6_0) 713; RV32I-NEXT: add a0, a1, a0 714; RV32I-NEXT: lbu a0, 0(a0) 715; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 716; RV32I-NEXT: addi sp, sp, 16 717; RV32I-NEXT: ret 718; 719; RV64I-LABEL: test_cttz_i32_zero_undef: 720; RV64I: # %bb.0: 721; RV64I-NEXT: addi sp, sp, -16 722; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 723; RV64I-NEXT: neg a1, a0 724; RV64I-NEXT: and a0, a0, a1 725; RV64I-NEXT: lui a1, 30667 726; RV64I-NEXT: addiw a1, a1, 1329 727; RV64I-NEXT: call __muldi3 728; RV64I-NEXT: srliw a0, a0, 27 729; RV64I-NEXT: lui a1, %hi(.LCPI6_0) 730; RV64I-NEXT: addi a1, a1, %lo(.LCPI6_0) 731; RV64I-NEXT: add a0, a1, a0 732; RV64I-NEXT: lbu a0, 0(a0) 733; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 734; RV64I-NEXT: addi sp, sp, 16 735; RV64I-NEXT: ret 736; 737; RV32M-LABEL: test_cttz_i32_zero_undef: 738; RV32M: # %bb.0: 739; RV32M-NEXT: neg a1, a0 740; RV32M-NEXT: and a0, a0, a1 741; RV32M-NEXT: lui a1, 30667 742; RV32M-NEXT: addi a1, a1, 1329 743; RV32M-NEXT: mul a0, a0, a1 744; RV32M-NEXT: srli a0, a0, 27 745; RV32M-NEXT: lui a1, %hi(.LCPI6_0) 746; RV32M-NEXT: addi a1, a1, %lo(.LCPI6_0) 747; RV32M-NEXT: add a0, a1, a0 748; RV32M-NEXT: lbu a0, 0(a0) 749; RV32M-NEXT: ret 750; 751; RV64M-LABEL: test_cttz_i32_zero_undef: 752; RV64M: # %bb.0: 753; RV64M-NEXT: negw a1, a0 754; RV64M-NEXT: and a0, a0, a1 755; RV64M-NEXT: lui a1, 30667 756; RV64M-NEXT: addi a1, a1, 1329 757; RV64M-NEXT: mul a0, a0, a1 758; RV64M-NEXT: srliw a0, a0, 27 759; RV64M-NEXT: lui a1, %hi(.LCPI6_0) 760; RV64M-NEXT: addi a1, a1, %lo(.LCPI6_0) 761; RV64M-NEXT: add a0, a1, a0 762; RV64M-NEXT: lbu a0, 0(a0) 763; RV64M-NEXT: ret 764; 765; RV32ZBB-LABEL: test_cttz_i32_zero_undef: 766; RV32ZBB: # %bb.0: 767; RV32ZBB-NEXT: ctz a0, a0 768; RV32ZBB-NEXT: ret 769; 770; RV64ZBB-LABEL: test_cttz_i32_zero_undef: 771; RV64ZBB: # %bb.0: 772; RV64ZBB-NEXT: ctzw a0, a0 773; RV64ZBB-NEXT: ret 774; 775; RV32XTHEADBB-LABEL: test_cttz_i32_zero_undef: 776; RV32XTHEADBB: # %bb.0: 777; RV32XTHEADBB-NEXT: addi a1, a0, -1 778; RV32XTHEADBB-NEXT: not a0, a0 779; RV32XTHEADBB-NEXT: and a0, a0, a1 780; RV32XTHEADBB-NEXT: th.ff1 a0, a0 781; RV32XTHEADBB-NEXT: li a1, 32 782; RV32XTHEADBB-NEXT: sub a0, a1, a0 783; RV32XTHEADBB-NEXT: ret 784; 785; RV64XTHEADBB-LABEL: test_cttz_i32_zero_undef: 786; RV64XTHEADBB: # %bb.0: 787; RV64XTHEADBB-NEXT: addi a1, a0, -1 788; RV64XTHEADBB-NEXT: not a0, a0 789; RV64XTHEADBB-NEXT: and a0, a0, a1 790; RV64XTHEADBB-NEXT: th.ff1 a0, a0 791; RV64XTHEADBB-NEXT: li a1, 64 792; RV64XTHEADBB-NEXT: sub a0, a1, a0 793; RV64XTHEADBB-NEXT: ret 794 %tmp = call i32 @llvm.cttz.i32(i32 %a, i1 true) 795 ret i32 %tmp 796} 797 798define i64 @test_cttz_i64_zero_undef(i64 %a) nounwind { 799; RV32I-LABEL: test_cttz_i64_zero_undef: 800; RV32I: # %bb.0: 801; RV32I-NEXT: addi sp, sp, -32 802; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 803; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 804; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 805; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 806; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 807; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 808; RV32I-NEXT: mv s1, a1 809; RV32I-NEXT: mv s2, a0 810; RV32I-NEXT: neg a0, a0 811; RV32I-NEXT: and a0, s2, a0 812; RV32I-NEXT: lui a1, 30667 813; RV32I-NEXT: addi s3, a1, 1329 814; RV32I-NEXT: mv a1, s3 815; RV32I-NEXT: call __mulsi3 816; RV32I-NEXT: mv s0, a0 817; RV32I-NEXT: lui s4, %hi(.LCPI7_0) 818; RV32I-NEXT: addi s4, s4, %lo(.LCPI7_0) 819; RV32I-NEXT: neg a0, s1 820; RV32I-NEXT: and a0, s1, a0 821; RV32I-NEXT: mv a1, s3 822; RV32I-NEXT: call __mulsi3 823; RV32I-NEXT: bnez s2, .LBB7_2 824; RV32I-NEXT: # %bb.1: 825; RV32I-NEXT: srli a0, a0, 27 826; RV32I-NEXT: add a0, s4, a0 827; RV32I-NEXT: lbu a0, 0(a0) 828; RV32I-NEXT: addi a0, a0, 32 829; RV32I-NEXT: j .LBB7_3 830; RV32I-NEXT: .LBB7_2: 831; RV32I-NEXT: srli s0, s0, 27 832; RV32I-NEXT: add s0, s4, s0 833; RV32I-NEXT: lbu a0, 0(s0) 834; RV32I-NEXT: .LBB7_3: 835; RV32I-NEXT: li a1, 0 836; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 837; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 838; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 839; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 840; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 841; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 842; RV32I-NEXT: addi sp, sp, 32 843; RV32I-NEXT: ret 844; 845; RV64I-LABEL: test_cttz_i64_zero_undef: 846; RV64I: # %bb.0: 847; RV64I-NEXT: addi sp, sp, -16 848; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 849; RV64I-NEXT: neg a1, a0 850; RV64I-NEXT: and a0, a0, a1 851; RV64I-NEXT: lui a1, %hi(.LCPI7_0) 852; RV64I-NEXT: ld a1, %lo(.LCPI7_0)(a1) 853; RV64I-NEXT: call __muldi3 854; RV64I-NEXT: srli a0, a0, 58 855; RV64I-NEXT: lui a1, %hi(.LCPI7_1) 856; RV64I-NEXT: addi a1, a1, %lo(.LCPI7_1) 857; RV64I-NEXT: add a0, a1, a0 858; RV64I-NEXT: lbu a0, 0(a0) 859; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 860; RV64I-NEXT: addi sp, sp, 16 861; RV64I-NEXT: ret 862; 863; RV32M-LABEL: test_cttz_i64_zero_undef: 864; RV32M: # %bb.0: 865; RV32M-NEXT: lui a2, 30667 866; RV32M-NEXT: addi a3, a2, 1329 867; RV32M-NEXT: lui a2, %hi(.LCPI7_0) 868; RV32M-NEXT: addi a2, a2, %lo(.LCPI7_0) 869; RV32M-NEXT: bnez a0, .LBB7_2 870; RV32M-NEXT: # %bb.1: 871; RV32M-NEXT: neg a0, a1 872; RV32M-NEXT: and a0, a1, a0 873; RV32M-NEXT: mul a0, a0, a3 874; RV32M-NEXT: srli a0, a0, 27 875; RV32M-NEXT: add a0, a2, a0 876; RV32M-NEXT: lbu a0, 0(a0) 877; RV32M-NEXT: addi a0, a0, 32 878; RV32M-NEXT: li a1, 0 879; RV32M-NEXT: ret 880; RV32M-NEXT: .LBB7_2: 881; RV32M-NEXT: neg a1, a0 882; RV32M-NEXT: and a0, a0, a1 883; RV32M-NEXT: mul a0, a0, a3 884; RV32M-NEXT: srli a0, a0, 27 885; RV32M-NEXT: add a0, a2, a0 886; RV32M-NEXT: lbu a0, 0(a0) 887; RV32M-NEXT: li a1, 0 888; RV32M-NEXT: ret 889; 890; RV64M-LABEL: test_cttz_i64_zero_undef: 891; RV64M: # %bb.0: 892; RV64M-NEXT: lui a1, %hi(.LCPI7_0) 893; RV64M-NEXT: ld a1, %lo(.LCPI7_0)(a1) 894; RV64M-NEXT: neg a2, a0 895; RV64M-NEXT: and a0, a0, a2 896; RV64M-NEXT: mul a0, a0, a1 897; RV64M-NEXT: srli a0, a0, 58 898; RV64M-NEXT: lui a1, %hi(.LCPI7_1) 899; RV64M-NEXT: addi a1, a1, %lo(.LCPI7_1) 900; RV64M-NEXT: add a0, a1, a0 901; RV64M-NEXT: lbu a0, 0(a0) 902; RV64M-NEXT: ret 903; 904; RV32ZBB-LABEL: test_cttz_i64_zero_undef: 905; RV32ZBB: # %bb.0: 906; RV32ZBB-NEXT: bnez a0, .LBB7_2 907; RV32ZBB-NEXT: # %bb.1: 908; RV32ZBB-NEXT: ctz a0, a1 909; RV32ZBB-NEXT: addi a0, a0, 32 910; RV32ZBB-NEXT: li a1, 0 911; RV32ZBB-NEXT: ret 912; RV32ZBB-NEXT: .LBB7_2: 913; RV32ZBB-NEXT: ctz a0, a0 914; RV32ZBB-NEXT: li a1, 0 915; RV32ZBB-NEXT: ret 916; 917; RV64ZBB-LABEL: test_cttz_i64_zero_undef: 918; RV64ZBB: # %bb.0: 919; RV64ZBB-NEXT: ctz a0, a0 920; RV64ZBB-NEXT: ret 921; 922; RV32XTHEADBB-LABEL: test_cttz_i64_zero_undef: 923; RV32XTHEADBB: # %bb.0: 924; RV32XTHEADBB-NEXT: bnez a0, .LBB7_2 925; RV32XTHEADBB-NEXT: # %bb.1: 926; RV32XTHEADBB-NEXT: addi a0, a1, -1 927; RV32XTHEADBB-NEXT: not a1, a1 928; RV32XTHEADBB-NEXT: and a0, a1, a0 929; RV32XTHEADBB-NEXT: th.ff1 a0, a0 930; RV32XTHEADBB-NEXT: li a1, 64 931; RV32XTHEADBB-NEXT: j .LBB7_3 932; RV32XTHEADBB-NEXT: .LBB7_2: 933; RV32XTHEADBB-NEXT: addi a1, a0, -1 934; RV32XTHEADBB-NEXT: not a0, a0 935; RV32XTHEADBB-NEXT: and a0, a0, a1 936; RV32XTHEADBB-NEXT: th.ff1 a0, a0 937; RV32XTHEADBB-NEXT: li a1, 32 938; RV32XTHEADBB-NEXT: .LBB7_3: 939; RV32XTHEADBB-NEXT: sub a0, a1, a0 940; RV32XTHEADBB-NEXT: li a1, 0 941; RV32XTHEADBB-NEXT: ret 942; 943; RV64XTHEADBB-LABEL: test_cttz_i64_zero_undef: 944; RV64XTHEADBB: # %bb.0: 945; RV64XTHEADBB-NEXT: addi a1, a0, -1 946; RV64XTHEADBB-NEXT: not a0, a0 947; RV64XTHEADBB-NEXT: and a0, a0, a1 948; RV64XTHEADBB-NEXT: th.ff1 a0, a0 949; RV64XTHEADBB-NEXT: li a1, 64 950; RV64XTHEADBB-NEXT: sub a0, a1, a0 951; RV64XTHEADBB-NEXT: ret 952 %tmp = call i64 @llvm.cttz.i64(i64 %a, i1 true) 953 ret i64 %tmp 954} 955 956define i8 @test_ctlz_i8(i8 %a) nounwind { 957; RV32_NOZBB-LABEL: test_ctlz_i8: 958; RV32_NOZBB: # %bb.0: 959; RV32_NOZBB-NEXT: andi a1, a0, 255 960; RV32_NOZBB-NEXT: beqz a1, .LBB8_2 961; RV32_NOZBB-NEXT: # %bb.1: # %cond.false 962; RV32_NOZBB-NEXT: slli a1, a0, 24 963; RV32_NOZBB-NEXT: srli a1, a1, 25 964; RV32_NOZBB-NEXT: or a0, a0, a1 965; RV32_NOZBB-NEXT: slli a1, a0, 24 966; RV32_NOZBB-NEXT: srli a1, a1, 26 967; RV32_NOZBB-NEXT: or a0, a0, a1 968; RV32_NOZBB-NEXT: slli a1, a0, 24 969; RV32_NOZBB-NEXT: srli a1, a1, 28 970; RV32_NOZBB-NEXT: or a0, a0, a1 971; RV32_NOZBB-NEXT: not a0, a0 972; RV32_NOZBB-NEXT: srli a1, a0, 1 973; RV32_NOZBB-NEXT: andi a1, a1, 85 974; RV32_NOZBB-NEXT: sub a0, a0, a1 975; RV32_NOZBB-NEXT: andi a1, a0, 51 976; RV32_NOZBB-NEXT: srli a0, a0, 2 977; RV32_NOZBB-NEXT: andi a0, a0, 51 978; RV32_NOZBB-NEXT: add a0, a1, a0 979; RV32_NOZBB-NEXT: srli a1, a0, 4 980; RV32_NOZBB-NEXT: add a0, a0, a1 981; RV32_NOZBB-NEXT: andi a0, a0, 15 982; RV32_NOZBB-NEXT: ret 983; RV32_NOZBB-NEXT: .LBB8_2: 984; RV32_NOZBB-NEXT: li a0, 8 985; RV32_NOZBB-NEXT: ret 986; 987; RV64NOZBB-LABEL: test_ctlz_i8: 988; RV64NOZBB: # %bb.0: 989; RV64NOZBB-NEXT: andi a1, a0, 255 990; RV64NOZBB-NEXT: beqz a1, .LBB8_2 991; RV64NOZBB-NEXT: # %bb.1: # %cond.false 992; RV64NOZBB-NEXT: slli a1, a0, 56 993; RV64NOZBB-NEXT: srli a1, a1, 57 994; RV64NOZBB-NEXT: or a0, a0, a1 995; RV64NOZBB-NEXT: slli a1, a0, 56 996; RV64NOZBB-NEXT: srli a1, a1, 58 997; RV64NOZBB-NEXT: or a0, a0, a1 998; RV64NOZBB-NEXT: slli a1, a0, 56 999; RV64NOZBB-NEXT: srli a1, a1, 60 1000; RV64NOZBB-NEXT: or a0, a0, a1 1001; RV64NOZBB-NEXT: not a0, a0 1002; RV64NOZBB-NEXT: srli a1, a0, 1 1003; RV64NOZBB-NEXT: andi a1, a1, 85 1004; RV64NOZBB-NEXT: subw a0, a0, a1 1005; RV64NOZBB-NEXT: andi a1, a0, 51 1006; RV64NOZBB-NEXT: srli a0, a0, 2 1007; RV64NOZBB-NEXT: andi a0, a0, 51 1008; RV64NOZBB-NEXT: add a0, a1, a0 1009; RV64NOZBB-NEXT: srli a1, a0, 4 1010; RV64NOZBB-NEXT: add a0, a0, a1 1011; RV64NOZBB-NEXT: andi a0, a0, 15 1012; RV64NOZBB-NEXT: ret 1013; RV64NOZBB-NEXT: .LBB8_2: 1014; RV64NOZBB-NEXT: li a0, 8 1015; RV64NOZBB-NEXT: ret 1016; 1017; RV32ZBB-LABEL: test_ctlz_i8: 1018; RV32ZBB: # %bb.0: 1019; RV32ZBB-NEXT: andi a0, a0, 255 1020; RV32ZBB-NEXT: clz a0, a0 1021; RV32ZBB-NEXT: addi a0, a0, -24 1022; RV32ZBB-NEXT: ret 1023; 1024; RV64ZBB-LABEL: test_ctlz_i8: 1025; RV64ZBB: # %bb.0: 1026; RV64ZBB-NEXT: andi a0, a0, 255 1027; RV64ZBB-NEXT: clz a0, a0 1028; RV64ZBB-NEXT: addi a0, a0, -56 1029; RV64ZBB-NEXT: ret 1030; 1031; RV32XTHEADBB-LABEL: test_ctlz_i8: 1032; RV32XTHEADBB: # %bb.0: 1033; RV32XTHEADBB-NEXT: andi a0, a0, 255 1034; RV32XTHEADBB-NEXT: th.ff1 a0, a0 1035; RV32XTHEADBB-NEXT: addi a0, a0, -24 1036; RV32XTHEADBB-NEXT: ret 1037; 1038; RV64XTHEADBB-LABEL: test_ctlz_i8: 1039; RV64XTHEADBB: # %bb.0: 1040; RV64XTHEADBB-NEXT: andi a0, a0, 255 1041; RV64XTHEADBB-NEXT: th.ff1 a0, a0 1042; RV64XTHEADBB-NEXT: addi a0, a0, -56 1043; RV64XTHEADBB-NEXT: ret 1044 %tmp = call i8 @llvm.ctlz.i8(i8 %a, i1 false) 1045 ret i8 %tmp 1046} 1047 1048define i16 @test_ctlz_i16(i16 %a) nounwind { 1049; RV32_NOZBB-LABEL: test_ctlz_i16: 1050; RV32_NOZBB: # %bb.0: 1051; RV32_NOZBB-NEXT: slli a1, a0, 16 1052; RV32_NOZBB-NEXT: beqz a1, .LBB9_2 1053; RV32_NOZBB-NEXT: # %bb.1: # %cond.false 1054; RV32_NOZBB-NEXT: srli a1, a1, 17 1055; RV32_NOZBB-NEXT: lui a2, 5 1056; RV32_NOZBB-NEXT: or a0, a0, a1 1057; RV32_NOZBB-NEXT: addi a1, a2, 1365 1058; RV32_NOZBB-NEXT: slli a2, a0, 16 1059; RV32_NOZBB-NEXT: srli a2, a2, 18 1060; RV32_NOZBB-NEXT: or a0, a0, a2 1061; RV32_NOZBB-NEXT: slli a2, a0, 16 1062; RV32_NOZBB-NEXT: srli a2, a2, 20 1063; RV32_NOZBB-NEXT: or a0, a0, a2 1064; RV32_NOZBB-NEXT: slli a2, a0, 16 1065; RV32_NOZBB-NEXT: srli a2, a2, 24 1066; RV32_NOZBB-NEXT: or a0, a0, a2 1067; RV32_NOZBB-NEXT: not a0, a0 1068; RV32_NOZBB-NEXT: srli a2, a0, 1 1069; RV32_NOZBB-NEXT: and a1, a2, a1 1070; RV32_NOZBB-NEXT: lui a2, 3 1071; RV32_NOZBB-NEXT: addi a2, a2, 819 1072; RV32_NOZBB-NEXT: sub a0, a0, a1 1073; RV32_NOZBB-NEXT: and a1, a0, a2 1074; RV32_NOZBB-NEXT: srli a0, a0, 2 1075; RV32_NOZBB-NEXT: and a0, a0, a2 1076; RV32_NOZBB-NEXT: add a0, a1, a0 1077; RV32_NOZBB-NEXT: srli a1, a0, 4 1078; RV32_NOZBB-NEXT: add a0, a0, a1 1079; RV32_NOZBB-NEXT: andi a1, a0, 15 1080; RV32_NOZBB-NEXT: slli a0, a0, 20 1081; RV32_NOZBB-NEXT: srli a0, a0, 28 1082; RV32_NOZBB-NEXT: add a0, a1, a0 1083; RV32_NOZBB-NEXT: ret 1084; RV32_NOZBB-NEXT: .LBB9_2: 1085; RV32_NOZBB-NEXT: li a0, 16 1086; RV32_NOZBB-NEXT: ret 1087; 1088; RV64NOZBB-LABEL: test_ctlz_i16: 1089; RV64NOZBB: # %bb.0: 1090; RV64NOZBB-NEXT: slli a1, a0, 48 1091; RV64NOZBB-NEXT: beqz a1, .LBB9_2 1092; RV64NOZBB-NEXT: # %bb.1: # %cond.false 1093; RV64NOZBB-NEXT: srli a1, a1, 49 1094; RV64NOZBB-NEXT: lui a2, 5 1095; RV64NOZBB-NEXT: or a0, a0, a1 1096; RV64NOZBB-NEXT: addiw a1, a2, 1365 1097; RV64NOZBB-NEXT: slli a2, a0, 48 1098; RV64NOZBB-NEXT: srli a2, a2, 50 1099; RV64NOZBB-NEXT: or a0, a0, a2 1100; RV64NOZBB-NEXT: slli a2, a0, 48 1101; RV64NOZBB-NEXT: srli a2, a2, 52 1102; RV64NOZBB-NEXT: or a0, a0, a2 1103; RV64NOZBB-NEXT: slli a2, a0, 48 1104; RV64NOZBB-NEXT: srli a2, a2, 56 1105; RV64NOZBB-NEXT: or a0, a0, a2 1106; RV64NOZBB-NEXT: not a0, a0 1107; RV64NOZBB-NEXT: srli a2, a0, 1 1108; RV64NOZBB-NEXT: and a1, a2, a1 1109; RV64NOZBB-NEXT: lui a2, 3 1110; RV64NOZBB-NEXT: addiw a2, a2, 819 1111; RV64NOZBB-NEXT: sub a0, a0, a1 1112; RV64NOZBB-NEXT: and a1, a0, a2 1113; RV64NOZBB-NEXT: srli a0, a0, 2 1114; RV64NOZBB-NEXT: and a0, a0, a2 1115; RV64NOZBB-NEXT: add a0, a1, a0 1116; RV64NOZBB-NEXT: srli a1, a0, 4 1117; RV64NOZBB-NEXT: add a0, a0, a1 1118; RV64NOZBB-NEXT: andi a1, a0, 15 1119; RV64NOZBB-NEXT: slli a0, a0, 52 1120; RV64NOZBB-NEXT: srli a0, a0, 60 1121; RV64NOZBB-NEXT: add a0, a1, a0 1122; RV64NOZBB-NEXT: ret 1123; RV64NOZBB-NEXT: .LBB9_2: 1124; RV64NOZBB-NEXT: li a0, 16 1125; RV64NOZBB-NEXT: ret 1126; 1127; RV32ZBB-LABEL: test_ctlz_i16: 1128; RV32ZBB: # %bb.0: 1129; RV32ZBB-NEXT: zext.h a0, a0 1130; RV32ZBB-NEXT: clz a0, a0 1131; RV32ZBB-NEXT: addi a0, a0, -16 1132; RV32ZBB-NEXT: ret 1133; 1134; RV64ZBB-LABEL: test_ctlz_i16: 1135; RV64ZBB: # %bb.0: 1136; RV64ZBB-NEXT: zext.h a0, a0 1137; RV64ZBB-NEXT: clz a0, a0 1138; RV64ZBB-NEXT: addi a0, a0, -48 1139; RV64ZBB-NEXT: ret 1140; 1141; RV32XTHEADBB-LABEL: test_ctlz_i16: 1142; RV32XTHEADBB: # %bb.0: 1143; RV32XTHEADBB-NEXT: th.extu a0, a0, 15, 0 1144; RV32XTHEADBB-NEXT: th.ff1 a0, a0 1145; RV32XTHEADBB-NEXT: addi a0, a0, -16 1146; RV32XTHEADBB-NEXT: ret 1147; 1148; RV64XTHEADBB-LABEL: test_ctlz_i16: 1149; RV64XTHEADBB: # %bb.0: 1150; RV64XTHEADBB-NEXT: th.extu a0, a0, 15, 0 1151; RV64XTHEADBB-NEXT: th.ff1 a0, a0 1152; RV64XTHEADBB-NEXT: addi a0, a0, -48 1153; RV64XTHEADBB-NEXT: ret 1154 %tmp = call i16 @llvm.ctlz.i16(i16 %a, i1 false) 1155 ret i16 %tmp 1156} 1157 1158define i32 @test_ctlz_i32(i32 %a) nounwind { 1159; RV32I-LABEL: test_ctlz_i32: 1160; RV32I: # %bb.0: 1161; RV32I-NEXT: beqz a0, .LBB10_2 1162; RV32I-NEXT: # %bb.1: # %cond.false 1163; RV32I-NEXT: srli a1, a0, 1 1164; RV32I-NEXT: lui a2, 349525 1165; RV32I-NEXT: or a0, a0, a1 1166; RV32I-NEXT: addi a1, a2, 1365 1167; RV32I-NEXT: srli a2, a0, 2 1168; RV32I-NEXT: or a0, a0, a2 1169; RV32I-NEXT: srli a2, a0, 4 1170; RV32I-NEXT: or a0, a0, a2 1171; RV32I-NEXT: srli a2, a0, 8 1172; RV32I-NEXT: or a0, a0, a2 1173; RV32I-NEXT: srli a2, a0, 16 1174; RV32I-NEXT: or a0, a0, a2 1175; RV32I-NEXT: not a0, a0 1176; RV32I-NEXT: srli a2, a0, 1 1177; RV32I-NEXT: and a1, a2, a1 1178; RV32I-NEXT: lui a2, 209715 1179; RV32I-NEXT: addi a2, a2, 819 1180; RV32I-NEXT: sub a0, a0, a1 1181; RV32I-NEXT: and a1, a0, a2 1182; RV32I-NEXT: srli a0, a0, 2 1183; RV32I-NEXT: and a0, a0, a2 1184; RV32I-NEXT: lui a2, 61681 1185; RV32I-NEXT: add a0, a1, a0 1186; RV32I-NEXT: srli a1, a0, 4 1187; RV32I-NEXT: add a0, a0, a1 1188; RV32I-NEXT: addi a1, a2, -241 1189; RV32I-NEXT: and a0, a0, a1 1190; RV32I-NEXT: slli a1, a0, 8 1191; RV32I-NEXT: add a0, a0, a1 1192; RV32I-NEXT: slli a1, a0, 16 1193; RV32I-NEXT: add a0, a0, a1 1194; RV32I-NEXT: srli a0, a0, 24 1195; RV32I-NEXT: ret 1196; RV32I-NEXT: .LBB10_2: 1197; RV32I-NEXT: li a0, 32 1198; RV32I-NEXT: ret 1199; 1200; RV64I-LABEL: test_ctlz_i32: 1201; RV64I: # %bb.0: 1202; RV64I-NEXT: sext.w a1, a0 1203; RV64I-NEXT: beqz a1, .LBB10_2 1204; RV64I-NEXT: # %bb.1: # %cond.false 1205; RV64I-NEXT: srliw a1, a0, 1 1206; RV64I-NEXT: lui a2, 349525 1207; RV64I-NEXT: or a0, a0, a1 1208; RV64I-NEXT: addiw a1, a2, 1365 1209; RV64I-NEXT: srliw a2, a0, 2 1210; RV64I-NEXT: or a0, a0, a2 1211; RV64I-NEXT: srliw a2, a0, 4 1212; RV64I-NEXT: or a0, a0, a2 1213; RV64I-NEXT: srliw a2, a0, 8 1214; RV64I-NEXT: or a0, a0, a2 1215; RV64I-NEXT: srliw a2, a0, 16 1216; RV64I-NEXT: or a0, a0, a2 1217; RV64I-NEXT: not a0, a0 1218; RV64I-NEXT: srli a2, a0, 1 1219; RV64I-NEXT: and a1, a2, a1 1220; RV64I-NEXT: lui a2, 209715 1221; RV64I-NEXT: addiw a2, a2, 819 1222; RV64I-NEXT: sub a0, a0, a1 1223; RV64I-NEXT: and a1, a0, a2 1224; RV64I-NEXT: srli a0, a0, 2 1225; RV64I-NEXT: and a0, a0, a2 1226; RV64I-NEXT: lui a2, 61681 1227; RV64I-NEXT: add a0, a1, a0 1228; RV64I-NEXT: srli a1, a0, 4 1229; RV64I-NEXT: add a0, a0, a1 1230; RV64I-NEXT: addi a1, a2, -241 1231; RV64I-NEXT: and a0, a0, a1 1232; RV64I-NEXT: slli a1, a0, 8 1233; RV64I-NEXT: add a0, a0, a1 1234; RV64I-NEXT: slli a1, a0, 16 1235; RV64I-NEXT: add a0, a0, a1 1236; RV64I-NEXT: srliw a0, a0, 24 1237; RV64I-NEXT: ret 1238; RV64I-NEXT: .LBB10_2: 1239; RV64I-NEXT: li a0, 32 1240; RV64I-NEXT: ret 1241; 1242; RV32M-LABEL: test_ctlz_i32: 1243; RV32M: # %bb.0: 1244; RV32M-NEXT: beqz a0, .LBB10_2 1245; RV32M-NEXT: # %bb.1: # %cond.false 1246; RV32M-NEXT: srli a1, a0, 1 1247; RV32M-NEXT: lui a2, 349525 1248; RV32M-NEXT: or a0, a0, a1 1249; RV32M-NEXT: addi a1, a2, 1365 1250; RV32M-NEXT: srli a2, a0, 2 1251; RV32M-NEXT: or a0, a0, a2 1252; RV32M-NEXT: srli a2, a0, 4 1253; RV32M-NEXT: or a0, a0, a2 1254; RV32M-NEXT: srli a2, a0, 8 1255; RV32M-NEXT: or a0, a0, a2 1256; RV32M-NEXT: srli a2, a0, 16 1257; RV32M-NEXT: or a0, a0, a2 1258; RV32M-NEXT: not a0, a0 1259; RV32M-NEXT: srli a2, a0, 1 1260; RV32M-NEXT: and a1, a2, a1 1261; RV32M-NEXT: lui a2, 209715 1262; RV32M-NEXT: addi a2, a2, 819 1263; RV32M-NEXT: sub a0, a0, a1 1264; RV32M-NEXT: and a1, a0, a2 1265; RV32M-NEXT: srli a0, a0, 2 1266; RV32M-NEXT: and a0, a0, a2 1267; RV32M-NEXT: lui a2, 61681 1268; RV32M-NEXT: add a0, a1, a0 1269; RV32M-NEXT: srli a1, a0, 4 1270; RV32M-NEXT: add a0, a0, a1 1271; RV32M-NEXT: lui a1, 4112 1272; RV32M-NEXT: addi a2, a2, -241 1273; RV32M-NEXT: and a0, a0, a2 1274; RV32M-NEXT: addi a1, a1, 257 1275; RV32M-NEXT: mul a0, a0, a1 1276; RV32M-NEXT: srli a0, a0, 24 1277; RV32M-NEXT: ret 1278; RV32M-NEXT: .LBB10_2: 1279; RV32M-NEXT: li a0, 32 1280; RV32M-NEXT: ret 1281; 1282; RV64M-LABEL: test_ctlz_i32: 1283; RV64M: # %bb.0: 1284; RV64M-NEXT: sext.w a1, a0 1285; RV64M-NEXT: beqz a1, .LBB10_2 1286; RV64M-NEXT: # %bb.1: # %cond.false 1287; RV64M-NEXT: srliw a1, a0, 1 1288; RV64M-NEXT: lui a2, 349525 1289; RV64M-NEXT: or a0, a0, a1 1290; RV64M-NEXT: addiw a1, a2, 1365 1291; RV64M-NEXT: srliw a2, a0, 2 1292; RV64M-NEXT: or a0, a0, a2 1293; RV64M-NEXT: srliw a2, a0, 4 1294; RV64M-NEXT: or a0, a0, a2 1295; RV64M-NEXT: srliw a2, a0, 8 1296; RV64M-NEXT: or a0, a0, a2 1297; RV64M-NEXT: srliw a2, a0, 16 1298; RV64M-NEXT: or a0, a0, a2 1299; RV64M-NEXT: not a0, a0 1300; RV64M-NEXT: srli a2, a0, 1 1301; RV64M-NEXT: and a1, a2, a1 1302; RV64M-NEXT: lui a2, 209715 1303; RV64M-NEXT: addiw a2, a2, 819 1304; RV64M-NEXT: sub a0, a0, a1 1305; RV64M-NEXT: and a1, a0, a2 1306; RV64M-NEXT: srli a0, a0, 2 1307; RV64M-NEXT: and a0, a0, a2 1308; RV64M-NEXT: lui a2, 61681 1309; RV64M-NEXT: add a0, a1, a0 1310; RV64M-NEXT: srli a1, a0, 4 1311; RV64M-NEXT: add a0, a0, a1 1312; RV64M-NEXT: lui a1, 4112 1313; RV64M-NEXT: addi a2, a2, -241 1314; RV64M-NEXT: and a0, a0, a2 1315; RV64M-NEXT: addi a1, a1, 257 1316; RV64M-NEXT: mul a0, a0, a1 1317; RV64M-NEXT: srliw a0, a0, 24 1318; RV64M-NEXT: ret 1319; RV64M-NEXT: .LBB10_2: 1320; RV64M-NEXT: li a0, 32 1321; RV64M-NEXT: ret 1322; 1323; RV32ZBB-LABEL: test_ctlz_i32: 1324; RV32ZBB: # %bb.0: 1325; RV32ZBB-NEXT: clz a0, a0 1326; RV32ZBB-NEXT: ret 1327; 1328; RV64ZBB-LABEL: test_ctlz_i32: 1329; RV64ZBB: # %bb.0: 1330; RV64ZBB-NEXT: clzw a0, a0 1331; RV64ZBB-NEXT: ret 1332; 1333; RV32XTHEADBB-LABEL: test_ctlz_i32: 1334; RV32XTHEADBB: # %bb.0: 1335; RV32XTHEADBB-NEXT: th.ff1 a0, a0 1336; RV32XTHEADBB-NEXT: ret 1337; 1338; RV64XTHEADBB-LABEL: test_ctlz_i32: 1339; RV64XTHEADBB: # %bb.0: 1340; RV64XTHEADBB-NEXT: not a0, a0 1341; RV64XTHEADBB-NEXT: slli a0, a0, 32 1342; RV64XTHEADBB-NEXT: th.ff0 a0, a0 1343; RV64XTHEADBB-NEXT: ret 1344 %tmp = call i32 @llvm.ctlz.i32(i32 %a, i1 false) 1345 ret i32 %tmp 1346} 1347 1348define i64 @test_ctlz_i64(i64 %a) nounwind { 1349; RV32I-LABEL: test_ctlz_i64: 1350; RV32I: # %bb.0: 1351; RV32I-NEXT: lui a2, 349525 1352; RV32I-NEXT: lui a3, 209715 1353; RV32I-NEXT: lui a5, 61681 1354; RV32I-NEXT: addi a4, a2, 1365 1355; RV32I-NEXT: addi a3, a3, 819 1356; RV32I-NEXT: addi a2, a5, -241 1357; RV32I-NEXT: bnez a1, .LBB11_2 1358; RV32I-NEXT: # %bb.1: 1359; RV32I-NEXT: srli a1, a0, 1 1360; RV32I-NEXT: or a0, a0, a1 1361; RV32I-NEXT: srli a1, a0, 2 1362; RV32I-NEXT: or a0, a0, a1 1363; RV32I-NEXT: srli a1, a0, 4 1364; RV32I-NEXT: or a0, a0, a1 1365; RV32I-NEXT: srli a1, a0, 8 1366; RV32I-NEXT: or a0, a0, a1 1367; RV32I-NEXT: srli a1, a0, 16 1368; RV32I-NEXT: or a0, a0, a1 1369; RV32I-NEXT: not a0, a0 1370; RV32I-NEXT: srli a1, a0, 1 1371; RV32I-NEXT: and a1, a1, a4 1372; RV32I-NEXT: sub a0, a0, a1 1373; RV32I-NEXT: and a1, a0, a3 1374; RV32I-NEXT: srli a0, a0, 2 1375; RV32I-NEXT: and a0, a0, a3 1376; RV32I-NEXT: add a0, a1, a0 1377; RV32I-NEXT: srli a1, a0, 4 1378; RV32I-NEXT: add a0, a0, a1 1379; RV32I-NEXT: and a0, a0, a2 1380; RV32I-NEXT: slli a1, a0, 8 1381; RV32I-NEXT: add a0, a0, a1 1382; RV32I-NEXT: slli a1, a0, 16 1383; RV32I-NEXT: add a0, a0, a1 1384; RV32I-NEXT: srli a0, a0, 24 1385; RV32I-NEXT: addi a0, a0, 32 1386; RV32I-NEXT: li a1, 0 1387; RV32I-NEXT: ret 1388; RV32I-NEXT: .LBB11_2: 1389; RV32I-NEXT: srli a0, a1, 1 1390; RV32I-NEXT: or a0, a1, a0 1391; RV32I-NEXT: srli a1, a0, 2 1392; RV32I-NEXT: or a0, a0, a1 1393; RV32I-NEXT: srli a1, a0, 4 1394; RV32I-NEXT: or a0, a0, a1 1395; RV32I-NEXT: srli a1, a0, 8 1396; RV32I-NEXT: or a0, a0, a1 1397; RV32I-NEXT: srli a1, a0, 16 1398; RV32I-NEXT: or a0, a0, a1 1399; RV32I-NEXT: not a0, a0 1400; RV32I-NEXT: srli a1, a0, 1 1401; RV32I-NEXT: and a1, a1, a4 1402; RV32I-NEXT: sub a0, a0, a1 1403; RV32I-NEXT: and a1, a0, a3 1404; RV32I-NEXT: srli a0, a0, 2 1405; RV32I-NEXT: and a0, a0, a3 1406; RV32I-NEXT: add a0, a1, a0 1407; RV32I-NEXT: srli a1, a0, 4 1408; RV32I-NEXT: add a0, a0, a1 1409; RV32I-NEXT: and a0, a0, a2 1410; RV32I-NEXT: slli a1, a0, 8 1411; RV32I-NEXT: add a0, a0, a1 1412; RV32I-NEXT: slli a1, a0, 16 1413; RV32I-NEXT: add a0, a0, a1 1414; RV32I-NEXT: srli a0, a0, 24 1415; RV32I-NEXT: li a1, 0 1416; RV32I-NEXT: ret 1417; 1418; RV64I-LABEL: test_ctlz_i64: 1419; RV64I: # %bb.0: 1420; RV64I-NEXT: beqz a0, .LBB11_2 1421; RV64I-NEXT: # %bb.1: # %cond.false 1422; RV64I-NEXT: srli a1, a0, 1 1423; RV64I-NEXT: lui a2, 349525 1424; RV64I-NEXT: lui a3, 209715 1425; RV64I-NEXT: or a0, a0, a1 1426; RV64I-NEXT: addiw a1, a2, 1365 1427; RV64I-NEXT: addiw a2, a3, 819 1428; RV64I-NEXT: srli a3, a0, 2 1429; RV64I-NEXT: or a0, a0, a3 1430; RV64I-NEXT: slli a3, a1, 32 1431; RV64I-NEXT: add a1, a1, a3 1432; RV64I-NEXT: slli a3, a2, 32 1433; RV64I-NEXT: add a2, a2, a3 1434; RV64I-NEXT: srli a3, a0, 4 1435; RV64I-NEXT: or a0, a0, a3 1436; RV64I-NEXT: srli a3, a0, 8 1437; RV64I-NEXT: or a0, a0, a3 1438; RV64I-NEXT: srli a3, a0, 16 1439; RV64I-NEXT: or a0, a0, a3 1440; RV64I-NEXT: srli a3, a0, 32 1441; RV64I-NEXT: or a0, a0, a3 1442; RV64I-NEXT: not a0, a0 1443; RV64I-NEXT: srli a3, a0, 1 1444; RV64I-NEXT: and a1, a3, a1 1445; RV64I-NEXT: lui a3, 61681 1446; RV64I-NEXT: addiw a3, a3, -241 1447; RV64I-NEXT: sub a0, a0, a1 1448; RV64I-NEXT: and a1, a0, a2 1449; RV64I-NEXT: srli a0, a0, 2 1450; RV64I-NEXT: and a0, a0, a2 1451; RV64I-NEXT: slli a2, a3, 32 1452; RV64I-NEXT: add a0, a1, a0 1453; RV64I-NEXT: srli a1, a0, 4 1454; RV64I-NEXT: add a0, a0, a1 1455; RV64I-NEXT: add a2, a3, a2 1456; RV64I-NEXT: and a0, a0, a2 1457; RV64I-NEXT: slli a1, a0, 8 1458; RV64I-NEXT: add a0, a0, a1 1459; RV64I-NEXT: slli a1, a0, 16 1460; RV64I-NEXT: add a0, a0, a1 1461; RV64I-NEXT: slli a1, a0, 32 1462; RV64I-NEXT: add a0, a0, a1 1463; RV64I-NEXT: srli a0, a0, 56 1464; RV64I-NEXT: ret 1465; RV64I-NEXT: .LBB11_2: 1466; RV64I-NEXT: li a0, 64 1467; RV64I-NEXT: ret 1468; 1469; RV32M-LABEL: test_ctlz_i64: 1470; RV32M: # %bb.0: 1471; RV32M-NEXT: lui a2, 349525 1472; RV32M-NEXT: lui a3, 209715 1473; RV32M-NEXT: lui a6, 61681 1474; RV32M-NEXT: lui a7, 4112 1475; RV32M-NEXT: addi a5, a2, 1365 1476; RV32M-NEXT: addi a4, a3, 819 1477; RV32M-NEXT: addi a3, a6, -241 1478; RV32M-NEXT: addi a2, a7, 257 1479; RV32M-NEXT: bnez a1, .LBB11_2 1480; RV32M-NEXT: # %bb.1: 1481; RV32M-NEXT: srli a1, a0, 1 1482; RV32M-NEXT: or a0, a0, a1 1483; RV32M-NEXT: srli a1, a0, 2 1484; RV32M-NEXT: or a0, a0, a1 1485; RV32M-NEXT: srli a1, a0, 4 1486; RV32M-NEXT: or a0, a0, a1 1487; RV32M-NEXT: srli a1, a0, 8 1488; RV32M-NEXT: or a0, a0, a1 1489; RV32M-NEXT: srli a1, a0, 16 1490; RV32M-NEXT: or a0, a0, a1 1491; RV32M-NEXT: not a0, a0 1492; RV32M-NEXT: srli a1, a0, 1 1493; RV32M-NEXT: and a1, a1, a5 1494; RV32M-NEXT: sub a0, a0, a1 1495; RV32M-NEXT: and a1, a0, a4 1496; RV32M-NEXT: srli a0, a0, 2 1497; RV32M-NEXT: and a0, a0, a4 1498; RV32M-NEXT: add a0, a1, a0 1499; RV32M-NEXT: srli a1, a0, 4 1500; RV32M-NEXT: add a0, a0, a1 1501; RV32M-NEXT: and a0, a0, a3 1502; RV32M-NEXT: mul a0, a0, a2 1503; RV32M-NEXT: srli a0, a0, 24 1504; RV32M-NEXT: addi a0, a0, 32 1505; RV32M-NEXT: li a1, 0 1506; RV32M-NEXT: ret 1507; RV32M-NEXT: .LBB11_2: 1508; RV32M-NEXT: srli a0, a1, 1 1509; RV32M-NEXT: or a0, a1, a0 1510; RV32M-NEXT: srli a1, a0, 2 1511; RV32M-NEXT: or a0, a0, a1 1512; RV32M-NEXT: srli a1, a0, 4 1513; RV32M-NEXT: or a0, a0, a1 1514; RV32M-NEXT: srli a1, a0, 8 1515; RV32M-NEXT: or a0, a0, a1 1516; RV32M-NEXT: srli a1, a0, 16 1517; RV32M-NEXT: or a0, a0, a1 1518; RV32M-NEXT: not a0, a0 1519; RV32M-NEXT: srli a1, a0, 1 1520; RV32M-NEXT: and a1, a1, a5 1521; RV32M-NEXT: sub a0, a0, a1 1522; RV32M-NEXT: and a1, a0, a4 1523; RV32M-NEXT: srli a0, a0, 2 1524; RV32M-NEXT: and a0, a0, a4 1525; RV32M-NEXT: add a0, a1, a0 1526; RV32M-NEXT: srli a1, a0, 4 1527; RV32M-NEXT: add a0, a0, a1 1528; RV32M-NEXT: and a0, a0, a3 1529; RV32M-NEXT: mul a0, a0, a2 1530; RV32M-NEXT: srli a0, a0, 24 1531; RV32M-NEXT: li a1, 0 1532; RV32M-NEXT: ret 1533; 1534; RV64M-LABEL: test_ctlz_i64: 1535; RV64M: # %bb.0: 1536; RV64M-NEXT: beqz a0, .LBB11_2 1537; RV64M-NEXT: # %bb.1: # %cond.false 1538; RV64M-NEXT: srli a1, a0, 1 1539; RV64M-NEXT: lui a2, 349525 1540; RV64M-NEXT: lui a3, 209715 1541; RV64M-NEXT: lui a4, 61681 1542; RV64M-NEXT: or a0, a0, a1 1543; RV64M-NEXT: addiw a1, a2, 1365 1544; RV64M-NEXT: addiw a2, a3, 819 1545; RV64M-NEXT: addiw a3, a4, -241 1546; RV64M-NEXT: srli a4, a0, 2 1547; RV64M-NEXT: or a0, a0, a4 1548; RV64M-NEXT: slli a4, a1, 32 1549; RV64M-NEXT: add a1, a1, a4 1550; RV64M-NEXT: slli a4, a2, 32 1551; RV64M-NEXT: add a2, a2, a4 1552; RV64M-NEXT: slli a4, a3, 32 1553; RV64M-NEXT: add a3, a3, a4 1554; RV64M-NEXT: srli a4, a0, 4 1555; RV64M-NEXT: or a0, a0, a4 1556; RV64M-NEXT: srli a4, a0, 8 1557; RV64M-NEXT: or a0, a0, a4 1558; RV64M-NEXT: srli a4, a0, 16 1559; RV64M-NEXT: or a0, a0, a4 1560; RV64M-NEXT: srli a4, a0, 32 1561; RV64M-NEXT: or a0, a0, a4 1562; RV64M-NEXT: not a0, a0 1563; RV64M-NEXT: srli a4, a0, 1 1564; RV64M-NEXT: and a1, a4, a1 1565; RV64M-NEXT: sub a0, a0, a1 1566; RV64M-NEXT: and a1, a0, a2 1567; RV64M-NEXT: srli a0, a0, 2 1568; RV64M-NEXT: and a0, a0, a2 1569; RV64M-NEXT: lui a2, 4112 1570; RV64M-NEXT: addiw a2, a2, 257 1571; RV64M-NEXT: add a0, a1, a0 1572; RV64M-NEXT: srli a1, a0, 4 1573; RV64M-NEXT: add a0, a0, a1 1574; RV64M-NEXT: slli a1, a2, 32 1575; RV64M-NEXT: and a0, a0, a3 1576; RV64M-NEXT: add a1, a2, a1 1577; RV64M-NEXT: mul a0, a0, a1 1578; RV64M-NEXT: srli a0, a0, 56 1579; RV64M-NEXT: ret 1580; RV64M-NEXT: .LBB11_2: 1581; RV64M-NEXT: li a0, 64 1582; RV64M-NEXT: ret 1583; 1584; RV32ZBB-LABEL: test_ctlz_i64: 1585; RV32ZBB: # %bb.0: 1586; RV32ZBB-NEXT: bnez a1, .LBB11_2 1587; RV32ZBB-NEXT: # %bb.1: 1588; RV32ZBB-NEXT: clz a0, a0 1589; RV32ZBB-NEXT: addi a0, a0, 32 1590; RV32ZBB-NEXT: li a1, 0 1591; RV32ZBB-NEXT: ret 1592; RV32ZBB-NEXT: .LBB11_2: 1593; RV32ZBB-NEXT: clz a0, a1 1594; RV32ZBB-NEXT: li a1, 0 1595; RV32ZBB-NEXT: ret 1596; 1597; RV64ZBB-LABEL: test_ctlz_i64: 1598; RV64ZBB: # %bb.0: 1599; RV64ZBB-NEXT: clz a0, a0 1600; RV64ZBB-NEXT: ret 1601; 1602; RV32XTHEADBB-LABEL: test_ctlz_i64: 1603; RV32XTHEADBB: # %bb.0: 1604; RV32XTHEADBB-NEXT: bnez a1, .LBB11_2 1605; RV32XTHEADBB-NEXT: # %bb.1: 1606; RV32XTHEADBB-NEXT: th.ff1 a0, a0 1607; RV32XTHEADBB-NEXT: addi a0, a0, 32 1608; RV32XTHEADBB-NEXT: li a1, 0 1609; RV32XTHEADBB-NEXT: ret 1610; RV32XTHEADBB-NEXT: .LBB11_2: 1611; RV32XTHEADBB-NEXT: th.ff1 a0, a1 1612; RV32XTHEADBB-NEXT: li a1, 0 1613; RV32XTHEADBB-NEXT: ret 1614; 1615; RV64XTHEADBB-LABEL: test_ctlz_i64: 1616; RV64XTHEADBB: # %bb.0: 1617; RV64XTHEADBB-NEXT: th.ff1 a0, a0 1618; RV64XTHEADBB-NEXT: ret 1619 %tmp = call i64 @llvm.ctlz.i64(i64 %a, i1 false) 1620 ret i64 %tmp 1621} 1622 1623define i8 @test_ctlz_i8_zero_undef(i8 %a) nounwind { 1624; RV32_NOZBB-LABEL: test_ctlz_i8_zero_undef: 1625; RV32_NOZBB: # %bb.0: 1626; RV32_NOZBB-NEXT: slli a1, a0, 24 1627; RV32_NOZBB-NEXT: srli a1, a1, 25 1628; RV32_NOZBB-NEXT: or a0, a0, a1 1629; RV32_NOZBB-NEXT: slli a1, a0, 24 1630; RV32_NOZBB-NEXT: srli a1, a1, 26 1631; RV32_NOZBB-NEXT: or a0, a0, a1 1632; RV32_NOZBB-NEXT: slli a1, a0, 24 1633; RV32_NOZBB-NEXT: srli a1, a1, 28 1634; RV32_NOZBB-NEXT: or a0, a0, a1 1635; RV32_NOZBB-NEXT: not a0, a0 1636; RV32_NOZBB-NEXT: srli a1, a0, 1 1637; RV32_NOZBB-NEXT: andi a1, a1, 85 1638; RV32_NOZBB-NEXT: sub a0, a0, a1 1639; RV32_NOZBB-NEXT: andi a1, a0, 51 1640; RV32_NOZBB-NEXT: srli a0, a0, 2 1641; RV32_NOZBB-NEXT: andi a0, a0, 51 1642; RV32_NOZBB-NEXT: add a0, a1, a0 1643; RV32_NOZBB-NEXT: srli a1, a0, 4 1644; RV32_NOZBB-NEXT: add a0, a0, a1 1645; RV32_NOZBB-NEXT: andi a0, a0, 15 1646; RV32_NOZBB-NEXT: ret 1647; 1648; RV64NOZBB-LABEL: test_ctlz_i8_zero_undef: 1649; RV64NOZBB: # %bb.0: 1650; RV64NOZBB-NEXT: slli a1, a0, 56 1651; RV64NOZBB-NEXT: srli a1, a1, 57 1652; RV64NOZBB-NEXT: or a0, a0, a1 1653; RV64NOZBB-NEXT: slli a1, a0, 56 1654; RV64NOZBB-NEXT: srli a1, a1, 58 1655; RV64NOZBB-NEXT: or a0, a0, a1 1656; RV64NOZBB-NEXT: slli a1, a0, 56 1657; RV64NOZBB-NEXT: srli a1, a1, 60 1658; RV64NOZBB-NEXT: or a0, a0, a1 1659; RV64NOZBB-NEXT: not a0, a0 1660; RV64NOZBB-NEXT: srli a1, a0, 1 1661; RV64NOZBB-NEXT: andi a1, a1, 85 1662; RV64NOZBB-NEXT: subw a0, a0, a1 1663; RV64NOZBB-NEXT: andi a1, a0, 51 1664; RV64NOZBB-NEXT: srli a0, a0, 2 1665; RV64NOZBB-NEXT: andi a0, a0, 51 1666; RV64NOZBB-NEXT: add a0, a1, a0 1667; RV64NOZBB-NEXT: srli a1, a0, 4 1668; RV64NOZBB-NEXT: add a0, a0, a1 1669; RV64NOZBB-NEXT: andi a0, a0, 15 1670; RV64NOZBB-NEXT: ret 1671; 1672; RV32ZBB-LABEL: test_ctlz_i8_zero_undef: 1673; RV32ZBB: # %bb.0: 1674; RV32ZBB-NEXT: slli a0, a0, 24 1675; RV32ZBB-NEXT: clz a0, a0 1676; RV32ZBB-NEXT: ret 1677; 1678; RV64ZBB-LABEL: test_ctlz_i8_zero_undef: 1679; RV64ZBB: # %bb.0: 1680; RV64ZBB-NEXT: slli a0, a0, 56 1681; RV64ZBB-NEXT: clz a0, a0 1682; RV64ZBB-NEXT: ret 1683; 1684; RV32XTHEADBB-LABEL: test_ctlz_i8_zero_undef: 1685; RV32XTHEADBB: # %bb.0: 1686; RV32XTHEADBB-NEXT: slli a0, a0, 24 1687; RV32XTHEADBB-NEXT: th.ff1 a0, a0 1688; RV32XTHEADBB-NEXT: ret 1689; 1690; RV64XTHEADBB-LABEL: test_ctlz_i8_zero_undef: 1691; RV64XTHEADBB: # %bb.0: 1692; RV64XTHEADBB-NEXT: slli a0, a0, 56 1693; RV64XTHEADBB-NEXT: th.ff1 a0, a0 1694; RV64XTHEADBB-NEXT: ret 1695 %tmp = call i8 @llvm.ctlz.i8(i8 %a, i1 true) 1696 ret i8 %tmp 1697} 1698 1699define i16 @test_ctlz_i16_zero_undef(i16 %a) nounwind { 1700; RV32_NOZBB-LABEL: test_ctlz_i16_zero_undef: 1701; RV32_NOZBB: # %bb.0: 1702; RV32_NOZBB-NEXT: slli a1, a0, 16 1703; RV32_NOZBB-NEXT: lui a2, 5 1704; RV32_NOZBB-NEXT: srli a1, a1, 17 1705; RV32_NOZBB-NEXT: addi a2, a2, 1365 1706; RV32_NOZBB-NEXT: or a0, a0, a1 1707; RV32_NOZBB-NEXT: slli a1, a0, 16 1708; RV32_NOZBB-NEXT: srli a1, a1, 18 1709; RV32_NOZBB-NEXT: or a0, a0, a1 1710; RV32_NOZBB-NEXT: slli a1, a0, 16 1711; RV32_NOZBB-NEXT: srli a1, a1, 20 1712; RV32_NOZBB-NEXT: or a0, a0, a1 1713; RV32_NOZBB-NEXT: slli a1, a0, 16 1714; RV32_NOZBB-NEXT: srli a1, a1, 24 1715; RV32_NOZBB-NEXT: or a0, a0, a1 1716; RV32_NOZBB-NEXT: not a0, a0 1717; RV32_NOZBB-NEXT: srli a1, a0, 1 1718; RV32_NOZBB-NEXT: and a1, a1, a2 1719; RV32_NOZBB-NEXT: lui a2, 3 1720; RV32_NOZBB-NEXT: addi a2, a2, 819 1721; RV32_NOZBB-NEXT: sub a0, a0, a1 1722; RV32_NOZBB-NEXT: and a1, a0, a2 1723; RV32_NOZBB-NEXT: srli a0, a0, 2 1724; RV32_NOZBB-NEXT: and a0, a0, a2 1725; RV32_NOZBB-NEXT: add a0, a1, a0 1726; RV32_NOZBB-NEXT: srli a1, a0, 4 1727; RV32_NOZBB-NEXT: add a0, a0, a1 1728; RV32_NOZBB-NEXT: andi a1, a0, 15 1729; RV32_NOZBB-NEXT: slli a0, a0, 20 1730; RV32_NOZBB-NEXT: srli a0, a0, 28 1731; RV32_NOZBB-NEXT: add a0, a1, a0 1732; RV32_NOZBB-NEXT: ret 1733; 1734; RV64NOZBB-LABEL: test_ctlz_i16_zero_undef: 1735; RV64NOZBB: # %bb.0: 1736; RV64NOZBB-NEXT: slli a1, a0, 48 1737; RV64NOZBB-NEXT: lui a2, 5 1738; RV64NOZBB-NEXT: srli a1, a1, 49 1739; RV64NOZBB-NEXT: addiw a2, a2, 1365 1740; RV64NOZBB-NEXT: or a0, a0, a1 1741; RV64NOZBB-NEXT: slli a1, a0, 48 1742; RV64NOZBB-NEXT: srli a1, a1, 50 1743; RV64NOZBB-NEXT: or a0, a0, a1 1744; RV64NOZBB-NEXT: slli a1, a0, 48 1745; RV64NOZBB-NEXT: srli a1, a1, 52 1746; RV64NOZBB-NEXT: or a0, a0, a1 1747; RV64NOZBB-NEXT: slli a1, a0, 48 1748; RV64NOZBB-NEXT: srli a1, a1, 56 1749; RV64NOZBB-NEXT: or a0, a0, a1 1750; RV64NOZBB-NEXT: not a0, a0 1751; RV64NOZBB-NEXT: srli a1, a0, 1 1752; RV64NOZBB-NEXT: and a1, a1, a2 1753; RV64NOZBB-NEXT: lui a2, 3 1754; RV64NOZBB-NEXT: addiw a2, a2, 819 1755; RV64NOZBB-NEXT: sub a0, a0, a1 1756; RV64NOZBB-NEXT: and a1, a0, a2 1757; RV64NOZBB-NEXT: srli a0, a0, 2 1758; RV64NOZBB-NEXT: and a0, a0, a2 1759; RV64NOZBB-NEXT: add a0, a1, a0 1760; RV64NOZBB-NEXT: srli a1, a0, 4 1761; RV64NOZBB-NEXT: add a0, a0, a1 1762; RV64NOZBB-NEXT: andi a1, a0, 15 1763; RV64NOZBB-NEXT: slli a0, a0, 52 1764; RV64NOZBB-NEXT: srli a0, a0, 60 1765; RV64NOZBB-NEXT: add a0, a1, a0 1766; RV64NOZBB-NEXT: ret 1767; 1768; RV32ZBB-LABEL: test_ctlz_i16_zero_undef: 1769; RV32ZBB: # %bb.0: 1770; RV32ZBB-NEXT: slli a0, a0, 16 1771; RV32ZBB-NEXT: clz a0, a0 1772; RV32ZBB-NEXT: ret 1773; 1774; RV64ZBB-LABEL: test_ctlz_i16_zero_undef: 1775; RV64ZBB: # %bb.0: 1776; RV64ZBB-NEXT: slli a0, a0, 48 1777; RV64ZBB-NEXT: clz a0, a0 1778; RV64ZBB-NEXT: ret 1779; 1780; RV32XTHEADBB-LABEL: test_ctlz_i16_zero_undef: 1781; RV32XTHEADBB: # %bb.0: 1782; RV32XTHEADBB-NEXT: slli a0, a0, 16 1783; RV32XTHEADBB-NEXT: th.ff1 a0, a0 1784; RV32XTHEADBB-NEXT: ret 1785; 1786; RV64XTHEADBB-LABEL: test_ctlz_i16_zero_undef: 1787; RV64XTHEADBB: # %bb.0: 1788; RV64XTHEADBB-NEXT: slli a0, a0, 48 1789; RV64XTHEADBB-NEXT: th.ff1 a0, a0 1790; RV64XTHEADBB-NEXT: ret 1791 %tmp = call i16 @llvm.ctlz.i16(i16 %a, i1 true) 1792 ret i16 %tmp 1793} 1794 1795define i32 @test_ctlz_i32_zero_undef(i32 %a) nounwind { 1796; RV32I-LABEL: test_ctlz_i32_zero_undef: 1797; RV32I: # %bb.0: 1798; RV32I-NEXT: srli a1, a0, 1 1799; RV32I-NEXT: lui a2, 349525 1800; RV32I-NEXT: or a0, a0, a1 1801; RV32I-NEXT: addi a1, a2, 1365 1802; RV32I-NEXT: srli a2, a0, 2 1803; RV32I-NEXT: or a0, a0, a2 1804; RV32I-NEXT: srli a2, a0, 4 1805; RV32I-NEXT: or a0, a0, a2 1806; RV32I-NEXT: srli a2, a0, 8 1807; RV32I-NEXT: or a0, a0, a2 1808; RV32I-NEXT: srli a2, a0, 16 1809; RV32I-NEXT: or a0, a0, a2 1810; RV32I-NEXT: not a0, a0 1811; RV32I-NEXT: srli a2, a0, 1 1812; RV32I-NEXT: and a1, a2, a1 1813; RV32I-NEXT: lui a2, 209715 1814; RV32I-NEXT: addi a2, a2, 819 1815; RV32I-NEXT: sub a0, a0, a1 1816; RV32I-NEXT: and a1, a0, a2 1817; RV32I-NEXT: srli a0, a0, 2 1818; RV32I-NEXT: and a0, a0, a2 1819; RV32I-NEXT: lui a2, 61681 1820; RV32I-NEXT: add a0, a1, a0 1821; RV32I-NEXT: srli a1, a0, 4 1822; RV32I-NEXT: add a0, a0, a1 1823; RV32I-NEXT: addi a1, a2, -241 1824; RV32I-NEXT: and a0, a0, a1 1825; RV32I-NEXT: slli a1, a0, 8 1826; RV32I-NEXT: add a0, a0, a1 1827; RV32I-NEXT: slli a1, a0, 16 1828; RV32I-NEXT: add a0, a0, a1 1829; RV32I-NEXT: srli a0, a0, 24 1830; RV32I-NEXT: ret 1831; 1832; RV64I-LABEL: test_ctlz_i32_zero_undef: 1833; RV64I: # %bb.0: 1834; RV64I-NEXT: srliw a1, a0, 1 1835; RV64I-NEXT: lui a2, 349525 1836; RV64I-NEXT: or a0, a0, a1 1837; RV64I-NEXT: addiw a1, a2, 1365 1838; RV64I-NEXT: srliw a2, a0, 2 1839; RV64I-NEXT: or a0, a0, a2 1840; RV64I-NEXT: srliw a2, a0, 4 1841; RV64I-NEXT: or a0, a0, a2 1842; RV64I-NEXT: srliw a2, a0, 8 1843; RV64I-NEXT: or a0, a0, a2 1844; RV64I-NEXT: srliw a2, a0, 16 1845; RV64I-NEXT: or a0, a0, a2 1846; RV64I-NEXT: not a0, a0 1847; RV64I-NEXT: srli a2, a0, 1 1848; RV64I-NEXT: and a1, a2, a1 1849; RV64I-NEXT: lui a2, 209715 1850; RV64I-NEXT: addiw a2, a2, 819 1851; RV64I-NEXT: sub a0, a0, a1 1852; RV64I-NEXT: and a1, a0, a2 1853; RV64I-NEXT: srli a0, a0, 2 1854; RV64I-NEXT: and a0, a0, a2 1855; RV64I-NEXT: lui a2, 61681 1856; RV64I-NEXT: add a0, a1, a0 1857; RV64I-NEXT: srli a1, a0, 4 1858; RV64I-NEXT: add a0, a0, a1 1859; RV64I-NEXT: addi a1, a2, -241 1860; RV64I-NEXT: and a0, a0, a1 1861; RV64I-NEXT: slli a1, a0, 8 1862; RV64I-NEXT: add a0, a0, a1 1863; RV64I-NEXT: slli a1, a0, 16 1864; RV64I-NEXT: add a0, a0, a1 1865; RV64I-NEXT: srliw a0, a0, 24 1866; RV64I-NEXT: ret 1867; 1868; RV32M-LABEL: test_ctlz_i32_zero_undef: 1869; RV32M: # %bb.0: 1870; RV32M-NEXT: srli a1, a0, 1 1871; RV32M-NEXT: lui a2, 349525 1872; RV32M-NEXT: or a0, a0, a1 1873; RV32M-NEXT: addi a1, a2, 1365 1874; RV32M-NEXT: srli a2, a0, 2 1875; RV32M-NEXT: or a0, a0, a2 1876; RV32M-NEXT: srli a2, a0, 4 1877; RV32M-NEXT: or a0, a0, a2 1878; RV32M-NEXT: srli a2, a0, 8 1879; RV32M-NEXT: or a0, a0, a2 1880; RV32M-NEXT: srli a2, a0, 16 1881; RV32M-NEXT: or a0, a0, a2 1882; RV32M-NEXT: not a0, a0 1883; RV32M-NEXT: srli a2, a0, 1 1884; RV32M-NEXT: and a1, a2, a1 1885; RV32M-NEXT: lui a2, 209715 1886; RV32M-NEXT: addi a2, a2, 819 1887; RV32M-NEXT: sub a0, a0, a1 1888; RV32M-NEXT: and a1, a0, a2 1889; RV32M-NEXT: srli a0, a0, 2 1890; RV32M-NEXT: and a0, a0, a2 1891; RV32M-NEXT: lui a2, 61681 1892; RV32M-NEXT: add a0, a1, a0 1893; RV32M-NEXT: srli a1, a0, 4 1894; RV32M-NEXT: add a0, a0, a1 1895; RV32M-NEXT: lui a1, 4112 1896; RV32M-NEXT: addi a2, a2, -241 1897; RV32M-NEXT: and a0, a0, a2 1898; RV32M-NEXT: addi a1, a1, 257 1899; RV32M-NEXT: mul a0, a0, a1 1900; RV32M-NEXT: srli a0, a0, 24 1901; RV32M-NEXT: ret 1902; 1903; RV64M-LABEL: test_ctlz_i32_zero_undef: 1904; RV64M: # %bb.0: 1905; RV64M-NEXT: srliw a1, a0, 1 1906; RV64M-NEXT: lui a2, 349525 1907; RV64M-NEXT: or a0, a0, a1 1908; RV64M-NEXT: addiw a1, a2, 1365 1909; RV64M-NEXT: srliw a2, a0, 2 1910; RV64M-NEXT: or a0, a0, a2 1911; RV64M-NEXT: srliw a2, a0, 4 1912; RV64M-NEXT: or a0, a0, a2 1913; RV64M-NEXT: srliw a2, a0, 8 1914; RV64M-NEXT: or a0, a0, a2 1915; RV64M-NEXT: srliw a2, a0, 16 1916; RV64M-NEXT: or a0, a0, a2 1917; RV64M-NEXT: not a0, a0 1918; RV64M-NEXT: srli a2, a0, 1 1919; RV64M-NEXT: and a1, a2, a1 1920; RV64M-NEXT: lui a2, 209715 1921; RV64M-NEXT: addiw a2, a2, 819 1922; RV64M-NEXT: sub a0, a0, a1 1923; RV64M-NEXT: and a1, a0, a2 1924; RV64M-NEXT: srli a0, a0, 2 1925; RV64M-NEXT: and a0, a0, a2 1926; RV64M-NEXT: lui a2, 61681 1927; RV64M-NEXT: add a0, a1, a0 1928; RV64M-NEXT: srli a1, a0, 4 1929; RV64M-NEXT: add a0, a0, a1 1930; RV64M-NEXT: lui a1, 4112 1931; RV64M-NEXT: addi a2, a2, -241 1932; RV64M-NEXT: and a0, a0, a2 1933; RV64M-NEXT: addi a1, a1, 257 1934; RV64M-NEXT: mul a0, a0, a1 1935; RV64M-NEXT: srliw a0, a0, 24 1936; RV64M-NEXT: ret 1937; 1938; RV32ZBB-LABEL: test_ctlz_i32_zero_undef: 1939; RV32ZBB: # %bb.0: 1940; RV32ZBB-NEXT: clz a0, a0 1941; RV32ZBB-NEXT: ret 1942; 1943; RV64ZBB-LABEL: test_ctlz_i32_zero_undef: 1944; RV64ZBB: # %bb.0: 1945; RV64ZBB-NEXT: clzw a0, a0 1946; RV64ZBB-NEXT: ret 1947; 1948; RV32XTHEADBB-LABEL: test_ctlz_i32_zero_undef: 1949; RV32XTHEADBB: # %bb.0: 1950; RV32XTHEADBB-NEXT: th.ff1 a0, a0 1951; RV32XTHEADBB-NEXT: ret 1952; 1953; RV64XTHEADBB-LABEL: test_ctlz_i32_zero_undef: 1954; RV64XTHEADBB: # %bb.0: 1955; RV64XTHEADBB-NEXT: not a0, a0 1956; RV64XTHEADBB-NEXT: slli a0, a0, 32 1957; RV64XTHEADBB-NEXT: th.ff0 a0, a0 1958; RV64XTHEADBB-NEXT: ret 1959 %tmp = call i32 @llvm.ctlz.i32(i32 %a, i1 true) 1960 ret i32 %tmp 1961} 1962 1963define i64 @test_ctlz_i64_zero_undef(i64 %a) nounwind { 1964; RV32I-LABEL: test_ctlz_i64_zero_undef: 1965; RV32I: # %bb.0: 1966; RV32I-NEXT: lui a2, 349525 1967; RV32I-NEXT: lui a3, 209715 1968; RV32I-NEXT: lui a5, 61681 1969; RV32I-NEXT: addi a4, a2, 1365 1970; RV32I-NEXT: addi a3, a3, 819 1971; RV32I-NEXT: addi a2, a5, -241 1972; RV32I-NEXT: bnez a1, .LBB15_2 1973; RV32I-NEXT: # %bb.1: 1974; RV32I-NEXT: srli a1, a0, 1 1975; RV32I-NEXT: or a0, a0, a1 1976; RV32I-NEXT: srli a1, a0, 2 1977; RV32I-NEXT: or a0, a0, a1 1978; RV32I-NEXT: srli a1, a0, 4 1979; RV32I-NEXT: or a0, a0, a1 1980; RV32I-NEXT: srli a1, a0, 8 1981; RV32I-NEXT: or a0, a0, a1 1982; RV32I-NEXT: srli a1, a0, 16 1983; RV32I-NEXT: or a0, a0, a1 1984; RV32I-NEXT: not a0, a0 1985; RV32I-NEXT: srli a1, a0, 1 1986; RV32I-NEXT: and a1, a1, a4 1987; RV32I-NEXT: sub a0, a0, a1 1988; RV32I-NEXT: and a1, a0, a3 1989; RV32I-NEXT: srli a0, a0, 2 1990; RV32I-NEXT: and a0, a0, a3 1991; RV32I-NEXT: add a0, a1, a0 1992; RV32I-NEXT: srli a1, a0, 4 1993; RV32I-NEXT: add a0, a0, a1 1994; RV32I-NEXT: and a0, a0, a2 1995; RV32I-NEXT: slli a1, a0, 8 1996; RV32I-NEXT: add a0, a0, a1 1997; RV32I-NEXT: slli a1, a0, 16 1998; RV32I-NEXT: add a0, a0, a1 1999; RV32I-NEXT: srli a0, a0, 24 2000; RV32I-NEXT: addi a0, a0, 32 2001; RV32I-NEXT: li a1, 0 2002; RV32I-NEXT: ret 2003; RV32I-NEXT: .LBB15_2: 2004; RV32I-NEXT: srli a0, a1, 1 2005; RV32I-NEXT: or a0, a1, a0 2006; RV32I-NEXT: srli a1, a0, 2 2007; RV32I-NEXT: or a0, a0, a1 2008; RV32I-NEXT: srli a1, a0, 4 2009; RV32I-NEXT: or a0, a0, a1 2010; RV32I-NEXT: srli a1, a0, 8 2011; RV32I-NEXT: or a0, a0, a1 2012; RV32I-NEXT: srli a1, a0, 16 2013; RV32I-NEXT: or a0, a0, a1 2014; RV32I-NEXT: not a0, a0 2015; RV32I-NEXT: srli a1, a0, 1 2016; RV32I-NEXT: and a1, a1, a4 2017; RV32I-NEXT: sub a0, a0, a1 2018; RV32I-NEXT: and a1, a0, a3 2019; RV32I-NEXT: srli a0, a0, 2 2020; RV32I-NEXT: and a0, a0, a3 2021; RV32I-NEXT: add a0, a1, a0 2022; RV32I-NEXT: srli a1, a0, 4 2023; RV32I-NEXT: add a0, a0, a1 2024; RV32I-NEXT: and a0, a0, a2 2025; RV32I-NEXT: slli a1, a0, 8 2026; RV32I-NEXT: add a0, a0, a1 2027; RV32I-NEXT: slli a1, a0, 16 2028; RV32I-NEXT: add a0, a0, a1 2029; RV32I-NEXT: srli a0, a0, 24 2030; RV32I-NEXT: li a1, 0 2031; RV32I-NEXT: ret 2032; 2033; RV64I-LABEL: test_ctlz_i64_zero_undef: 2034; RV64I: # %bb.0: 2035; RV64I-NEXT: srli a1, a0, 1 2036; RV64I-NEXT: lui a2, 349525 2037; RV64I-NEXT: lui a3, 209715 2038; RV64I-NEXT: or a0, a0, a1 2039; RV64I-NEXT: addiw a1, a2, 1365 2040; RV64I-NEXT: addiw a2, a3, 819 2041; RV64I-NEXT: srli a3, a0, 2 2042; RV64I-NEXT: or a0, a0, a3 2043; RV64I-NEXT: slli a3, a1, 32 2044; RV64I-NEXT: add a1, a1, a3 2045; RV64I-NEXT: slli a3, a2, 32 2046; RV64I-NEXT: add a2, a2, a3 2047; RV64I-NEXT: srli a3, a0, 4 2048; RV64I-NEXT: or a0, a0, a3 2049; RV64I-NEXT: srli a3, a0, 8 2050; RV64I-NEXT: or a0, a0, a3 2051; RV64I-NEXT: srli a3, a0, 16 2052; RV64I-NEXT: or a0, a0, a3 2053; RV64I-NEXT: srli a3, a0, 32 2054; RV64I-NEXT: or a0, a0, a3 2055; RV64I-NEXT: not a0, a0 2056; RV64I-NEXT: srli a3, a0, 1 2057; RV64I-NEXT: and a1, a3, a1 2058; RV64I-NEXT: lui a3, 61681 2059; RV64I-NEXT: addiw a3, a3, -241 2060; RV64I-NEXT: sub a0, a0, a1 2061; RV64I-NEXT: and a1, a0, a2 2062; RV64I-NEXT: srli a0, a0, 2 2063; RV64I-NEXT: and a0, a0, a2 2064; RV64I-NEXT: slli a2, a3, 32 2065; RV64I-NEXT: add a0, a1, a0 2066; RV64I-NEXT: srli a1, a0, 4 2067; RV64I-NEXT: add a0, a0, a1 2068; RV64I-NEXT: add a2, a3, a2 2069; RV64I-NEXT: and a0, a0, a2 2070; RV64I-NEXT: slli a1, a0, 8 2071; RV64I-NEXT: add a0, a0, a1 2072; RV64I-NEXT: slli a1, a0, 16 2073; RV64I-NEXT: add a0, a0, a1 2074; RV64I-NEXT: slli a1, a0, 32 2075; RV64I-NEXT: add a0, a0, a1 2076; RV64I-NEXT: srli a0, a0, 56 2077; RV64I-NEXT: ret 2078; 2079; RV32M-LABEL: test_ctlz_i64_zero_undef: 2080; RV32M: # %bb.0: 2081; RV32M-NEXT: lui a2, 349525 2082; RV32M-NEXT: lui a3, 209715 2083; RV32M-NEXT: lui a6, 61681 2084; RV32M-NEXT: lui a7, 4112 2085; RV32M-NEXT: addi a5, a2, 1365 2086; RV32M-NEXT: addi a4, a3, 819 2087; RV32M-NEXT: addi a3, a6, -241 2088; RV32M-NEXT: addi a2, a7, 257 2089; RV32M-NEXT: bnez a1, .LBB15_2 2090; RV32M-NEXT: # %bb.1: 2091; RV32M-NEXT: srli a1, a0, 1 2092; RV32M-NEXT: or a0, a0, a1 2093; RV32M-NEXT: srli a1, a0, 2 2094; RV32M-NEXT: or a0, a0, a1 2095; RV32M-NEXT: srli a1, a0, 4 2096; RV32M-NEXT: or a0, a0, a1 2097; RV32M-NEXT: srli a1, a0, 8 2098; RV32M-NEXT: or a0, a0, a1 2099; RV32M-NEXT: srli a1, a0, 16 2100; RV32M-NEXT: or a0, a0, a1 2101; RV32M-NEXT: not a0, a0 2102; RV32M-NEXT: srli a1, a0, 1 2103; RV32M-NEXT: and a1, a1, a5 2104; RV32M-NEXT: sub a0, a0, a1 2105; RV32M-NEXT: and a1, a0, a4 2106; RV32M-NEXT: srli a0, a0, 2 2107; RV32M-NEXT: and a0, a0, a4 2108; RV32M-NEXT: add a0, a1, a0 2109; RV32M-NEXT: srli a1, a0, 4 2110; RV32M-NEXT: add a0, a0, a1 2111; RV32M-NEXT: and a0, a0, a3 2112; RV32M-NEXT: mul a0, a0, a2 2113; RV32M-NEXT: srli a0, a0, 24 2114; RV32M-NEXT: addi a0, a0, 32 2115; RV32M-NEXT: li a1, 0 2116; RV32M-NEXT: ret 2117; RV32M-NEXT: .LBB15_2: 2118; RV32M-NEXT: srli a0, a1, 1 2119; RV32M-NEXT: or a0, a1, a0 2120; RV32M-NEXT: srli a1, a0, 2 2121; RV32M-NEXT: or a0, a0, a1 2122; RV32M-NEXT: srli a1, a0, 4 2123; RV32M-NEXT: or a0, a0, a1 2124; RV32M-NEXT: srli a1, a0, 8 2125; RV32M-NEXT: or a0, a0, a1 2126; RV32M-NEXT: srli a1, a0, 16 2127; RV32M-NEXT: or a0, a0, a1 2128; RV32M-NEXT: not a0, a0 2129; RV32M-NEXT: srli a1, a0, 1 2130; RV32M-NEXT: and a1, a1, a5 2131; RV32M-NEXT: sub a0, a0, a1 2132; RV32M-NEXT: and a1, a0, a4 2133; RV32M-NEXT: srli a0, a0, 2 2134; RV32M-NEXT: and a0, a0, a4 2135; RV32M-NEXT: add a0, a1, a0 2136; RV32M-NEXT: srli a1, a0, 4 2137; RV32M-NEXT: add a0, a0, a1 2138; RV32M-NEXT: and a0, a0, a3 2139; RV32M-NEXT: mul a0, a0, a2 2140; RV32M-NEXT: srli a0, a0, 24 2141; RV32M-NEXT: li a1, 0 2142; RV32M-NEXT: ret 2143; 2144; RV64M-LABEL: test_ctlz_i64_zero_undef: 2145; RV64M: # %bb.0: 2146; RV64M-NEXT: srli a1, a0, 1 2147; RV64M-NEXT: lui a2, 349525 2148; RV64M-NEXT: lui a3, 209715 2149; RV64M-NEXT: lui a4, 61681 2150; RV64M-NEXT: or a0, a0, a1 2151; RV64M-NEXT: addiw a1, a2, 1365 2152; RV64M-NEXT: addiw a2, a3, 819 2153; RV64M-NEXT: addiw a3, a4, -241 2154; RV64M-NEXT: srli a4, a0, 2 2155; RV64M-NEXT: or a0, a0, a4 2156; RV64M-NEXT: slli a4, a1, 32 2157; RV64M-NEXT: add a1, a1, a4 2158; RV64M-NEXT: slli a4, a2, 32 2159; RV64M-NEXT: add a2, a2, a4 2160; RV64M-NEXT: slli a4, a3, 32 2161; RV64M-NEXT: add a3, a3, a4 2162; RV64M-NEXT: srli a4, a0, 4 2163; RV64M-NEXT: or a0, a0, a4 2164; RV64M-NEXT: srli a4, a0, 8 2165; RV64M-NEXT: or a0, a0, a4 2166; RV64M-NEXT: srli a4, a0, 16 2167; RV64M-NEXT: or a0, a0, a4 2168; RV64M-NEXT: srli a4, a0, 32 2169; RV64M-NEXT: or a0, a0, a4 2170; RV64M-NEXT: not a0, a0 2171; RV64M-NEXT: srli a4, a0, 1 2172; RV64M-NEXT: and a1, a4, a1 2173; RV64M-NEXT: sub a0, a0, a1 2174; RV64M-NEXT: and a1, a0, a2 2175; RV64M-NEXT: srli a0, a0, 2 2176; RV64M-NEXT: and a0, a0, a2 2177; RV64M-NEXT: lui a2, 4112 2178; RV64M-NEXT: addiw a2, a2, 257 2179; RV64M-NEXT: add a0, a1, a0 2180; RV64M-NEXT: srli a1, a0, 4 2181; RV64M-NEXT: add a0, a0, a1 2182; RV64M-NEXT: slli a1, a2, 32 2183; RV64M-NEXT: and a0, a0, a3 2184; RV64M-NEXT: add a1, a2, a1 2185; RV64M-NEXT: mul a0, a0, a1 2186; RV64M-NEXT: srli a0, a0, 56 2187; RV64M-NEXT: ret 2188; 2189; RV32ZBB-LABEL: test_ctlz_i64_zero_undef: 2190; RV32ZBB: # %bb.0: 2191; RV32ZBB-NEXT: bnez a1, .LBB15_2 2192; RV32ZBB-NEXT: # %bb.1: 2193; RV32ZBB-NEXT: clz a0, a0 2194; RV32ZBB-NEXT: addi a0, a0, 32 2195; RV32ZBB-NEXT: li a1, 0 2196; RV32ZBB-NEXT: ret 2197; RV32ZBB-NEXT: .LBB15_2: 2198; RV32ZBB-NEXT: clz a0, a1 2199; RV32ZBB-NEXT: li a1, 0 2200; RV32ZBB-NEXT: ret 2201; 2202; RV64ZBB-LABEL: test_ctlz_i64_zero_undef: 2203; RV64ZBB: # %bb.0: 2204; RV64ZBB-NEXT: clz a0, a0 2205; RV64ZBB-NEXT: ret 2206; 2207; RV32XTHEADBB-LABEL: test_ctlz_i64_zero_undef: 2208; RV32XTHEADBB: # %bb.0: 2209; RV32XTHEADBB-NEXT: bnez a1, .LBB15_2 2210; RV32XTHEADBB-NEXT: # %bb.1: 2211; RV32XTHEADBB-NEXT: th.ff1 a0, a0 2212; RV32XTHEADBB-NEXT: addi a0, a0, 32 2213; RV32XTHEADBB-NEXT: li a1, 0 2214; RV32XTHEADBB-NEXT: ret 2215; RV32XTHEADBB-NEXT: .LBB15_2: 2216; RV32XTHEADBB-NEXT: th.ff1 a0, a1 2217; RV32XTHEADBB-NEXT: li a1, 0 2218; RV32XTHEADBB-NEXT: ret 2219; 2220; RV64XTHEADBB-LABEL: test_ctlz_i64_zero_undef: 2221; RV64XTHEADBB: # %bb.0: 2222; RV64XTHEADBB-NEXT: th.ff1 a0, a0 2223; RV64XTHEADBB-NEXT: ret 2224 %tmp = call i64 @llvm.ctlz.i64(i64 %a, i1 true) 2225 ret i64 %tmp 2226} 2227 2228define i8 @test_ctpop_i8(i8 %a) nounwind { 2229; RV32_NOZBB-LABEL: test_ctpop_i8: 2230; RV32_NOZBB: # %bb.0: 2231; RV32_NOZBB-NEXT: srli a1, a0, 1 2232; RV32_NOZBB-NEXT: andi a1, a1, 85 2233; RV32_NOZBB-NEXT: sub a0, a0, a1 2234; RV32_NOZBB-NEXT: andi a1, a0, 51 2235; RV32_NOZBB-NEXT: srli a0, a0, 2 2236; RV32_NOZBB-NEXT: andi a0, a0, 51 2237; RV32_NOZBB-NEXT: add a0, a1, a0 2238; RV32_NOZBB-NEXT: srli a1, a0, 4 2239; RV32_NOZBB-NEXT: add a0, a0, a1 2240; RV32_NOZBB-NEXT: andi a0, a0, 15 2241; RV32_NOZBB-NEXT: ret 2242; 2243; RV64NOZBB-LABEL: test_ctpop_i8: 2244; RV64NOZBB: # %bb.0: 2245; RV64NOZBB-NEXT: srli a1, a0, 1 2246; RV64NOZBB-NEXT: andi a1, a1, 85 2247; RV64NOZBB-NEXT: subw a0, a0, a1 2248; RV64NOZBB-NEXT: andi a1, a0, 51 2249; RV64NOZBB-NEXT: srli a0, a0, 2 2250; RV64NOZBB-NEXT: andi a0, a0, 51 2251; RV64NOZBB-NEXT: add a0, a1, a0 2252; RV64NOZBB-NEXT: srli a1, a0, 4 2253; RV64NOZBB-NEXT: add a0, a0, a1 2254; RV64NOZBB-NEXT: andi a0, a0, 15 2255; RV64NOZBB-NEXT: ret 2256; 2257; RV32ZBB-LABEL: test_ctpop_i8: 2258; RV32ZBB: # %bb.0: 2259; RV32ZBB-NEXT: andi a0, a0, 255 2260; RV32ZBB-NEXT: cpop a0, a0 2261; RV32ZBB-NEXT: ret 2262; 2263; RV64ZBB-LABEL: test_ctpop_i8: 2264; RV64ZBB: # %bb.0: 2265; RV64ZBB-NEXT: andi a0, a0, 255 2266; RV64ZBB-NEXT: cpopw a0, a0 2267; RV64ZBB-NEXT: ret 2268; 2269; RV32XTHEADBB-LABEL: test_ctpop_i8: 2270; RV32XTHEADBB: # %bb.0: 2271; RV32XTHEADBB-NEXT: srli a1, a0, 1 2272; RV32XTHEADBB-NEXT: andi a1, a1, 85 2273; RV32XTHEADBB-NEXT: sub a0, a0, a1 2274; RV32XTHEADBB-NEXT: andi a1, a0, 51 2275; RV32XTHEADBB-NEXT: srli a0, a0, 2 2276; RV32XTHEADBB-NEXT: andi a0, a0, 51 2277; RV32XTHEADBB-NEXT: add a0, a1, a0 2278; RV32XTHEADBB-NEXT: srli a1, a0, 4 2279; RV32XTHEADBB-NEXT: add a0, a0, a1 2280; RV32XTHEADBB-NEXT: andi a0, a0, 15 2281; RV32XTHEADBB-NEXT: ret 2282; 2283; RV64XTHEADBB-LABEL: test_ctpop_i8: 2284; RV64XTHEADBB: # %bb.0: 2285; RV64XTHEADBB-NEXT: srli a1, a0, 1 2286; RV64XTHEADBB-NEXT: andi a1, a1, 85 2287; RV64XTHEADBB-NEXT: subw a0, a0, a1 2288; RV64XTHEADBB-NEXT: andi a1, a0, 51 2289; RV64XTHEADBB-NEXT: srli a0, a0, 2 2290; RV64XTHEADBB-NEXT: andi a0, a0, 51 2291; RV64XTHEADBB-NEXT: add a0, a1, a0 2292; RV64XTHEADBB-NEXT: srli a1, a0, 4 2293; RV64XTHEADBB-NEXT: add a0, a0, a1 2294; RV64XTHEADBB-NEXT: andi a0, a0, 15 2295; RV64XTHEADBB-NEXT: ret 2296 %1 = call i8 @llvm.ctpop.i8(i8 %a) 2297 ret i8 %1 2298} 2299 2300define i16 @test_ctpop_i16(i16 %a) nounwind { 2301; RV32_NOZBB-LABEL: test_ctpop_i16: 2302; RV32_NOZBB: # %bb.0: 2303; RV32_NOZBB-NEXT: srli a1, a0, 1 2304; RV32_NOZBB-NEXT: lui a2, 5 2305; RV32_NOZBB-NEXT: addi a2, a2, 1365 2306; RV32_NOZBB-NEXT: and a1, a1, a2 2307; RV32_NOZBB-NEXT: lui a2, 3 2308; RV32_NOZBB-NEXT: addi a2, a2, 819 2309; RV32_NOZBB-NEXT: sub a0, a0, a1 2310; RV32_NOZBB-NEXT: and a1, a0, a2 2311; RV32_NOZBB-NEXT: srli a0, a0, 2 2312; RV32_NOZBB-NEXT: and a0, a0, a2 2313; RV32_NOZBB-NEXT: add a0, a1, a0 2314; RV32_NOZBB-NEXT: srli a1, a0, 4 2315; RV32_NOZBB-NEXT: add a0, a0, a1 2316; RV32_NOZBB-NEXT: andi a1, a0, 15 2317; RV32_NOZBB-NEXT: slli a0, a0, 20 2318; RV32_NOZBB-NEXT: srli a0, a0, 28 2319; RV32_NOZBB-NEXT: add a0, a1, a0 2320; RV32_NOZBB-NEXT: ret 2321; 2322; RV64NOZBB-LABEL: test_ctpop_i16: 2323; RV64NOZBB: # %bb.0: 2324; RV64NOZBB-NEXT: srli a1, a0, 1 2325; RV64NOZBB-NEXT: lui a2, 5 2326; RV64NOZBB-NEXT: addiw a2, a2, 1365 2327; RV64NOZBB-NEXT: and a1, a1, a2 2328; RV64NOZBB-NEXT: lui a2, 3 2329; RV64NOZBB-NEXT: addiw a2, a2, 819 2330; RV64NOZBB-NEXT: sub a0, a0, a1 2331; RV64NOZBB-NEXT: and a1, a0, a2 2332; RV64NOZBB-NEXT: srli a0, a0, 2 2333; RV64NOZBB-NEXT: and a0, a0, a2 2334; RV64NOZBB-NEXT: add a0, a1, a0 2335; RV64NOZBB-NEXT: srli a1, a0, 4 2336; RV64NOZBB-NEXT: add a0, a0, a1 2337; RV64NOZBB-NEXT: andi a1, a0, 15 2338; RV64NOZBB-NEXT: slli a0, a0, 52 2339; RV64NOZBB-NEXT: srli a0, a0, 60 2340; RV64NOZBB-NEXT: add a0, a1, a0 2341; RV64NOZBB-NEXT: ret 2342; 2343; RV32ZBB-LABEL: test_ctpop_i16: 2344; RV32ZBB: # %bb.0: 2345; RV32ZBB-NEXT: zext.h a0, a0 2346; RV32ZBB-NEXT: cpop a0, a0 2347; RV32ZBB-NEXT: ret 2348; 2349; RV64ZBB-LABEL: test_ctpop_i16: 2350; RV64ZBB: # %bb.0: 2351; RV64ZBB-NEXT: zext.h a0, a0 2352; RV64ZBB-NEXT: cpopw a0, a0 2353; RV64ZBB-NEXT: ret 2354; 2355; RV32XTHEADBB-LABEL: test_ctpop_i16: 2356; RV32XTHEADBB: # %bb.0: 2357; RV32XTHEADBB-NEXT: srli a1, a0, 1 2358; RV32XTHEADBB-NEXT: lui a2, 5 2359; RV32XTHEADBB-NEXT: addi a2, a2, 1365 2360; RV32XTHEADBB-NEXT: and a1, a1, a2 2361; RV32XTHEADBB-NEXT: lui a2, 3 2362; RV32XTHEADBB-NEXT: addi a2, a2, 819 2363; RV32XTHEADBB-NEXT: sub a0, a0, a1 2364; RV32XTHEADBB-NEXT: and a1, a0, a2 2365; RV32XTHEADBB-NEXT: srli a0, a0, 2 2366; RV32XTHEADBB-NEXT: and a0, a0, a2 2367; RV32XTHEADBB-NEXT: add a0, a1, a0 2368; RV32XTHEADBB-NEXT: srli a1, a0, 4 2369; RV32XTHEADBB-NEXT: add a0, a0, a1 2370; RV32XTHEADBB-NEXT: th.extu a1, a0, 11, 8 2371; RV32XTHEADBB-NEXT: andi a0, a0, 15 2372; RV32XTHEADBB-NEXT: add a0, a0, a1 2373; RV32XTHEADBB-NEXT: ret 2374; 2375; RV64XTHEADBB-LABEL: test_ctpop_i16: 2376; RV64XTHEADBB: # %bb.0: 2377; RV64XTHEADBB-NEXT: srli a1, a0, 1 2378; RV64XTHEADBB-NEXT: lui a2, 5 2379; RV64XTHEADBB-NEXT: addiw a2, a2, 1365 2380; RV64XTHEADBB-NEXT: and a1, a1, a2 2381; RV64XTHEADBB-NEXT: lui a2, 3 2382; RV64XTHEADBB-NEXT: addiw a2, a2, 819 2383; RV64XTHEADBB-NEXT: sub a0, a0, a1 2384; RV64XTHEADBB-NEXT: and a1, a0, a2 2385; RV64XTHEADBB-NEXT: srli a0, a0, 2 2386; RV64XTHEADBB-NEXT: and a0, a0, a2 2387; RV64XTHEADBB-NEXT: add a0, a1, a0 2388; RV64XTHEADBB-NEXT: srli a1, a0, 4 2389; RV64XTHEADBB-NEXT: add a0, a0, a1 2390; RV64XTHEADBB-NEXT: th.extu a1, a0, 11, 8 2391; RV64XTHEADBB-NEXT: andi a0, a0, 15 2392; RV64XTHEADBB-NEXT: add a0, a0, a1 2393; RV64XTHEADBB-NEXT: ret 2394 %1 = call i16 @llvm.ctpop.i16(i16 %a) 2395 ret i16 %1 2396} 2397 2398define i32 @test_ctpop_i32(i32 %a) nounwind { 2399; RV32I-LABEL: test_ctpop_i32: 2400; RV32I: # %bb.0: 2401; RV32I-NEXT: srli a1, a0, 1 2402; RV32I-NEXT: lui a2, 349525 2403; RV32I-NEXT: addi a2, a2, 1365 2404; RV32I-NEXT: and a1, a1, a2 2405; RV32I-NEXT: lui a2, 209715 2406; RV32I-NEXT: addi a2, a2, 819 2407; RV32I-NEXT: sub a0, a0, a1 2408; RV32I-NEXT: and a1, a0, a2 2409; RV32I-NEXT: srli a0, a0, 2 2410; RV32I-NEXT: and a0, a0, a2 2411; RV32I-NEXT: lui a2, 61681 2412; RV32I-NEXT: add a0, a1, a0 2413; RV32I-NEXT: srli a1, a0, 4 2414; RV32I-NEXT: add a0, a0, a1 2415; RV32I-NEXT: addi a1, a2, -241 2416; RV32I-NEXT: and a0, a0, a1 2417; RV32I-NEXT: slli a1, a0, 8 2418; RV32I-NEXT: add a0, a0, a1 2419; RV32I-NEXT: slli a1, a0, 16 2420; RV32I-NEXT: add a0, a0, a1 2421; RV32I-NEXT: srli a0, a0, 24 2422; RV32I-NEXT: ret 2423; 2424; RV64I-LABEL: test_ctpop_i32: 2425; RV64I: # %bb.0: 2426; RV64I-NEXT: srli a1, a0, 1 2427; RV64I-NEXT: lui a2, 349525 2428; RV64I-NEXT: addiw a2, a2, 1365 2429; RV64I-NEXT: and a1, a1, a2 2430; RV64I-NEXT: lui a2, 209715 2431; RV64I-NEXT: addiw a2, a2, 819 2432; RV64I-NEXT: sub a0, a0, a1 2433; RV64I-NEXT: and a1, a0, a2 2434; RV64I-NEXT: srli a0, a0, 2 2435; RV64I-NEXT: and a0, a0, a2 2436; RV64I-NEXT: lui a2, 61681 2437; RV64I-NEXT: add a0, a1, a0 2438; RV64I-NEXT: srli a1, a0, 4 2439; RV64I-NEXT: add a0, a0, a1 2440; RV64I-NEXT: addi a1, a2, -241 2441; RV64I-NEXT: and a0, a0, a1 2442; RV64I-NEXT: slli a1, a0, 8 2443; RV64I-NEXT: add a0, a0, a1 2444; RV64I-NEXT: slli a1, a0, 16 2445; RV64I-NEXT: add a0, a0, a1 2446; RV64I-NEXT: srliw a0, a0, 24 2447; RV64I-NEXT: ret 2448; 2449; RV32M-LABEL: test_ctpop_i32: 2450; RV32M: # %bb.0: 2451; RV32M-NEXT: srli a1, a0, 1 2452; RV32M-NEXT: lui a2, 349525 2453; RV32M-NEXT: addi a2, a2, 1365 2454; RV32M-NEXT: and a1, a1, a2 2455; RV32M-NEXT: lui a2, 209715 2456; RV32M-NEXT: addi a2, a2, 819 2457; RV32M-NEXT: sub a0, a0, a1 2458; RV32M-NEXT: and a1, a0, a2 2459; RV32M-NEXT: srli a0, a0, 2 2460; RV32M-NEXT: and a0, a0, a2 2461; RV32M-NEXT: lui a2, 61681 2462; RV32M-NEXT: add a0, a1, a0 2463; RV32M-NEXT: srli a1, a0, 4 2464; RV32M-NEXT: add a0, a0, a1 2465; RV32M-NEXT: lui a1, 4112 2466; RV32M-NEXT: addi a2, a2, -241 2467; RV32M-NEXT: and a0, a0, a2 2468; RV32M-NEXT: addi a1, a1, 257 2469; RV32M-NEXT: mul a0, a0, a1 2470; RV32M-NEXT: srli a0, a0, 24 2471; RV32M-NEXT: ret 2472; 2473; RV64M-LABEL: test_ctpop_i32: 2474; RV64M: # %bb.0: 2475; RV64M-NEXT: srli a1, a0, 1 2476; RV64M-NEXT: lui a2, 349525 2477; RV64M-NEXT: addiw a2, a2, 1365 2478; RV64M-NEXT: and a1, a1, a2 2479; RV64M-NEXT: lui a2, 209715 2480; RV64M-NEXT: addiw a2, a2, 819 2481; RV64M-NEXT: sub a0, a0, a1 2482; RV64M-NEXT: and a1, a0, a2 2483; RV64M-NEXT: srli a0, a0, 2 2484; RV64M-NEXT: and a0, a0, a2 2485; RV64M-NEXT: lui a2, 61681 2486; RV64M-NEXT: add a0, a1, a0 2487; RV64M-NEXT: srli a1, a0, 4 2488; RV64M-NEXT: add a0, a0, a1 2489; RV64M-NEXT: lui a1, 4112 2490; RV64M-NEXT: addi a2, a2, -241 2491; RV64M-NEXT: and a0, a0, a2 2492; RV64M-NEXT: addi a1, a1, 257 2493; RV64M-NEXT: mul a0, a0, a1 2494; RV64M-NEXT: srliw a0, a0, 24 2495; RV64M-NEXT: ret 2496; 2497; RV32ZBB-LABEL: test_ctpop_i32: 2498; RV32ZBB: # %bb.0: 2499; RV32ZBB-NEXT: cpop a0, a0 2500; RV32ZBB-NEXT: ret 2501; 2502; RV64ZBB-LABEL: test_ctpop_i32: 2503; RV64ZBB: # %bb.0: 2504; RV64ZBB-NEXT: cpopw a0, a0 2505; RV64ZBB-NEXT: ret 2506; 2507; RV32XTHEADBB-LABEL: test_ctpop_i32: 2508; RV32XTHEADBB: # %bb.0: 2509; RV32XTHEADBB-NEXT: srli a1, a0, 1 2510; RV32XTHEADBB-NEXT: lui a2, 349525 2511; RV32XTHEADBB-NEXT: addi a2, a2, 1365 2512; RV32XTHEADBB-NEXT: and a1, a1, a2 2513; RV32XTHEADBB-NEXT: lui a2, 209715 2514; RV32XTHEADBB-NEXT: addi a2, a2, 819 2515; RV32XTHEADBB-NEXT: sub a0, a0, a1 2516; RV32XTHEADBB-NEXT: and a1, a0, a2 2517; RV32XTHEADBB-NEXT: srli a0, a0, 2 2518; RV32XTHEADBB-NEXT: and a0, a0, a2 2519; RV32XTHEADBB-NEXT: lui a2, 61681 2520; RV32XTHEADBB-NEXT: add a0, a1, a0 2521; RV32XTHEADBB-NEXT: srli a1, a0, 4 2522; RV32XTHEADBB-NEXT: add a0, a0, a1 2523; RV32XTHEADBB-NEXT: addi a1, a2, -241 2524; RV32XTHEADBB-NEXT: and a0, a0, a1 2525; RV32XTHEADBB-NEXT: slli a1, a0, 8 2526; RV32XTHEADBB-NEXT: add a0, a0, a1 2527; RV32XTHEADBB-NEXT: slli a1, a0, 16 2528; RV32XTHEADBB-NEXT: add a0, a0, a1 2529; RV32XTHEADBB-NEXT: srli a0, a0, 24 2530; RV32XTHEADBB-NEXT: ret 2531; 2532; RV64XTHEADBB-LABEL: test_ctpop_i32: 2533; RV64XTHEADBB: # %bb.0: 2534; RV64XTHEADBB-NEXT: srli a1, a0, 1 2535; RV64XTHEADBB-NEXT: lui a2, 349525 2536; RV64XTHEADBB-NEXT: addiw a2, a2, 1365 2537; RV64XTHEADBB-NEXT: and a1, a1, a2 2538; RV64XTHEADBB-NEXT: lui a2, 209715 2539; RV64XTHEADBB-NEXT: addiw a2, a2, 819 2540; RV64XTHEADBB-NEXT: sub a0, a0, a1 2541; RV64XTHEADBB-NEXT: and a1, a0, a2 2542; RV64XTHEADBB-NEXT: srli a0, a0, 2 2543; RV64XTHEADBB-NEXT: and a0, a0, a2 2544; RV64XTHEADBB-NEXT: lui a2, 61681 2545; RV64XTHEADBB-NEXT: add a0, a1, a0 2546; RV64XTHEADBB-NEXT: srli a1, a0, 4 2547; RV64XTHEADBB-NEXT: add a0, a0, a1 2548; RV64XTHEADBB-NEXT: addi a1, a2, -241 2549; RV64XTHEADBB-NEXT: and a0, a0, a1 2550; RV64XTHEADBB-NEXT: slli a1, a0, 8 2551; RV64XTHEADBB-NEXT: add a0, a0, a1 2552; RV64XTHEADBB-NEXT: slli a1, a0, 16 2553; RV64XTHEADBB-NEXT: add a0, a0, a1 2554; RV64XTHEADBB-NEXT: srliw a0, a0, 24 2555; RV64XTHEADBB-NEXT: ret 2556 %1 = call i32 @llvm.ctpop.i32(i32 %a) 2557 ret i32 %1 2558} 2559 2560define i64 @test_ctpop_i64(i64 %a) nounwind { 2561; RV32I-LABEL: test_ctpop_i64: 2562; RV32I: # %bb.0: 2563; RV32I-NEXT: srli a2, a1, 1 2564; RV32I-NEXT: lui a3, 349525 2565; RV32I-NEXT: lui a4, 209715 2566; RV32I-NEXT: srli a5, a0, 1 2567; RV32I-NEXT: addi a3, a3, 1365 2568; RV32I-NEXT: and a2, a2, a3 2569; RV32I-NEXT: and a3, a5, a3 2570; RV32I-NEXT: lui a5, 61681 2571; RV32I-NEXT: addi a4, a4, 819 2572; RV32I-NEXT: addi a5, a5, -241 2573; RV32I-NEXT: sub a1, a1, a2 2574; RV32I-NEXT: sub a0, a0, a3 2575; RV32I-NEXT: and a2, a1, a4 2576; RV32I-NEXT: srli a1, a1, 2 2577; RV32I-NEXT: and a3, a0, a4 2578; RV32I-NEXT: srli a0, a0, 2 2579; RV32I-NEXT: and a1, a1, a4 2580; RV32I-NEXT: and a0, a0, a4 2581; RV32I-NEXT: add a1, a2, a1 2582; RV32I-NEXT: add a0, a3, a0 2583; RV32I-NEXT: srli a2, a1, 4 2584; RV32I-NEXT: srli a3, a0, 4 2585; RV32I-NEXT: add a1, a1, a2 2586; RV32I-NEXT: add a0, a0, a3 2587; RV32I-NEXT: and a1, a1, a5 2588; RV32I-NEXT: and a0, a0, a5 2589; RV32I-NEXT: slli a2, a1, 8 2590; RV32I-NEXT: slli a3, a0, 8 2591; RV32I-NEXT: add a1, a1, a2 2592; RV32I-NEXT: add a0, a0, a3 2593; RV32I-NEXT: slli a2, a1, 16 2594; RV32I-NEXT: slli a3, a0, 16 2595; RV32I-NEXT: add a1, a1, a2 2596; RV32I-NEXT: add a0, a0, a3 2597; RV32I-NEXT: srli a1, a1, 24 2598; RV32I-NEXT: srli a0, a0, 24 2599; RV32I-NEXT: add a0, a0, a1 2600; RV32I-NEXT: li a1, 0 2601; RV32I-NEXT: ret 2602; 2603; RV64I-LABEL: test_ctpop_i64: 2604; RV64I: # %bb.0: 2605; RV64I-NEXT: lui a1, 349525 2606; RV64I-NEXT: lui a2, 209715 2607; RV64I-NEXT: addiw a1, a1, 1365 2608; RV64I-NEXT: addiw a2, a2, 819 2609; RV64I-NEXT: slli a3, a1, 32 2610; RV64I-NEXT: add a1, a1, a3 2611; RV64I-NEXT: slli a3, a2, 32 2612; RV64I-NEXT: add a2, a2, a3 2613; RV64I-NEXT: srli a3, a0, 1 2614; RV64I-NEXT: and a1, a3, a1 2615; RV64I-NEXT: lui a3, 61681 2616; RV64I-NEXT: addiw a3, a3, -241 2617; RV64I-NEXT: sub a0, a0, a1 2618; RV64I-NEXT: and a1, a0, a2 2619; RV64I-NEXT: srli a0, a0, 2 2620; RV64I-NEXT: and a0, a0, a2 2621; RV64I-NEXT: slli a2, a3, 32 2622; RV64I-NEXT: add a0, a1, a0 2623; RV64I-NEXT: srli a1, a0, 4 2624; RV64I-NEXT: add a0, a0, a1 2625; RV64I-NEXT: add a2, a3, a2 2626; RV64I-NEXT: and a0, a0, a2 2627; RV64I-NEXT: slli a1, a0, 8 2628; RV64I-NEXT: add a0, a0, a1 2629; RV64I-NEXT: slli a1, a0, 16 2630; RV64I-NEXT: add a0, a0, a1 2631; RV64I-NEXT: slli a1, a0, 32 2632; RV64I-NEXT: add a0, a0, a1 2633; RV64I-NEXT: srli a0, a0, 56 2634; RV64I-NEXT: ret 2635; 2636; RV32M-LABEL: test_ctpop_i64: 2637; RV32M: # %bb.0: 2638; RV32M-NEXT: srli a2, a1, 1 2639; RV32M-NEXT: lui a3, 349525 2640; RV32M-NEXT: lui a4, 209715 2641; RV32M-NEXT: lui a5, 61681 2642; RV32M-NEXT: srli a6, a0, 1 2643; RV32M-NEXT: addi a3, a3, 1365 2644; RV32M-NEXT: and a2, a2, a3 2645; RV32M-NEXT: and a3, a6, a3 2646; RV32M-NEXT: lui a6, 4112 2647; RV32M-NEXT: addi a4, a4, 819 2648; RV32M-NEXT: addi a5, a5, -241 2649; RV32M-NEXT: addi a6, a6, 257 2650; RV32M-NEXT: sub a1, a1, a2 2651; RV32M-NEXT: sub a0, a0, a3 2652; RV32M-NEXT: and a2, a1, a4 2653; RV32M-NEXT: srli a1, a1, 2 2654; RV32M-NEXT: and a3, a0, a4 2655; RV32M-NEXT: srli a0, a0, 2 2656; RV32M-NEXT: and a1, a1, a4 2657; RV32M-NEXT: and a0, a0, a4 2658; RV32M-NEXT: add a1, a2, a1 2659; RV32M-NEXT: add a0, a3, a0 2660; RV32M-NEXT: srli a2, a1, 4 2661; RV32M-NEXT: srli a3, a0, 4 2662; RV32M-NEXT: add a1, a1, a2 2663; RV32M-NEXT: add a0, a0, a3 2664; RV32M-NEXT: and a1, a1, a5 2665; RV32M-NEXT: and a0, a0, a5 2666; RV32M-NEXT: mul a1, a1, a6 2667; RV32M-NEXT: mul a0, a0, a6 2668; RV32M-NEXT: srli a1, a1, 24 2669; RV32M-NEXT: srli a0, a0, 24 2670; RV32M-NEXT: add a0, a0, a1 2671; RV32M-NEXT: li a1, 0 2672; RV32M-NEXT: ret 2673; 2674; RV64M-LABEL: test_ctpop_i64: 2675; RV64M: # %bb.0: 2676; RV64M-NEXT: lui a1, 349525 2677; RV64M-NEXT: lui a2, 209715 2678; RV64M-NEXT: lui a3, 61681 2679; RV64M-NEXT: addiw a1, a1, 1365 2680; RV64M-NEXT: addiw a2, a2, 819 2681; RV64M-NEXT: addiw a3, a3, -241 2682; RV64M-NEXT: slli a4, a1, 32 2683; RV64M-NEXT: add a1, a1, a4 2684; RV64M-NEXT: slli a4, a2, 32 2685; RV64M-NEXT: add a2, a2, a4 2686; RV64M-NEXT: slli a4, a3, 32 2687; RV64M-NEXT: add a3, a3, a4 2688; RV64M-NEXT: srli a4, a0, 1 2689; RV64M-NEXT: and a1, a4, a1 2690; RV64M-NEXT: sub a0, a0, a1 2691; RV64M-NEXT: and a1, a0, a2 2692; RV64M-NEXT: srli a0, a0, 2 2693; RV64M-NEXT: and a0, a0, a2 2694; RV64M-NEXT: lui a2, 4112 2695; RV64M-NEXT: addiw a2, a2, 257 2696; RV64M-NEXT: add a0, a1, a0 2697; RV64M-NEXT: srli a1, a0, 4 2698; RV64M-NEXT: add a0, a0, a1 2699; RV64M-NEXT: slli a1, a2, 32 2700; RV64M-NEXT: and a0, a0, a3 2701; RV64M-NEXT: add a1, a2, a1 2702; RV64M-NEXT: mul a0, a0, a1 2703; RV64M-NEXT: srli a0, a0, 56 2704; RV64M-NEXT: ret 2705; 2706; RV32ZBB-LABEL: test_ctpop_i64: 2707; RV32ZBB: # %bb.0: 2708; RV32ZBB-NEXT: cpop a1, a1 2709; RV32ZBB-NEXT: cpop a0, a0 2710; RV32ZBB-NEXT: add a0, a0, a1 2711; RV32ZBB-NEXT: li a1, 0 2712; RV32ZBB-NEXT: ret 2713; 2714; RV64ZBB-LABEL: test_ctpop_i64: 2715; RV64ZBB: # %bb.0: 2716; RV64ZBB-NEXT: cpop a0, a0 2717; RV64ZBB-NEXT: ret 2718; 2719; RV32XTHEADBB-LABEL: test_ctpop_i64: 2720; RV32XTHEADBB: # %bb.0: 2721; RV32XTHEADBB-NEXT: srli a2, a1, 1 2722; RV32XTHEADBB-NEXT: lui a3, 349525 2723; RV32XTHEADBB-NEXT: lui a4, 209715 2724; RV32XTHEADBB-NEXT: srli a5, a0, 1 2725; RV32XTHEADBB-NEXT: addi a3, a3, 1365 2726; RV32XTHEADBB-NEXT: and a2, a2, a3 2727; RV32XTHEADBB-NEXT: and a3, a5, a3 2728; RV32XTHEADBB-NEXT: lui a5, 61681 2729; RV32XTHEADBB-NEXT: addi a4, a4, 819 2730; RV32XTHEADBB-NEXT: addi a5, a5, -241 2731; RV32XTHEADBB-NEXT: sub a1, a1, a2 2732; RV32XTHEADBB-NEXT: sub a0, a0, a3 2733; RV32XTHEADBB-NEXT: and a2, a1, a4 2734; RV32XTHEADBB-NEXT: srli a1, a1, 2 2735; RV32XTHEADBB-NEXT: and a3, a0, a4 2736; RV32XTHEADBB-NEXT: srli a0, a0, 2 2737; RV32XTHEADBB-NEXT: and a1, a1, a4 2738; RV32XTHEADBB-NEXT: and a0, a0, a4 2739; RV32XTHEADBB-NEXT: add a1, a2, a1 2740; RV32XTHEADBB-NEXT: add a0, a3, a0 2741; RV32XTHEADBB-NEXT: srli a2, a1, 4 2742; RV32XTHEADBB-NEXT: srli a3, a0, 4 2743; RV32XTHEADBB-NEXT: add a1, a1, a2 2744; RV32XTHEADBB-NEXT: add a0, a0, a3 2745; RV32XTHEADBB-NEXT: and a1, a1, a5 2746; RV32XTHEADBB-NEXT: and a0, a0, a5 2747; RV32XTHEADBB-NEXT: slli a2, a1, 8 2748; RV32XTHEADBB-NEXT: slli a3, a0, 8 2749; RV32XTHEADBB-NEXT: add a1, a1, a2 2750; RV32XTHEADBB-NEXT: add a0, a0, a3 2751; RV32XTHEADBB-NEXT: slli a2, a1, 16 2752; RV32XTHEADBB-NEXT: slli a3, a0, 16 2753; RV32XTHEADBB-NEXT: add a1, a1, a2 2754; RV32XTHEADBB-NEXT: add a0, a0, a3 2755; RV32XTHEADBB-NEXT: srli a1, a1, 24 2756; RV32XTHEADBB-NEXT: srli a0, a0, 24 2757; RV32XTHEADBB-NEXT: add a0, a0, a1 2758; RV32XTHEADBB-NEXT: li a1, 0 2759; RV32XTHEADBB-NEXT: ret 2760; 2761; RV64XTHEADBB-LABEL: test_ctpop_i64: 2762; RV64XTHEADBB: # %bb.0: 2763; RV64XTHEADBB-NEXT: lui a1, 349525 2764; RV64XTHEADBB-NEXT: lui a2, 209715 2765; RV64XTHEADBB-NEXT: addiw a1, a1, 1365 2766; RV64XTHEADBB-NEXT: addiw a2, a2, 819 2767; RV64XTHEADBB-NEXT: slli a3, a1, 32 2768; RV64XTHEADBB-NEXT: add a1, a1, a3 2769; RV64XTHEADBB-NEXT: slli a3, a2, 32 2770; RV64XTHEADBB-NEXT: add a2, a2, a3 2771; RV64XTHEADBB-NEXT: srli a3, a0, 1 2772; RV64XTHEADBB-NEXT: and a1, a3, a1 2773; RV64XTHEADBB-NEXT: lui a3, 61681 2774; RV64XTHEADBB-NEXT: addiw a3, a3, -241 2775; RV64XTHEADBB-NEXT: sub a0, a0, a1 2776; RV64XTHEADBB-NEXT: and a1, a0, a2 2777; RV64XTHEADBB-NEXT: srli a0, a0, 2 2778; RV64XTHEADBB-NEXT: and a0, a0, a2 2779; RV64XTHEADBB-NEXT: slli a2, a3, 32 2780; RV64XTHEADBB-NEXT: add a0, a1, a0 2781; RV64XTHEADBB-NEXT: srli a1, a0, 4 2782; RV64XTHEADBB-NEXT: add a0, a0, a1 2783; RV64XTHEADBB-NEXT: add a2, a3, a2 2784; RV64XTHEADBB-NEXT: and a0, a0, a2 2785; RV64XTHEADBB-NEXT: slli a1, a0, 8 2786; RV64XTHEADBB-NEXT: add a0, a0, a1 2787; RV64XTHEADBB-NEXT: slli a1, a0, 16 2788; RV64XTHEADBB-NEXT: add a0, a0, a1 2789; RV64XTHEADBB-NEXT: slli a1, a0, 32 2790; RV64XTHEADBB-NEXT: add a0, a0, a1 2791; RV64XTHEADBB-NEXT: srli a0, a0, 56 2792; RV64XTHEADBB-NEXT: ret 2793 %1 = call i64 @llvm.ctpop.i64(i64 %a) 2794 ret i64 %1 2795} 2796 2797define i8 @test_parity_i8(i8 %a) { 2798; RV32_NOZBB-LABEL: test_parity_i8: 2799; RV32_NOZBB: # %bb.0: 2800; RV32_NOZBB-NEXT: andi a0, a0, 255 2801; RV32_NOZBB-NEXT: srli a1, a0, 4 2802; RV32_NOZBB-NEXT: xor a0, a0, a1 2803; RV32_NOZBB-NEXT: srli a1, a0, 2 2804; RV32_NOZBB-NEXT: xor a0, a0, a1 2805; RV32_NOZBB-NEXT: srli a1, a0, 1 2806; RV32_NOZBB-NEXT: xor a0, a0, a1 2807; RV32_NOZBB-NEXT: andi a0, a0, 1 2808; RV32_NOZBB-NEXT: ret 2809; 2810; RV64NOZBB-LABEL: test_parity_i8: 2811; RV64NOZBB: # %bb.0: 2812; RV64NOZBB-NEXT: andi a0, a0, 255 2813; RV64NOZBB-NEXT: srli a1, a0, 4 2814; RV64NOZBB-NEXT: xor a0, a0, a1 2815; RV64NOZBB-NEXT: srli a1, a0, 2 2816; RV64NOZBB-NEXT: xor a0, a0, a1 2817; RV64NOZBB-NEXT: srli a1, a0, 1 2818; RV64NOZBB-NEXT: xor a0, a0, a1 2819; RV64NOZBB-NEXT: andi a0, a0, 1 2820; RV64NOZBB-NEXT: ret 2821; 2822; RV32ZBB-LABEL: test_parity_i8: 2823; RV32ZBB: # %bb.0: 2824; RV32ZBB-NEXT: andi a0, a0, 255 2825; RV32ZBB-NEXT: cpop a0, a0 2826; RV32ZBB-NEXT: andi a0, a0, 1 2827; RV32ZBB-NEXT: ret 2828; 2829; RV64ZBB-LABEL: test_parity_i8: 2830; RV64ZBB: # %bb.0: 2831; RV64ZBB-NEXT: andi a0, a0, 255 2832; RV64ZBB-NEXT: cpopw a0, a0 2833; RV64ZBB-NEXT: andi a0, a0, 1 2834; RV64ZBB-NEXT: ret 2835; 2836; RV32XTHEADBB-LABEL: test_parity_i8: 2837; RV32XTHEADBB: # %bb.0: 2838; RV32XTHEADBB-NEXT: andi a0, a0, 255 2839; RV32XTHEADBB-NEXT: srli a1, a0, 4 2840; RV32XTHEADBB-NEXT: xor a0, a0, a1 2841; RV32XTHEADBB-NEXT: srli a1, a0, 2 2842; RV32XTHEADBB-NEXT: xor a0, a0, a1 2843; RV32XTHEADBB-NEXT: srli a1, a0, 1 2844; RV32XTHEADBB-NEXT: xor a0, a0, a1 2845; RV32XTHEADBB-NEXT: andi a0, a0, 1 2846; RV32XTHEADBB-NEXT: ret 2847; 2848; RV64XTHEADBB-LABEL: test_parity_i8: 2849; RV64XTHEADBB: # %bb.0: 2850; RV64XTHEADBB-NEXT: andi a0, a0, 255 2851; RV64XTHEADBB-NEXT: srli a1, a0, 4 2852; RV64XTHEADBB-NEXT: xor a0, a0, a1 2853; RV64XTHEADBB-NEXT: srli a1, a0, 2 2854; RV64XTHEADBB-NEXT: xor a0, a0, a1 2855; RV64XTHEADBB-NEXT: srli a1, a0, 1 2856; RV64XTHEADBB-NEXT: xor a0, a0, a1 2857; RV64XTHEADBB-NEXT: andi a0, a0, 1 2858; RV64XTHEADBB-NEXT: ret 2859 %1 = call i8 @llvm.ctpop.i8(i8 %a) 2860 %2 = and i8 %1, 1 2861 ret i8 %2 2862} 2863 2864define i16 @test_parity_i16(i16 %a) { 2865; RV32_NOZBB-LABEL: test_parity_i16: 2866; RV32_NOZBB: # %bb.0: 2867; RV32_NOZBB-NEXT: slli a0, a0, 16 2868; RV32_NOZBB-NEXT: srli a0, a0, 16 2869; RV32_NOZBB-NEXT: srli a1, a0, 8 2870; RV32_NOZBB-NEXT: xor a0, a0, a1 2871; RV32_NOZBB-NEXT: srli a1, a0, 4 2872; RV32_NOZBB-NEXT: xor a0, a0, a1 2873; RV32_NOZBB-NEXT: srli a1, a0, 2 2874; RV32_NOZBB-NEXT: xor a0, a0, a1 2875; RV32_NOZBB-NEXT: srli a1, a0, 1 2876; RV32_NOZBB-NEXT: xor a0, a0, a1 2877; RV32_NOZBB-NEXT: andi a0, a0, 1 2878; RV32_NOZBB-NEXT: ret 2879; 2880; RV64NOZBB-LABEL: test_parity_i16: 2881; RV64NOZBB: # %bb.0: 2882; RV64NOZBB-NEXT: slli a0, a0, 48 2883; RV64NOZBB-NEXT: srli a0, a0, 48 2884; RV64NOZBB-NEXT: srli a1, a0, 8 2885; RV64NOZBB-NEXT: xor a0, a0, a1 2886; RV64NOZBB-NEXT: srli a1, a0, 4 2887; RV64NOZBB-NEXT: xor a0, a0, a1 2888; RV64NOZBB-NEXT: srli a1, a0, 2 2889; RV64NOZBB-NEXT: xor a0, a0, a1 2890; RV64NOZBB-NEXT: srli a1, a0, 1 2891; RV64NOZBB-NEXT: xor a0, a0, a1 2892; RV64NOZBB-NEXT: andi a0, a0, 1 2893; RV64NOZBB-NEXT: ret 2894; 2895; RV32ZBB-LABEL: test_parity_i16: 2896; RV32ZBB: # %bb.0: 2897; RV32ZBB-NEXT: zext.h a0, a0 2898; RV32ZBB-NEXT: cpop a0, a0 2899; RV32ZBB-NEXT: andi a0, a0, 1 2900; RV32ZBB-NEXT: ret 2901; 2902; RV64ZBB-LABEL: test_parity_i16: 2903; RV64ZBB: # %bb.0: 2904; RV64ZBB-NEXT: zext.h a0, a0 2905; RV64ZBB-NEXT: cpopw a0, a0 2906; RV64ZBB-NEXT: andi a0, a0, 1 2907; RV64ZBB-NEXT: ret 2908; 2909; RV32XTHEADBB-LABEL: test_parity_i16: 2910; RV32XTHEADBB: # %bb.0: 2911; RV32XTHEADBB-NEXT: th.extu a0, a0, 15, 0 2912; RV32XTHEADBB-NEXT: srli a1, a0, 8 2913; RV32XTHEADBB-NEXT: xor a0, a0, a1 2914; RV32XTHEADBB-NEXT: srli a1, a0, 4 2915; RV32XTHEADBB-NEXT: xor a0, a0, a1 2916; RV32XTHEADBB-NEXT: srli a1, a0, 2 2917; RV32XTHEADBB-NEXT: xor a0, a0, a1 2918; RV32XTHEADBB-NEXT: srli a1, a0, 1 2919; RV32XTHEADBB-NEXT: xor a0, a0, a1 2920; RV32XTHEADBB-NEXT: andi a0, a0, 1 2921; RV32XTHEADBB-NEXT: ret 2922; 2923; RV64XTHEADBB-LABEL: test_parity_i16: 2924; RV64XTHEADBB: # %bb.0: 2925; RV64XTHEADBB-NEXT: th.extu a0, a0, 15, 0 2926; RV64XTHEADBB-NEXT: srli a1, a0, 8 2927; RV64XTHEADBB-NEXT: xor a0, a0, a1 2928; RV64XTHEADBB-NEXT: srli a1, a0, 4 2929; RV64XTHEADBB-NEXT: xor a0, a0, a1 2930; RV64XTHEADBB-NEXT: srli a1, a0, 2 2931; RV64XTHEADBB-NEXT: xor a0, a0, a1 2932; RV64XTHEADBB-NEXT: srli a1, a0, 1 2933; RV64XTHEADBB-NEXT: xor a0, a0, a1 2934; RV64XTHEADBB-NEXT: andi a0, a0, 1 2935; RV64XTHEADBB-NEXT: ret 2936 %1 = call i16 @llvm.ctpop.i16(i16 %a) 2937 %2 = and i16 %1, 1 2938 ret i16 %2 2939} 2940 2941define i32 @test_parity_i32(i32 %a) { 2942; RV32_NOZBB-LABEL: test_parity_i32: 2943; RV32_NOZBB: # %bb.0: 2944; RV32_NOZBB-NEXT: srli a1, a0, 16 2945; RV32_NOZBB-NEXT: xor a0, a0, a1 2946; RV32_NOZBB-NEXT: srli a1, a0, 8 2947; RV32_NOZBB-NEXT: xor a0, a0, a1 2948; RV32_NOZBB-NEXT: srli a1, a0, 4 2949; RV32_NOZBB-NEXT: xor a0, a0, a1 2950; RV32_NOZBB-NEXT: srli a1, a0, 2 2951; RV32_NOZBB-NEXT: xor a0, a0, a1 2952; RV32_NOZBB-NEXT: srli a1, a0, 1 2953; RV32_NOZBB-NEXT: xor a0, a0, a1 2954; RV32_NOZBB-NEXT: andi a0, a0, 1 2955; RV32_NOZBB-NEXT: ret 2956; 2957; RV64NOZBB-LABEL: test_parity_i32: 2958; RV64NOZBB: # %bb.0: 2959; RV64NOZBB-NEXT: slli a1, a0, 32 2960; RV64NOZBB-NEXT: srli a1, a1, 32 2961; RV64NOZBB-NEXT: srliw a0, a0, 16 2962; RV64NOZBB-NEXT: xor a0, a1, a0 2963; RV64NOZBB-NEXT: srli a1, a0, 8 2964; RV64NOZBB-NEXT: xor a0, a0, a1 2965; RV64NOZBB-NEXT: srli a1, a0, 4 2966; RV64NOZBB-NEXT: xor a0, a0, a1 2967; RV64NOZBB-NEXT: srli a1, a0, 2 2968; RV64NOZBB-NEXT: xor a0, a0, a1 2969; RV64NOZBB-NEXT: srli a1, a0, 1 2970; RV64NOZBB-NEXT: xor a0, a0, a1 2971; RV64NOZBB-NEXT: andi a0, a0, 1 2972; RV64NOZBB-NEXT: ret 2973; 2974; RV32ZBB-LABEL: test_parity_i32: 2975; RV32ZBB: # %bb.0: 2976; RV32ZBB-NEXT: cpop a0, a0 2977; RV32ZBB-NEXT: andi a0, a0, 1 2978; RV32ZBB-NEXT: ret 2979; 2980; RV64ZBB-LABEL: test_parity_i32: 2981; RV64ZBB: # %bb.0: 2982; RV64ZBB-NEXT: cpopw a0, a0 2983; RV64ZBB-NEXT: andi a0, a0, 1 2984; RV64ZBB-NEXT: ret 2985; 2986; RV32XTHEADBB-LABEL: test_parity_i32: 2987; RV32XTHEADBB: # %bb.0: 2988; RV32XTHEADBB-NEXT: srli a1, a0, 16 2989; RV32XTHEADBB-NEXT: xor a0, a0, a1 2990; RV32XTHEADBB-NEXT: srli a1, a0, 8 2991; RV32XTHEADBB-NEXT: xor a0, a0, a1 2992; RV32XTHEADBB-NEXT: srli a1, a0, 4 2993; RV32XTHEADBB-NEXT: xor a0, a0, a1 2994; RV32XTHEADBB-NEXT: srli a1, a0, 2 2995; RV32XTHEADBB-NEXT: xor a0, a0, a1 2996; RV32XTHEADBB-NEXT: srli a1, a0, 1 2997; RV32XTHEADBB-NEXT: xor a0, a0, a1 2998; RV32XTHEADBB-NEXT: andi a0, a0, 1 2999; RV32XTHEADBB-NEXT: ret 3000; 3001; RV64XTHEADBB-LABEL: test_parity_i32: 3002; RV64XTHEADBB: # %bb.0: 3003; RV64XTHEADBB-NEXT: th.extu a1, a0, 31, 0 3004; RV64XTHEADBB-NEXT: srliw a0, a0, 16 3005; RV64XTHEADBB-NEXT: xor a0, a1, a0 3006; RV64XTHEADBB-NEXT: srli a1, a0, 8 3007; RV64XTHEADBB-NEXT: xor a0, a0, a1 3008; RV64XTHEADBB-NEXT: srli a1, a0, 4 3009; RV64XTHEADBB-NEXT: xor a0, a0, a1 3010; RV64XTHEADBB-NEXT: srli a1, a0, 2 3011; RV64XTHEADBB-NEXT: xor a0, a0, a1 3012; RV64XTHEADBB-NEXT: srli a1, a0, 1 3013; RV64XTHEADBB-NEXT: xor a0, a0, a1 3014; RV64XTHEADBB-NEXT: andi a0, a0, 1 3015; RV64XTHEADBB-NEXT: ret 3016 %1 = call i32 @llvm.ctpop.i32(i32 %a) 3017 %2 = and i32 %1, 1 3018 ret i32 %2 3019} 3020 3021define i64 @test_parity_i64(i64 %a) { 3022; RV32_NOZBB-LABEL: test_parity_i64: 3023; RV32_NOZBB: # %bb.0: 3024; RV32_NOZBB-NEXT: xor a0, a0, a1 3025; RV32_NOZBB-NEXT: srli a1, a0, 16 3026; RV32_NOZBB-NEXT: xor a0, a0, a1 3027; RV32_NOZBB-NEXT: srli a1, a0, 8 3028; RV32_NOZBB-NEXT: xor a0, a0, a1 3029; RV32_NOZBB-NEXT: srli a1, a0, 4 3030; RV32_NOZBB-NEXT: xor a0, a0, a1 3031; RV32_NOZBB-NEXT: srli a1, a0, 2 3032; RV32_NOZBB-NEXT: xor a0, a0, a1 3033; RV32_NOZBB-NEXT: srli a1, a0, 1 3034; RV32_NOZBB-NEXT: xor a0, a0, a1 3035; RV32_NOZBB-NEXT: andi a0, a0, 1 3036; RV32_NOZBB-NEXT: li a1, 0 3037; RV32_NOZBB-NEXT: ret 3038; 3039; RV64NOZBB-LABEL: test_parity_i64: 3040; RV64NOZBB: # %bb.0: 3041; RV64NOZBB-NEXT: srli a1, a0, 32 3042; RV64NOZBB-NEXT: xor a0, a0, a1 3043; RV64NOZBB-NEXT: srli a1, a0, 16 3044; RV64NOZBB-NEXT: xor a0, a0, a1 3045; RV64NOZBB-NEXT: srli a1, a0, 8 3046; RV64NOZBB-NEXT: xor a0, a0, a1 3047; RV64NOZBB-NEXT: srli a1, a0, 4 3048; RV64NOZBB-NEXT: xor a0, a0, a1 3049; RV64NOZBB-NEXT: srli a1, a0, 2 3050; RV64NOZBB-NEXT: xor a0, a0, a1 3051; RV64NOZBB-NEXT: srli a1, a0, 1 3052; RV64NOZBB-NEXT: xor a0, a0, a1 3053; RV64NOZBB-NEXT: andi a0, a0, 1 3054; RV64NOZBB-NEXT: ret 3055; 3056; RV32ZBB-LABEL: test_parity_i64: 3057; RV32ZBB: # %bb.0: 3058; RV32ZBB-NEXT: xor a0, a0, a1 3059; RV32ZBB-NEXT: cpop a0, a0 3060; RV32ZBB-NEXT: andi a0, a0, 1 3061; RV32ZBB-NEXT: li a1, 0 3062; RV32ZBB-NEXT: ret 3063; 3064; RV64ZBB-LABEL: test_parity_i64: 3065; RV64ZBB: # %bb.0: 3066; RV64ZBB-NEXT: cpop a0, a0 3067; RV64ZBB-NEXT: andi a0, a0, 1 3068; RV64ZBB-NEXT: ret 3069; 3070; RV32XTHEADBB-LABEL: test_parity_i64: 3071; RV32XTHEADBB: # %bb.0: 3072; RV32XTHEADBB-NEXT: xor a0, a0, a1 3073; RV32XTHEADBB-NEXT: srli a1, a0, 16 3074; RV32XTHEADBB-NEXT: xor a0, a0, a1 3075; RV32XTHEADBB-NEXT: srli a1, a0, 8 3076; RV32XTHEADBB-NEXT: xor a0, a0, a1 3077; RV32XTHEADBB-NEXT: srli a1, a0, 4 3078; RV32XTHEADBB-NEXT: xor a0, a0, a1 3079; RV32XTHEADBB-NEXT: srli a1, a0, 2 3080; RV32XTHEADBB-NEXT: xor a0, a0, a1 3081; RV32XTHEADBB-NEXT: srli a1, a0, 1 3082; RV32XTHEADBB-NEXT: xor a0, a0, a1 3083; RV32XTHEADBB-NEXT: andi a0, a0, 1 3084; RV32XTHEADBB-NEXT: li a1, 0 3085; RV32XTHEADBB-NEXT: ret 3086; 3087; RV64XTHEADBB-LABEL: test_parity_i64: 3088; RV64XTHEADBB: # %bb.0: 3089; RV64XTHEADBB-NEXT: srli a1, a0, 32 3090; RV64XTHEADBB-NEXT: xor a0, a0, a1 3091; RV64XTHEADBB-NEXT: srli a1, a0, 16 3092; RV64XTHEADBB-NEXT: xor a0, a0, a1 3093; RV64XTHEADBB-NEXT: srli a1, a0, 8 3094; RV64XTHEADBB-NEXT: xor a0, a0, a1 3095; RV64XTHEADBB-NEXT: srli a1, a0, 4 3096; RV64XTHEADBB-NEXT: xor a0, a0, a1 3097; RV64XTHEADBB-NEXT: srli a1, a0, 2 3098; RV64XTHEADBB-NEXT: xor a0, a0, a1 3099; RV64XTHEADBB-NEXT: srli a1, a0, 1 3100; RV64XTHEADBB-NEXT: xor a0, a0, a1 3101; RV64XTHEADBB-NEXT: andi a0, a0, 1 3102; RV64XTHEADBB-NEXT: ret 3103 %1 = call i64 @llvm.ctpop.i64(i64 %a) 3104 %2 = and i64 %1, 1 3105 ret i64 %2 3106} 3107