xref: /llvm-project/llvm/test/CodeGen/RISCV/abdu.ll (revision 9122c5235ec85ce0c0ad337e862b006e7b349d84)
104f65043SSimon Pilgrim; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
204f65043SSimon Pilgrim; RUN: llc < %s -mtriple=riscv32 | FileCheck %s --check-prefixes=CHECK,NOZBB,RV32I
304f65043SSimon Pilgrim; RUN: llc < %s -mtriple=riscv64 | FileCheck %s --check-prefixes=CHECK,NOZBB,RV64I
404f65043SSimon Pilgrim; RUN: llc < %s -mtriple=riscv32 -mattr=+zbb | FileCheck %s --check-prefixes=CHECK,ZBB,RV32ZBB
504f65043SSimon Pilgrim; RUN: llc < %s -mtriple=riscv64 -mattr=+zbb | FileCheck %s --check-prefixes=CHECK,ZBB,RV64ZBB
604f65043SSimon Pilgrim
704f65043SSimon Pilgrim;
804f65043SSimon Pilgrim; trunc(abs(sub(zext(a),zext(b)))) -> abdu(a,b)
904f65043SSimon Pilgrim;
1004f65043SSimon Pilgrim
1104f65043SSimon Pilgrimdefine i8 @abd_ext_i8(i8 %a, i8 %b) nounwind {
1204f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i8:
1304f65043SSimon Pilgrim; RV32I:       # %bb.0:
14e4e96b3eSSimon Pilgrim; RV32I-NEXT:    andi a1, a1, 255
1513d04fa5SSimon Pilgrim; RV32I-NEXT:    andi a0, a0, 255
1604f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
1704f65043SSimon Pilgrim; RV32I-NEXT:    srai a1, a0, 31
1804f65043SSimon Pilgrim; RV32I-NEXT:    xor a0, a0, a1
1904f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
2004f65043SSimon Pilgrim; RV32I-NEXT:    ret
2104f65043SSimon Pilgrim;
2204f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i8:
2304f65043SSimon Pilgrim; RV64I:       # %bb.0:
24e4e96b3eSSimon Pilgrim; RV64I-NEXT:    andi a1, a1, 255
2513d04fa5SSimon Pilgrim; RV64I-NEXT:    andi a0, a0, 255
2604f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
2704f65043SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
2804f65043SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
2904f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
3004f65043SSimon Pilgrim; RV64I-NEXT:    ret
3104f65043SSimon Pilgrim;
3204f65043SSimon Pilgrim; ZBB-LABEL: abd_ext_i8:
3304f65043SSimon Pilgrim; ZBB:       # %bb.0:
34e4e96b3eSSimon Pilgrim; ZBB-NEXT:    andi a1, a1, 255
3513d04fa5SSimon Pilgrim; ZBB-NEXT:    andi a0, a0, 255
3613d04fa5SSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
3713d04fa5SSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
3813d04fa5SSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
3904f65043SSimon Pilgrim; ZBB-NEXT:    ret
4004f65043SSimon Pilgrim  %aext = zext i8 %a to i64
4104f65043SSimon Pilgrim  %bext = zext i8 %b to i64
4204f65043SSimon Pilgrim  %sub = sub i64 %aext, %bext
4304f65043SSimon Pilgrim  %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
4404f65043SSimon Pilgrim  %trunc = trunc i64 %abs to i8
4504f65043SSimon Pilgrim  ret i8 %trunc
4604f65043SSimon Pilgrim}
4704f65043SSimon Pilgrim
4804f65043SSimon Pilgrimdefine i8 @abd_ext_i8_i16(i8 %a, i16 %b) nounwind {
4904f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i8_i16:
5004f65043SSimon Pilgrim; RV32I:       # %bb.0:
5104f65043SSimon Pilgrim; RV32I-NEXT:    slli a1, a1, 16
5204f65043SSimon Pilgrim; RV32I-NEXT:    srli a1, a1, 16
5313d04fa5SSimon Pilgrim; RV32I-NEXT:    andi a0, a0, 255
5404f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
5504f65043SSimon Pilgrim; RV32I-NEXT:    srai a1, a0, 31
5604f65043SSimon Pilgrim; RV32I-NEXT:    xor a0, a0, a1
5704f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
5804f65043SSimon Pilgrim; RV32I-NEXT:    ret
5904f65043SSimon Pilgrim;
6004f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i8_i16:
6104f65043SSimon Pilgrim; RV64I:       # %bb.0:
6204f65043SSimon Pilgrim; RV64I-NEXT:    slli a1, a1, 48
6304f65043SSimon Pilgrim; RV64I-NEXT:    srli a1, a1, 48
6413d04fa5SSimon Pilgrim; RV64I-NEXT:    andi a0, a0, 255
6504f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
6604f65043SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
6704f65043SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
6804f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
6904f65043SSimon Pilgrim; RV64I-NEXT:    ret
7004f65043SSimon Pilgrim;
7104f65043SSimon Pilgrim; ZBB-LABEL: abd_ext_i8_i16:
7204f65043SSimon Pilgrim; ZBB:       # %bb.0:
73e4e96b3eSSimon Pilgrim; ZBB-NEXT:    zext.h a1, a1
7413d04fa5SSimon Pilgrim; ZBB-NEXT:    andi a0, a0, 255
7513d04fa5SSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
7613d04fa5SSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
7713d04fa5SSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
7804f65043SSimon Pilgrim; ZBB-NEXT:    ret
7904f65043SSimon Pilgrim  %aext = zext i8 %a to i64
8004f65043SSimon Pilgrim  %bext = zext i16 %b to i64
8104f65043SSimon Pilgrim  %sub = sub i64 %aext, %bext
8204f65043SSimon Pilgrim  %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
8304f65043SSimon Pilgrim  %trunc = trunc i64 %abs to i8
8404f65043SSimon Pilgrim  ret i8 %trunc
8504f65043SSimon Pilgrim}
8604f65043SSimon Pilgrim
8704f65043SSimon Pilgrimdefine i8 @abd_ext_i8_undef(i8 %a, i8 %b) nounwind {
8804f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i8_undef:
8904f65043SSimon Pilgrim; RV32I:       # %bb.0:
90e4e96b3eSSimon Pilgrim; RV32I-NEXT:    andi a1, a1, 255
9113d04fa5SSimon Pilgrim; RV32I-NEXT:    andi a0, a0, 255
9204f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
9304f65043SSimon Pilgrim; RV32I-NEXT:    srai a1, a0, 31
9404f65043SSimon Pilgrim; RV32I-NEXT:    xor a0, a0, a1
9504f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
9604f65043SSimon Pilgrim; RV32I-NEXT:    ret
9704f65043SSimon Pilgrim;
9804f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i8_undef:
9904f65043SSimon Pilgrim; RV64I:       # %bb.0:
100e4e96b3eSSimon Pilgrim; RV64I-NEXT:    andi a1, a1, 255
10113d04fa5SSimon Pilgrim; RV64I-NEXT:    andi a0, a0, 255
10204f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
10304f65043SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
10404f65043SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
10504f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
10604f65043SSimon Pilgrim; RV64I-NEXT:    ret
10704f65043SSimon Pilgrim;
10804f65043SSimon Pilgrim; ZBB-LABEL: abd_ext_i8_undef:
10904f65043SSimon Pilgrim; ZBB:       # %bb.0:
110e4e96b3eSSimon Pilgrim; ZBB-NEXT:    andi a1, a1, 255
11113d04fa5SSimon Pilgrim; ZBB-NEXT:    andi a0, a0, 255
11213d04fa5SSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
11313d04fa5SSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
11413d04fa5SSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
11504f65043SSimon Pilgrim; ZBB-NEXT:    ret
11604f65043SSimon Pilgrim  %aext = zext i8 %a to i64
11704f65043SSimon Pilgrim  %bext = zext i8 %b to i64
11804f65043SSimon Pilgrim  %sub = sub i64 %aext, %bext
11904f65043SSimon Pilgrim  %abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)
12004f65043SSimon Pilgrim  %trunc = trunc i64 %abs to i8
12104f65043SSimon Pilgrim  ret i8 %trunc
12204f65043SSimon Pilgrim}
12304f65043SSimon Pilgrim
12404f65043SSimon Pilgrimdefine i16 @abd_ext_i16(i16 %a, i16 %b) nounwind {
12504f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i16:
12604f65043SSimon Pilgrim; RV32I:       # %bb.0:
12704f65043SSimon Pilgrim; RV32I-NEXT:    lui a2, 16
12804f65043SSimon Pilgrim; RV32I-NEXT:    addi a2, a2, -1
129e4e96b3eSSimon Pilgrim; RV32I-NEXT:    and a1, a1, a2
13013d04fa5SSimon Pilgrim; RV32I-NEXT:    and a0, a0, a2
13104f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
13204f65043SSimon Pilgrim; RV32I-NEXT:    srai a1, a0, 31
13304f65043SSimon Pilgrim; RV32I-NEXT:    xor a0, a0, a1
13404f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
13504f65043SSimon Pilgrim; RV32I-NEXT:    ret
13604f65043SSimon Pilgrim;
13704f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i16:
13804f65043SSimon Pilgrim; RV64I:       # %bb.0:
13904f65043SSimon Pilgrim; RV64I-NEXT:    lui a2, 16
14004f65043SSimon Pilgrim; RV64I-NEXT:    addiw a2, a2, -1
141e4e96b3eSSimon Pilgrim; RV64I-NEXT:    and a1, a1, a2
14213d04fa5SSimon Pilgrim; RV64I-NEXT:    and a0, a0, a2
14304f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
14404f65043SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
14504f65043SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
14604f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
14704f65043SSimon Pilgrim; RV64I-NEXT:    ret
14804f65043SSimon Pilgrim;
14904f65043SSimon Pilgrim; ZBB-LABEL: abd_ext_i16:
15004f65043SSimon Pilgrim; ZBB:       # %bb.0:
151e4e96b3eSSimon Pilgrim; ZBB-NEXT:    zext.h a1, a1
15213d04fa5SSimon Pilgrim; ZBB-NEXT:    zext.h a0, a0
15313d04fa5SSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
15413d04fa5SSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
15513d04fa5SSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
15604f65043SSimon Pilgrim; ZBB-NEXT:    ret
15704f65043SSimon Pilgrim  %aext = zext i16 %a to i64
15804f65043SSimon Pilgrim  %bext = zext i16 %b to i64
15904f65043SSimon Pilgrim  %sub = sub i64 %aext, %bext
16004f65043SSimon Pilgrim  %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
16104f65043SSimon Pilgrim  %trunc = trunc i64 %abs to i16
16204f65043SSimon Pilgrim  ret i16 %trunc
16304f65043SSimon Pilgrim}
16404f65043SSimon Pilgrim
16504f65043SSimon Pilgrimdefine i16 @abd_ext_i16_i32(i16 %a, i32 %b) nounwind {
16604f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i16_i32:
16704f65043SSimon Pilgrim; RV32I:       # %bb.0:
16804f65043SSimon Pilgrim; RV32I-NEXT:    slli a0, a0, 16
16904f65043SSimon Pilgrim; RV32I-NEXT:    srli a0, a0, 16
17013d04fa5SSimon Pilgrim; RV32I-NEXT:    bltu a1, a0, .LBB4_2
171e4e96b3eSSimon Pilgrim; RV32I-NEXT:  # %bb.1:
17213d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a1, a0
17313d04fa5SSimon Pilgrim; RV32I-NEXT:    ret
174e4e96b3eSSimon Pilgrim; RV32I-NEXT:  .LBB4_2:
17513d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
17604f65043SSimon Pilgrim; RV32I-NEXT:    ret
17704f65043SSimon Pilgrim;
17804f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i16_i32:
17904f65043SSimon Pilgrim; RV64I:       # %bb.0:
180e4e96b3eSSimon Pilgrim; RV64I-NEXT:    slli a1, a1, 32
18113d04fa5SSimon Pilgrim; RV64I-NEXT:    slli a0, a0, 48
182*9122c523SPengcheng Wang; RV64I-NEXT:    srli a1, a1, 32
18313d04fa5SSimon Pilgrim; RV64I-NEXT:    srli a0, a0, 48
18404f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
18504f65043SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
18604f65043SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
18704f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
18804f65043SSimon Pilgrim; RV64I-NEXT:    ret
18904f65043SSimon Pilgrim;
19004f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_ext_i16_i32:
19104f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
19204f65043SSimon Pilgrim; RV32ZBB-NEXT:    zext.h a0, a0
19313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    minu a2, a0, a1
19413d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    maxu a0, a0, a1
19513d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a0, a0, a2
19604f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
19704f65043SSimon Pilgrim;
19804f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_ext_i16_i32:
19904f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
20004f65043SSimon Pilgrim; RV64ZBB-NEXT:    slli a1, a1, 32
20113d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    zext.h a0, a0
202*9122c523SPengcheng Wang; RV64ZBB-NEXT:    srli a1, a1, 32
20313d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
20413d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
20513d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
20604f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
20704f65043SSimon Pilgrim  %aext = zext i16 %a to i64
20804f65043SSimon Pilgrim  %bext = zext i32 %b to i64
20904f65043SSimon Pilgrim  %sub = sub i64 %aext, %bext
21004f65043SSimon Pilgrim  %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
21104f65043SSimon Pilgrim  %trunc = trunc i64 %abs to i16
21204f65043SSimon Pilgrim  ret i16 %trunc
21304f65043SSimon Pilgrim}
21404f65043SSimon Pilgrim
21504f65043SSimon Pilgrimdefine i16 @abd_ext_i16_undef(i16 %a, i16 %b) nounwind {
21604f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i16_undef:
21704f65043SSimon Pilgrim; RV32I:       # %bb.0:
21804f65043SSimon Pilgrim; RV32I-NEXT:    lui a2, 16
21904f65043SSimon Pilgrim; RV32I-NEXT:    addi a2, a2, -1
220e4e96b3eSSimon Pilgrim; RV32I-NEXT:    and a1, a1, a2
22113d04fa5SSimon Pilgrim; RV32I-NEXT:    and a0, a0, a2
22204f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
22304f65043SSimon Pilgrim; RV32I-NEXT:    srai a1, a0, 31
22404f65043SSimon Pilgrim; RV32I-NEXT:    xor a0, a0, a1
22504f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
22604f65043SSimon Pilgrim; RV32I-NEXT:    ret
22704f65043SSimon Pilgrim;
22804f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i16_undef:
22904f65043SSimon Pilgrim; RV64I:       # %bb.0:
23004f65043SSimon Pilgrim; RV64I-NEXT:    lui a2, 16
23104f65043SSimon Pilgrim; RV64I-NEXT:    addiw a2, a2, -1
232e4e96b3eSSimon Pilgrim; RV64I-NEXT:    and a1, a1, a2
23313d04fa5SSimon Pilgrim; RV64I-NEXT:    and a0, a0, a2
23404f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
23504f65043SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
23604f65043SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
23704f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
23804f65043SSimon Pilgrim; RV64I-NEXT:    ret
23904f65043SSimon Pilgrim;
24004f65043SSimon Pilgrim; ZBB-LABEL: abd_ext_i16_undef:
24104f65043SSimon Pilgrim; ZBB:       # %bb.0:
242e4e96b3eSSimon Pilgrim; ZBB-NEXT:    zext.h a1, a1
24313d04fa5SSimon Pilgrim; ZBB-NEXT:    zext.h a0, a0
24413d04fa5SSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
24513d04fa5SSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
24613d04fa5SSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
24704f65043SSimon Pilgrim; ZBB-NEXT:    ret
24804f65043SSimon Pilgrim  %aext = zext i16 %a to i64
24904f65043SSimon Pilgrim  %bext = zext i16 %b to i64
25004f65043SSimon Pilgrim  %sub = sub i64 %aext, %bext
25104f65043SSimon Pilgrim  %abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)
25204f65043SSimon Pilgrim  %trunc = trunc i64 %abs to i16
25304f65043SSimon Pilgrim  ret i16 %trunc
25404f65043SSimon Pilgrim}
25504f65043SSimon Pilgrim
25604f65043SSimon Pilgrimdefine i32 @abd_ext_i32(i32 %a, i32 %b) nounwind {
25704f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i32:
25804f65043SSimon Pilgrim; RV32I:       # %bb.0:
25913d04fa5SSimon Pilgrim; RV32I-NEXT:    bltu a1, a0, .LBB6_2
260e4e96b3eSSimon Pilgrim; RV32I-NEXT:  # %bb.1:
26113d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a1, a0
26213d04fa5SSimon Pilgrim; RV32I-NEXT:    ret
263e4e96b3eSSimon Pilgrim; RV32I-NEXT:  .LBB6_2:
26413d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
26504f65043SSimon Pilgrim; RV32I-NEXT:    ret
26604f65043SSimon Pilgrim;
26704f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i32:
26804f65043SSimon Pilgrim; RV64I:       # %bb.0:
269e4e96b3eSSimon Pilgrim; RV64I-NEXT:    slli a1, a1, 32
27013d04fa5SSimon Pilgrim; RV64I-NEXT:    slli a0, a0, 32
271*9122c523SPengcheng Wang; RV64I-NEXT:    srli a1, a1, 32
27213d04fa5SSimon Pilgrim; RV64I-NEXT:    srli a0, a0, 32
27304f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
27404f65043SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
27504f65043SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
27604f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
27704f65043SSimon Pilgrim; RV64I-NEXT:    ret
27804f65043SSimon Pilgrim;
27904f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_ext_i32:
28004f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
28113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    minu a2, a0, a1
28213d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    maxu a0, a0, a1
28313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a0, a0, a2
28404f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
28504f65043SSimon Pilgrim;
28604f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_ext_i32:
28704f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
288e4e96b3eSSimon Pilgrim; RV64ZBB-NEXT:    slli a1, a1, 32
28913d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    slli a0, a0, 32
290*9122c523SPengcheng Wang; RV64ZBB-NEXT:    srli a1, a1, 32
29113d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    srli a0, a0, 32
29213d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
29313d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
29413d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
29504f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
29604f65043SSimon Pilgrim  %aext = zext i32 %a to i64
29704f65043SSimon Pilgrim  %bext = zext i32 %b to i64
29804f65043SSimon Pilgrim  %sub = sub i64 %aext, %bext
29904f65043SSimon Pilgrim  %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
30004f65043SSimon Pilgrim  %trunc = trunc i64 %abs to i32
30104f65043SSimon Pilgrim  ret i32 %trunc
30204f65043SSimon Pilgrim}
30304f65043SSimon Pilgrim
30404f65043SSimon Pilgrimdefine i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
30504f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i32_i16:
30604f65043SSimon Pilgrim; RV32I:       # %bb.0:
30704f65043SSimon Pilgrim; RV32I-NEXT:    slli a1, a1, 16
30804f65043SSimon Pilgrim; RV32I-NEXT:    srli a1, a1, 16
30913d04fa5SSimon Pilgrim; RV32I-NEXT:    bltu a1, a0, .LBB7_2
310e4e96b3eSSimon Pilgrim; RV32I-NEXT:  # %bb.1:
31113d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a1, a0
31213d04fa5SSimon Pilgrim; RV32I-NEXT:    ret
313e4e96b3eSSimon Pilgrim; RV32I-NEXT:  .LBB7_2:
31413d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
31504f65043SSimon Pilgrim; RV32I-NEXT:    ret
31604f65043SSimon Pilgrim;
31704f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i32_i16:
31804f65043SSimon Pilgrim; RV64I:       # %bb.0:
31904f65043SSimon Pilgrim; RV64I-NEXT:    slli a0, a0, 32
32004f65043SSimon Pilgrim; RV64I-NEXT:    slli a1, a1, 48
321*9122c523SPengcheng Wang; RV64I-NEXT:    srli a0, a0, 32
32204f65043SSimon Pilgrim; RV64I-NEXT:    srli a1, a1, 48
32304f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
32404f65043SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
32504f65043SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
32604f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
32704f65043SSimon Pilgrim; RV64I-NEXT:    ret
32804f65043SSimon Pilgrim;
32904f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_ext_i32_i16:
33004f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
33104f65043SSimon Pilgrim; RV32ZBB-NEXT:    zext.h a1, a1
33213d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    minu a2, a0, a1
33313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    maxu a0, a0, a1
33413d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a0, a0, a2
33504f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
33604f65043SSimon Pilgrim;
33704f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_ext_i32_i16:
33804f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
33904f65043SSimon Pilgrim; RV64ZBB-NEXT:    slli a0, a0, 32
34004f65043SSimon Pilgrim; RV64ZBB-NEXT:    zext.h a1, a1
341*9122c523SPengcheng Wang; RV64ZBB-NEXT:    srli a0, a0, 32
34213d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
34313d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
34413d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
34504f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
34604f65043SSimon Pilgrim  %aext = zext i32 %a to i64
34704f65043SSimon Pilgrim  %bext = zext i16 %b to i64
34804f65043SSimon Pilgrim  %sub = sub i64 %aext, %bext
34904f65043SSimon Pilgrim  %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
35004f65043SSimon Pilgrim  %trunc = trunc i64 %abs to i32
35104f65043SSimon Pilgrim  ret i32 %trunc
35204f65043SSimon Pilgrim}
35304f65043SSimon Pilgrim
35404f65043SSimon Pilgrimdefine i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
35504f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i32_undef:
35604f65043SSimon Pilgrim; RV32I:       # %bb.0:
35713d04fa5SSimon Pilgrim; RV32I-NEXT:    bltu a1, a0, .LBB8_2
358e4e96b3eSSimon Pilgrim; RV32I-NEXT:  # %bb.1:
35913d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a1, a0
36013d04fa5SSimon Pilgrim; RV32I-NEXT:    ret
361e4e96b3eSSimon Pilgrim; RV32I-NEXT:  .LBB8_2:
36213d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
36304f65043SSimon Pilgrim; RV32I-NEXT:    ret
36404f65043SSimon Pilgrim;
36504f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i32_undef:
36604f65043SSimon Pilgrim; RV64I:       # %bb.0:
367e4e96b3eSSimon Pilgrim; RV64I-NEXT:    slli a1, a1, 32
36813d04fa5SSimon Pilgrim; RV64I-NEXT:    slli a0, a0, 32
369*9122c523SPengcheng Wang; RV64I-NEXT:    srli a1, a1, 32
37013d04fa5SSimon Pilgrim; RV64I-NEXT:    srli a0, a0, 32
37104f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
37204f65043SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
37304f65043SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
37404f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
37504f65043SSimon Pilgrim; RV64I-NEXT:    ret
37604f65043SSimon Pilgrim;
37704f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_ext_i32_undef:
37804f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
37913d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    minu a2, a0, a1
38013d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    maxu a0, a0, a1
38113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a0, a0, a2
38204f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
38304f65043SSimon Pilgrim;
38404f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_ext_i32_undef:
38504f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
386e4e96b3eSSimon Pilgrim; RV64ZBB-NEXT:    slli a1, a1, 32
38713d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    slli a0, a0, 32
388*9122c523SPengcheng Wang; RV64ZBB-NEXT:    srli a1, a1, 32
38913d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    srli a0, a0, 32
39013d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
39113d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
39213d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
39304f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
39404f65043SSimon Pilgrim  %aext = zext i32 %a to i64
39504f65043SSimon Pilgrim  %bext = zext i32 %b to i64
39604f65043SSimon Pilgrim  %sub = sub i64 %aext, %bext
39704f65043SSimon Pilgrim  %abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)
39804f65043SSimon Pilgrim  %trunc = trunc i64 %abs to i32
39904f65043SSimon Pilgrim  ret i32 %trunc
40004f65043SSimon Pilgrim}
40104f65043SSimon Pilgrim
40204f65043SSimon Pilgrimdefine i64 @abd_ext_i64(i64 %a, i64 %b) nounwind {
40304f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i64:
40404f65043SSimon Pilgrim; RV32I:       # %bb.0:
40504f65043SSimon Pilgrim; RV32I-NEXT:    sltu a4, a0, a2
40613d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a3, a1, a3
40713d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a3, a3, a4
40813d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a2, a0, a2
40913d04fa5SSimon Pilgrim; RV32I-NEXT:    beq a3, a1, .LBB9_2
41004f65043SSimon Pilgrim; RV32I-NEXT:  # %bb.1:
41113d04fa5SSimon Pilgrim; RV32I-NEXT:    sltu a0, a1, a3
41213d04fa5SSimon Pilgrim; RV32I-NEXT:    j .LBB9_3
41304f65043SSimon Pilgrim; RV32I-NEXT:  .LBB9_2:
41413d04fa5SSimon Pilgrim; RV32I-NEXT:    sltu a0, a0, a2
41513d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB9_3:
41613d04fa5SSimon Pilgrim; RV32I-NEXT:    neg a1, a0
41713d04fa5SSimon Pilgrim; RV32I-NEXT:    xor a2, a2, a1
418*9122c523SPengcheng Wang; RV32I-NEXT:    xor a3, a3, a1
419*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a1, a2, a1
420*9122c523SPengcheng Wang; RV32I-NEXT:    add a3, a3, a0
421*9122c523SPengcheng Wang; RV32I-NEXT:    sub a1, a3, a1
42213d04fa5SSimon Pilgrim; RV32I-NEXT:    add a0, a2, a0
42304f65043SSimon Pilgrim; RV32I-NEXT:    ret
42404f65043SSimon Pilgrim;
42504f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i64:
42604f65043SSimon Pilgrim; RV64I:       # %bb.0:
42713d04fa5SSimon Pilgrim; RV64I-NEXT:    bltu a1, a0, .LBB9_2
428e4e96b3eSSimon Pilgrim; RV64I-NEXT:  # %bb.1:
42913d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a1, a0
43013d04fa5SSimon Pilgrim; RV64I-NEXT:    ret
431e4e96b3eSSimon Pilgrim; RV64I-NEXT:  .LBB9_2:
43213d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
43304f65043SSimon Pilgrim; RV64I-NEXT:    ret
43404f65043SSimon Pilgrim;
43504f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_ext_i64:
43604f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
43704f65043SSimon Pilgrim; RV32ZBB-NEXT:    sltu a4, a0, a2
43813d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a1, a3
43913d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a3, a4
44013d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a2, a0, a2
44113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    beq a3, a1, .LBB9_2
44204f65043SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.1:
44313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a1, a3
44413d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    j .LBB9_3
44504f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB9_2:
44613d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a0, a2
44713d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB9_3:
44813d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    neg a1, a0
44913d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    xor a2, a2, a1
450*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a3, a3, a1
451*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a1, a2, a1
452*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a3, a3, a0
453*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a1, a3, a1
45413d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    add a0, a2, a0
45504f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
45604f65043SSimon Pilgrim;
45704f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_ext_i64:
45804f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
45913d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
46013d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
46113d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
46204f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
46304f65043SSimon Pilgrim  %aext = zext i64 %a to i128
46404f65043SSimon Pilgrim  %bext = zext i64 %b to i128
46504f65043SSimon Pilgrim  %sub = sub i128 %aext, %bext
46604f65043SSimon Pilgrim  %abs = call i128 @llvm.abs.i128(i128 %sub, i1 false)
46704f65043SSimon Pilgrim  %trunc = trunc i128 %abs to i64
46804f65043SSimon Pilgrim  ret i64 %trunc
46904f65043SSimon Pilgrim}
47004f65043SSimon Pilgrim
47104f65043SSimon Pilgrimdefine i64 @abd_ext_i64_undef(i64 %a, i64 %b) nounwind {
47204f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i64_undef:
47304f65043SSimon Pilgrim; RV32I:       # %bb.0:
47404f65043SSimon Pilgrim; RV32I-NEXT:    sltu a4, a0, a2
47513d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a3, a1, a3
47613d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a3, a3, a4
47713d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a2, a0, a2
47813d04fa5SSimon Pilgrim; RV32I-NEXT:    beq a3, a1, .LBB10_2
47904f65043SSimon Pilgrim; RV32I-NEXT:  # %bb.1:
48013d04fa5SSimon Pilgrim; RV32I-NEXT:    sltu a0, a1, a3
48113d04fa5SSimon Pilgrim; RV32I-NEXT:    j .LBB10_3
48204f65043SSimon Pilgrim; RV32I-NEXT:  .LBB10_2:
48313d04fa5SSimon Pilgrim; RV32I-NEXT:    sltu a0, a0, a2
48413d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB10_3:
48513d04fa5SSimon Pilgrim; RV32I-NEXT:    neg a1, a0
48613d04fa5SSimon Pilgrim; RV32I-NEXT:    xor a2, a2, a1
487*9122c523SPengcheng Wang; RV32I-NEXT:    xor a3, a3, a1
488*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a1, a2, a1
489*9122c523SPengcheng Wang; RV32I-NEXT:    add a3, a3, a0
490*9122c523SPengcheng Wang; RV32I-NEXT:    sub a1, a3, a1
49113d04fa5SSimon Pilgrim; RV32I-NEXT:    add a0, a2, a0
49204f65043SSimon Pilgrim; RV32I-NEXT:    ret
49304f65043SSimon Pilgrim;
49404f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i64_undef:
49504f65043SSimon Pilgrim; RV64I:       # %bb.0:
49613d04fa5SSimon Pilgrim; RV64I-NEXT:    bltu a1, a0, .LBB10_2
497e4e96b3eSSimon Pilgrim; RV64I-NEXT:  # %bb.1:
49813d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a1, a0
49913d04fa5SSimon Pilgrim; RV64I-NEXT:    ret
500e4e96b3eSSimon Pilgrim; RV64I-NEXT:  .LBB10_2:
50113d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
50204f65043SSimon Pilgrim; RV64I-NEXT:    ret
50304f65043SSimon Pilgrim;
50404f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_ext_i64_undef:
50504f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
50604f65043SSimon Pilgrim; RV32ZBB-NEXT:    sltu a4, a0, a2
50713d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a1, a3
50813d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a3, a4
50913d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a2, a0, a2
51013d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    beq a3, a1, .LBB10_2
51104f65043SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.1:
51213d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a1, a3
51313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    j .LBB10_3
51404f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB10_2:
51513d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a0, a2
51613d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB10_3:
51713d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    neg a1, a0
51813d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    xor a2, a2, a1
519*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a3, a3, a1
520*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a1, a2, a1
521*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a3, a3, a0
522*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a1, a3, a1
52313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    add a0, a2, a0
52404f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
52504f65043SSimon Pilgrim;
52604f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_ext_i64_undef:
52704f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
52813d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
52913d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
53013d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
53104f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
53204f65043SSimon Pilgrim  %aext = zext i64 %a to i128
53304f65043SSimon Pilgrim  %bext = zext i64 %b to i128
53404f65043SSimon Pilgrim  %sub = sub i128 %aext, %bext
53504f65043SSimon Pilgrim  %abs = call i128 @llvm.abs.i128(i128 %sub, i1 true)
53604f65043SSimon Pilgrim  %trunc = trunc i128 %abs to i64
53704f65043SSimon Pilgrim  ret i64 %trunc
53804f65043SSimon Pilgrim}
53904f65043SSimon Pilgrim
54004f65043SSimon Pilgrimdefine i128 @abd_ext_i128(i128 %a, i128 %b) nounwind {
54104f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i128:
54204f65043SSimon Pilgrim; RV32I:       # %bb.0:
54314c4f28eSAlex Bradbury; RV32I-NEXT:    lw a3, 0(a2)
54414c4f28eSAlex Bradbury; RV32I-NEXT:    lw a5, 4(a2)
54514c4f28eSAlex Bradbury; RV32I-NEXT:    lw a6, 8(a2)
54614c4f28eSAlex Bradbury; RV32I-NEXT:    lw a7, 12(a2)
54714c4f28eSAlex Bradbury; RV32I-NEXT:    lw a2, 8(a1)
54814c4f28eSAlex Bradbury; RV32I-NEXT:    lw a4, 12(a1)
54914c4f28eSAlex Bradbury; RV32I-NEXT:    lw t0, 0(a1)
55004f65043SSimon Pilgrim; RV32I-NEXT:    lw a1, 4(a1)
55114c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a2, a6
55213d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a7, a4, a7
55314c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t2, t0, a3
55413d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a7, a7, t1
55514c4f28eSAlex Bradbury; RV32I-NEXT:    mv t1, t2
55614c4f28eSAlex Bradbury; RV32I-NEXT:    beq a1, a5, .LBB11_2
55714c4f28eSAlex Bradbury; RV32I-NEXT:  # %bb.1:
55814c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a1, a5
55914c4f28eSAlex Bradbury; RV32I-NEXT:  .LBB11_2:
56014c4f28eSAlex Bradbury; RV32I-NEXT:    sub t3, a2, a6
56114c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a6, t3, t1
56214c4f28eSAlex Bradbury; RV32I-NEXT:    sub a6, a7, a6
56314c4f28eSAlex Bradbury; RV32I-NEXT:    sub a7, t3, t1
56414c4f28eSAlex Bradbury; RV32I-NEXT:    beq a6, a4, .LBB11_4
565e4e96b3eSSimon Pilgrim; RV32I-NEXT:  # %bb.3:
56614c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a4, a6
56713d04fa5SSimon Pilgrim; RV32I-NEXT:    j .LBB11_5
568e4e96b3eSSimon Pilgrim; RV32I-NEXT:  .LBB11_4:
56914c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a2, a7
57013d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB11_5:
57114c4f28eSAlex Bradbury; RV32I-NEXT:    sub a5, a1, a5
57214c4f28eSAlex Bradbury; RV32I-NEXT:    sub a5, a5, t2
57314c4f28eSAlex Bradbury; RV32I-NEXT:    sub a3, t0, a3
57414c4f28eSAlex Bradbury; RV32I-NEXT:    beq a5, a1, .LBB11_7
57513d04fa5SSimon Pilgrim; RV32I-NEXT:  # %bb.6:
57614c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a1, a1, a5
57713d04fa5SSimon Pilgrim; RV32I-NEXT:    j .LBB11_8
57813d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB11_7:
57914c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a1, t0, a3
580e4e96b3eSSimon Pilgrim; RV32I-NEXT:  .LBB11_8:
58114c4f28eSAlex Bradbury; RV32I-NEXT:    xor a4, a6, a4
58214c4f28eSAlex Bradbury; RV32I-NEXT:    xor a2, a7, a2
58314c4f28eSAlex Bradbury; RV32I-NEXT:    or a2, a2, a4
58414c4f28eSAlex Bradbury; RV32I-NEXT:    beqz a2, .LBB11_10
58513d04fa5SSimon Pilgrim; RV32I-NEXT:  # %bb.9:
58613d04fa5SSimon Pilgrim; RV32I-NEXT:    mv a1, t1
58713d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB11_10:
58814c4f28eSAlex Bradbury; RV32I-NEXT:    neg t0, a1
58914c4f28eSAlex Bradbury; RV32I-NEXT:    xor a2, a7, t0
59014c4f28eSAlex Bradbury; RV32I-NEXT:    xor a6, a6, t0
591*9122c523SPengcheng Wang; RV32I-NEXT:    xor a4, a3, t0
592*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a3, a2, t0
593*9122c523SPengcheng Wang; RV32I-NEXT:    add a7, a6, a1
594*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a6, a4, t0
595*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a7, a3
596*9122c523SPengcheng Wang; RV32I-NEXT:    xor t1, a5, t0
597*9122c523SPengcheng Wang; RV32I-NEXT:    mv a7, a6
59814c4f28eSAlex Bradbury; RV32I-NEXT:    beqz a5, .LBB11_12
59913d04fa5SSimon Pilgrim; RV32I-NEXT:  # %bb.11:
600*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a7, t1, t0
60113d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB11_12:
60214c4f28eSAlex Bradbury; RV32I-NEXT:    add a2, a2, a1
603*9122c523SPengcheng Wang; RV32I-NEXT:    add t1, t1, a1
604*9122c523SPengcheng Wang; RV32I-NEXT:    add a1, a4, a1
605*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a4, a2, a7
606*9122c523SPengcheng Wang; RV32I-NEXT:    sub a2, a2, a7
607*9122c523SPengcheng Wang; RV32I-NEXT:    sub a5, t1, a6
608*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a3, a4
60913d04fa5SSimon Pilgrim; RV32I-NEXT:    sw a1, 0(a0)
61013d04fa5SSimon Pilgrim; RV32I-NEXT:    sw a5, 4(a0)
61114c4f28eSAlex Bradbury; RV32I-NEXT:    sw a2, 8(a0)
612*9122c523SPengcheng Wang; RV32I-NEXT:    sw a3, 12(a0)
61304f65043SSimon Pilgrim; RV32I-NEXT:    ret
61404f65043SSimon Pilgrim;
61504f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i128:
61604f65043SSimon Pilgrim; RV64I:       # %bb.0:
61704f65043SSimon Pilgrim; RV64I-NEXT:    sltu a4, a0, a2
61813d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a3, a1, a3
61913d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a3, a3, a4
62013d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a2, a0, a2
62113d04fa5SSimon Pilgrim; RV64I-NEXT:    beq a3, a1, .LBB11_2
62204f65043SSimon Pilgrim; RV64I-NEXT:  # %bb.1:
62313d04fa5SSimon Pilgrim; RV64I-NEXT:    sltu a0, a1, a3
62413d04fa5SSimon Pilgrim; RV64I-NEXT:    j .LBB11_3
62504f65043SSimon Pilgrim; RV64I-NEXT:  .LBB11_2:
62613d04fa5SSimon Pilgrim; RV64I-NEXT:    sltu a0, a0, a2
62713d04fa5SSimon Pilgrim; RV64I-NEXT:  .LBB11_3:
62813d04fa5SSimon Pilgrim; RV64I-NEXT:    neg a1, a0
62913d04fa5SSimon Pilgrim; RV64I-NEXT:    xor a2, a2, a1
630*9122c523SPengcheng Wang; RV64I-NEXT:    xor a3, a3, a1
631*9122c523SPengcheng Wang; RV64I-NEXT:    sltu a1, a2, a1
632*9122c523SPengcheng Wang; RV64I-NEXT:    add a3, a3, a0
633*9122c523SPengcheng Wang; RV64I-NEXT:    sub a1, a3, a1
63413d04fa5SSimon Pilgrim; RV64I-NEXT:    add a0, a2, a0
63504f65043SSimon Pilgrim; RV64I-NEXT:    ret
63604f65043SSimon Pilgrim;
63704f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_ext_i128:
63804f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
63914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a3, 0(a2)
64014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a5, 4(a2)
64114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a6, 8(a2)
64214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a7, 12(a2)
64314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a2, 8(a1)
64414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a4, 12(a1)
64514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw t0, 0(a1)
64604f65043SSimon Pilgrim; RV32ZBB-NEXT:    lw a1, 4(a1)
64714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a6
64813d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a4, a7
64914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t2, t0, a3
65013d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a7, t1
65114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    mv t1, t2
65214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a1, a5, .LBB11_2
65314c4f28eSAlex Bradbury; RV32ZBB-NEXT:  # %bb.1:
65414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a1, a5
65514c4f28eSAlex Bradbury; RV32ZBB-NEXT:  .LBB11_2:
65614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub t3, a2, a6
65714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a6, t3, t1
65814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a6, a7, a6
65914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a7, t3, t1
66014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a6, a4, .LBB11_4
661e4e96b3eSSimon Pilgrim; RV32ZBB-NEXT:  # %bb.3:
66214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a4, a6
66313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    j .LBB11_5
664e4e96b3eSSimon Pilgrim; RV32ZBB-NEXT:  .LBB11_4:
66514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a7
66613d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB11_5:
66714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a1, a5
66814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a5, t2
66914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a3, t0, a3
67014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a5, a1, .LBB11_7
67113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.6:
67214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, a1, a5
67313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    j .LBB11_8
67413d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB11_7:
67514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, t0, a3
676e4e96b3eSSimon Pilgrim; RV32ZBB-NEXT:  .LBB11_8:
67714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a4, a6, a4
67814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, a2
67914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    or a2, a2, a4
68014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a2, .LBB11_10
68113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.9:
68213d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    mv a1, t1
68313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB11_10:
68414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    neg t0, a1
68514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, t0
68614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a6, a6, t0
687*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a4, a3, t0
688*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a3, a2, t0
689*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a7, a6, a1
690*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a6, a4, t0
691*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a7, a3
692*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor t1, a5, t0
693*9122c523SPengcheng Wang; RV32ZBB-NEXT:    mv a7, a6
69414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a5, .LBB11_12
69513d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.11:
696*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a7, t1, t0
69713d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB11_12:
69814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    add a2, a2, a1
699*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add t1, t1, a1
700*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a1, a4, a1
701*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a4, a2, a7
702*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a2, a2, a7
703*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a5, t1, a6
704*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a3, a4
70513d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sw a1, 0(a0)
70613d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sw a5, 4(a0)
70714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sw a2, 8(a0)
708*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sw a3, 12(a0)
70904f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
71004f65043SSimon Pilgrim;
71104f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_ext_i128:
71204f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
71304f65043SSimon Pilgrim; RV64ZBB-NEXT:    sltu a4, a0, a2
71413d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a1, a3
71513d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a3, a4
71613d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a2, a0, a2
71713d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    beq a3, a1, .LBB11_2
71804f65043SSimon Pilgrim; RV64ZBB-NEXT:  # %bb.1:
71913d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a1, a3
72013d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    j .LBB11_3
72104f65043SSimon Pilgrim; RV64ZBB-NEXT:  .LBB11_2:
72213d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a0, a2
72313d04fa5SSimon Pilgrim; RV64ZBB-NEXT:  .LBB11_3:
72413d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    neg a1, a0
72513d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    xor a2, a2, a1
726*9122c523SPengcheng Wang; RV64ZBB-NEXT:    xor a3, a3, a1
727*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sltu a1, a2, a1
728*9122c523SPengcheng Wang; RV64ZBB-NEXT:    add a3, a3, a0
729*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sub a1, a3, a1
73013d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    add a0, a2, a0
73104f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
73204f65043SSimon Pilgrim  %aext = zext i128 %a to i256
73304f65043SSimon Pilgrim  %bext = zext i128 %b to i256
73404f65043SSimon Pilgrim  %sub = sub i256 %aext, %bext
73504f65043SSimon Pilgrim  %abs = call i256 @llvm.abs.i256(i256 %sub, i1 false)
73604f65043SSimon Pilgrim  %trunc = trunc i256 %abs to i128
73704f65043SSimon Pilgrim  ret i128 %trunc
73804f65043SSimon Pilgrim}
73904f65043SSimon Pilgrim
74004f65043SSimon Pilgrimdefine i128 @abd_ext_i128_undef(i128 %a, i128 %b) nounwind {
74104f65043SSimon Pilgrim; RV32I-LABEL: abd_ext_i128_undef:
74204f65043SSimon Pilgrim; RV32I:       # %bb.0:
74314c4f28eSAlex Bradbury; RV32I-NEXT:    lw a3, 0(a2)
74414c4f28eSAlex Bradbury; RV32I-NEXT:    lw a5, 4(a2)
74514c4f28eSAlex Bradbury; RV32I-NEXT:    lw a6, 8(a2)
74614c4f28eSAlex Bradbury; RV32I-NEXT:    lw a7, 12(a2)
74714c4f28eSAlex Bradbury; RV32I-NEXT:    lw a2, 8(a1)
74814c4f28eSAlex Bradbury; RV32I-NEXT:    lw a4, 12(a1)
74914c4f28eSAlex Bradbury; RV32I-NEXT:    lw t0, 0(a1)
75004f65043SSimon Pilgrim; RV32I-NEXT:    lw a1, 4(a1)
75114c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a2, a6
75213d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a7, a4, a7
75314c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t2, t0, a3
75413d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a7, a7, t1
75514c4f28eSAlex Bradbury; RV32I-NEXT:    mv t1, t2
75614c4f28eSAlex Bradbury; RV32I-NEXT:    beq a1, a5, .LBB12_2
75714c4f28eSAlex Bradbury; RV32I-NEXT:  # %bb.1:
75814c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a1, a5
75914c4f28eSAlex Bradbury; RV32I-NEXT:  .LBB12_2:
76014c4f28eSAlex Bradbury; RV32I-NEXT:    sub t3, a2, a6
76114c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a6, t3, t1
76214c4f28eSAlex Bradbury; RV32I-NEXT:    sub a6, a7, a6
76314c4f28eSAlex Bradbury; RV32I-NEXT:    sub a7, t3, t1
76414c4f28eSAlex Bradbury; RV32I-NEXT:    beq a6, a4, .LBB12_4
765e4e96b3eSSimon Pilgrim; RV32I-NEXT:  # %bb.3:
76614c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a4, a6
76713d04fa5SSimon Pilgrim; RV32I-NEXT:    j .LBB12_5
768e4e96b3eSSimon Pilgrim; RV32I-NEXT:  .LBB12_4:
76914c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a2, a7
77013d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB12_5:
77114c4f28eSAlex Bradbury; RV32I-NEXT:    sub a5, a1, a5
77214c4f28eSAlex Bradbury; RV32I-NEXT:    sub a5, a5, t2
77314c4f28eSAlex Bradbury; RV32I-NEXT:    sub a3, t0, a3
77414c4f28eSAlex Bradbury; RV32I-NEXT:    beq a5, a1, .LBB12_7
77513d04fa5SSimon Pilgrim; RV32I-NEXT:  # %bb.6:
77614c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a1, a1, a5
77713d04fa5SSimon Pilgrim; RV32I-NEXT:    j .LBB12_8
77813d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB12_7:
77914c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a1, t0, a3
780e4e96b3eSSimon Pilgrim; RV32I-NEXT:  .LBB12_8:
78114c4f28eSAlex Bradbury; RV32I-NEXT:    xor a4, a6, a4
78214c4f28eSAlex Bradbury; RV32I-NEXT:    xor a2, a7, a2
78314c4f28eSAlex Bradbury; RV32I-NEXT:    or a2, a2, a4
78414c4f28eSAlex Bradbury; RV32I-NEXT:    beqz a2, .LBB12_10
78513d04fa5SSimon Pilgrim; RV32I-NEXT:  # %bb.9:
78613d04fa5SSimon Pilgrim; RV32I-NEXT:    mv a1, t1
78713d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB12_10:
78814c4f28eSAlex Bradbury; RV32I-NEXT:    neg t0, a1
78914c4f28eSAlex Bradbury; RV32I-NEXT:    xor a2, a7, t0
79014c4f28eSAlex Bradbury; RV32I-NEXT:    xor a6, a6, t0
791*9122c523SPengcheng Wang; RV32I-NEXT:    xor a4, a3, t0
792*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a3, a2, t0
793*9122c523SPengcheng Wang; RV32I-NEXT:    add a7, a6, a1
794*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a6, a4, t0
795*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a7, a3
796*9122c523SPengcheng Wang; RV32I-NEXT:    xor t1, a5, t0
797*9122c523SPengcheng Wang; RV32I-NEXT:    mv a7, a6
79814c4f28eSAlex Bradbury; RV32I-NEXT:    beqz a5, .LBB12_12
79913d04fa5SSimon Pilgrim; RV32I-NEXT:  # %bb.11:
800*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a7, t1, t0
80113d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB12_12:
80214c4f28eSAlex Bradbury; RV32I-NEXT:    add a2, a2, a1
803*9122c523SPengcheng Wang; RV32I-NEXT:    add t1, t1, a1
804*9122c523SPengcheng Wang; RV32I-NEXT:    add a1, a4, a1
805*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a4, a2, a7
806*9122c523SPengcheng Wang; RV32I-NEXT:    sub a2, a2, a7
807*9122c523SPengcheng Wang; RV32I-NEXT:    sub a5, t1, a6
808*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a3, a4
80913d04fa5SSimon Pilgrim; RV32I-NEXT:    sw a1, 0(a0)
81013d04fa5SSimon Pilgrim; RV32I-NEXT:    sw a5, 4(a0)
81114c4f28eSAlex Bradbury; RV32I-NEXT:    sw a2, 8(a0)
812*9122c523SPengcheng Wang; RV32I-NEXT:    sw a3, 12(a0)
81304f65043SSimon Pilgrim; RV32I-NEXT:    ret
81404f65043SSimon Pilgrim;
81504f65043SSimon Pilgrim; RV64I-LABEL: abd_ext_i128_undef:
81604f65043SSimon Pilgrim; RV64I:       # %bb.0:
81704f65043SSimon Pilgrim; RV64I-NEXT:    sltu a4, a0, a2
81813d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a3, a1, a3
81913d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a3, a3, a4
82013d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a2, a0, a2
82113d04fa5SSimon Pilgrim; RV64I-NEXT:    beq a3, a1, .LBB12_2
82204f65043SSimon Pilgrim; RV64I-NEXT:  # %bb.1:
82313d04fa5SSimon Pilgrim; RV64I-NEXT:    sltu a0, a1, a3
82413d04fa5SSimon Pilgrim; RV64I-NEXT:    j .LBB12_3
82504f65043SSimon Pilgrim; RV64I-NEXT:  .LBB12_2:
82613d04fa5SSimon Pilgrim; RV64I-NEXT:    sltu a0, a0, a2
82713d04fa5SSimon Pilgrim; RV64I-NEXT:  .LBB12_3:
82813d04fa5SSimon Pilgrim; RV64I-NEXT:    neg a1, a0
82913d04fa5SSimon Pilgrim; RV64I-NEXT:    xor a2, a2, a1
830*9122c523SPengcheng Wang; RV64I-NEXT:    xor a3, a3, a1
831*9122c523SPengcheng Wang; RV64I-NEXT:    sltu a1, a2, a1
832*9122c523SPengcheng Wang; RV64I-NEXT:    add a3, a3, a0
833*9122c523SPengcheng Wang; RV64I-NEXT:    sub a1, a3, a1
83413d04fa5SSimon Pilgrim; RV64I-NEXT:    add a0, a2, a0
83504f65043SSimon Pilgrim; RV64I-NEXT:    ret
83604f65043SSimon Pilgrim;
83704f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_ext_i128_undef:
83804f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
83914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a3, 0(a2)
84014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a5, 4(a2)
84114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a6, 8(a2)
84214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a7, 12(a2)
84314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a2, 8(a1)
84414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a4, 12(a1)
84514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw t0, 0(a1)
84604f65043SSimon Pilgrim; RV32ZBB-NEXT:    lw a1, 4(a1)
84714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a6
84813d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a4, a7
84914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t2, t0, a3
85013d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a7, t1
85114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    mv t1, t2
85214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a1, a5, .LBB12_2
85314c4f28eSAlex Bradbury; RV32ZBB-NEXT:  # %bb.1:
85414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a1, a5
85514c4f28eSAlex Bradbury; RV32ZBB-NEXT:  .LBB12_2:
85614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub t3, a2, a6
85714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a6, t3, t1
85814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a6, a7, a6
85914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a7, t3, t1
86014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a6, a4, .LBB12_4
861e4e96b3eSSimon Pilgrim; RV32ZBB-NEXT:  # %bb.3:
86214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a4, a6
86313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    j .LBB12_5
864e4e96b3eSSimon Pilgrim; RV32ZBB-NEXT:  .LBB12_4:
86514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a7
86613d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB12_5:
86714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a1, a5
86814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a5, t2
86914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a3, t0, a3
87014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a5, a1, .LBB12_7
87113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.6:
87214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, a1, a5
87313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    j .LBB12_8
87413d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB12_7:
87514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, t0, a3
876e4e96b3eSSimon Pilgrim; RV32ZBB-NEXT:  .LBB12_8:
87714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a4, a6, a4
87814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, a2
87914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    or a2, a2, a4
88014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a2, .LBB12_10
88113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.9:
88213d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    mv a1, t1
88313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB12_10:
88414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    neg t0, a1
88514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, t0
88614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a6, a6, t0
887*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a4, a3, t0
888*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a3, a2, t0
889*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a7, a6, a1
890*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a6, a4, t0
891*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a7, a3
892*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor t1, a5, t0
893*9122c523SPengcheng Wang; RV32ZBB-NEXT:    mv a7, a6
89414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a5, .LBB12_12
89513d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.11:
896*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a7, t1, t0
89713d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB12_12:
89814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    add a2, a2, a1
899*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add t1, t1, a1
900*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a1, a4, a1
901*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a4, a2, a7
902*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a2, a2, a7
903*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a5, t1, a6
904*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a3, a4
90513d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sw a1, 0(a0)
90613d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sw a5, 4(a0)
90714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sw a2, 8(a0)
908*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sw a3, 12(a0)
90904f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
91004f65043SSimon Pilgrim;
91104f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_ext_i128_undef:
91204f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
91304f65043SSimon Pilgrim; RV64ZBB-NEXT:    sltu a4, a0, a2
91413d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a1, a3
91513d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a3, a4
91613d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a2, a0, a2
91713d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    beq a3, a1, .LBB12_2
91804f65043SSimon Pilgrim; RV64ZBB-NEXT:  # %bb.1:
91913d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a1, a3
92013d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    j .LBB12_3
92104f65043SSimon Pilgrim; RV64ZBB-NEXT:  .LBB12_2:
92213d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a0, a2
92313d04fa5SSimon Pilgrim; RV64ZBB-NEXT:  .LBB12_3:
92413d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    neg a1, a0
92513d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    xor a2, a2, a1
926*9122c523SPengcheng Wang; RV64ZBB-NEXT:    xor a3, a3, a1
927*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sltu a1, a2, a1
928*9122c523SPengcheng Wang; RV64ZBB-NEXT:    add a3, a3, a0
929*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sub a1, a3, a1
93013d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    add a0, a2, a0
93104f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
93204f65043SSimon Pilgrim  %aext = zext i128 %a to i256
93304f65043SSimon Pilgrim  %bext = zext i128 %b to i256
93404f65043SSimon Pilgrim  %sub = sub i256 %aext, %bext
93504f65043SSimon Pilgrim  %abs = call i256 @llvm.abs.i256(i256 %sub, i1 true)
93604f65043SSimon Pilgrim  %trunc = trunc i256 %abs to i128
93704f65043SSimon Pilgrim  ret i128 %trunc
93804f65043SSimon Pilgrim}
93904f65043SSimon Pilgrim
94004f65043SSimon Pilgrim;
94104f65043SSimon Pilgrim; sub(umax(a,b),umin(a,b)) -> abdu(a,b)
94204f65043SSimon Pilgrim;
94304f65043SSimon Pilgrim
94404f65043SSimon Pilgrimdefine i8 @abd_minmax_i8(i8 %a, i8 %b) nounwind {
94513d04fa5SSimon Pilgrim; RV32I-LABEL: abd_minmax_i8:
94613d04fa5SSimon Pilgrim; RV32I:       # %bb.0:
94713d04fa5SSimon Pilgrim; RV32I-NEXT:    andi a1, a1, 255
94813d04fa5SSimon Pilgrim; RV32I-NEXT:    andi a0, a0, 255
94913d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
95013d04fa5SSimon Pilgrim; RV32I-NEXT:    srai a1, a0, 31
95113d04fa5SSimon Pilgrim; RV32I-NEXT:    xor a0, a0, a1
95213d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
95313d04fa5SSimon Pilgrim; RV32I-NEXT:    ret
95413d04fa5SSimon Pilgrim;
95513d04fa5SSimon Pilgrim; RV64I-LABEL: abd_minmax_i8:
95613d04fa5SSimon Pilgrim; RV64I:       # %bb.0:
95713d04fa5SSimon Pilgrim; RV64I-NEXT:    andi a1, a1, 255
95813d04fa5SSimon Pilgrim; RV64I-NEXT:    andi a0, a0, 255
95913d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
96013d04fa5SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
96113d04fa5SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
96213d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
96313d04fa5SSimon Pilgrim; RV64I-NEXT:    ret
96404f65043SSimon Pilgrim;
96504f65043SSimon Pilgrim; ZBB-LABEL: abd_minmax_i8:
96604f65043SSimon Pilgrim; ZBB:       # %bb.0:
96704f65043SSimon Pilgrim; ZBB-NEXT:    andi a1, a1, 255
96804f65043SSimon Pilgrim; ZBB-NEXT:    andi a0, a0, 255
96904f65043SSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
97004f65043SSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
97104f65043SSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
97204f65043SSimon Pilgrim; ZBB-NEXT:    ret
97304f65043SSimon Pilgrim  %min = call i8 @llvm.umin.i8(i8 %a, i8 %b)
97404f65043SSimon Pilgrim  %max = call i8 @llvm.umax.i8(i8 %a, i8 %b)
97504f65043SSimon Pilgrim  %sub = sub i8 %max, %min
97604f65043SSimon Pilgrim  ret i8 %sub
97704f65043SSimon Pilgrim}
97804f65043SSimon Pilgrim
97904f65043SSimon Pilgrimdefine i16 @abd_minmax_i16(i16 %a, i16 %b) nounwind {
98004f65043SSimon Pilgrim; RV32I-LABEL: abd_minmax_i16:
98104f65043SSimon Pilgrim; RV32I:       # %bb.0:
98204f65043SSimon Pilgrim; RV32I-NEXT:    lui a2, 16
98304f65043SSimon Pilgrim; RV32I-NEXT:    addi a2, a2, -1
98404f65043SSimon Pilgrim; RV32I-NEXT:    and a1, a1, a2
98504f65043SSimon Pilgrim; RV32I-NEXT:    and a0, a0, a2
98613d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
98713d04fa5SSimon Pilgrim; RV32I-NEXT:    srai a1, a0, 31
98813d04fa5SSimon Pilgrim; RV32I-NEXT:    xor a0, a0, a1
98913d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
99004f65043SSimon Pilgrim; RV32I-NEXT:    ret
99104f65043SSimon Pilgrim;
99204f65043SSimon Pilgrim; RV64I-LABEL: abd_minmax_i16:
99304f65043SSimon Pilgrim; RV64I:       # %bb.0:
99404f65043SSimon Pilgrim; RV64I-NEXT:    lui a2, 16
99504f65043SSimon Pilgrim; RV64I-NEXT:    addiw a2, a2, -1
99604f65043SSimon Pilgrim; RV64I-NEXT:    and a1, a1, a2
99704f65043SSimon Pilgrim; RV64I-NEXT:    and a0, a0, a2
99813d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
99913d04fa5SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
100013d04fa5SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
100113d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
100204f65043SSimon Pilgrim; RV64I-NEXT:    ret
100304f65043SSimon Pilgrim;
100404f65043SSimon Pilgrim; ZBB-LABEL: abd_minmax_i16:
100504f65043SSimon Pilgrim; ZBB:       # %bb.0:
100604f65043SSimon Pilgrim; ZBB-NEXT:    zext.h a1, a1
100704f65043SSimon Pilgrim; ZBB-NEXT:    zext.h a0, a0
100804f65043SSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
100904f65043SSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
101004f65043SSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
101104f65043SSimon Pilgrim; ZBB-NEXT:    ret
101204f65043SSimon Pilgrim  %min = call i16 @llvm.umin.i16(i16 %a, i16 %b)
101304f65043SSimon Pilgrim  %max = call i16 @llvm.umax.i16(i16 %a, i16 %b)
101404f65043SSimon Pilgrim  %sub = sub i16 %max, %min
101504f65043SSimon Pilgrim  ret i16 %sub
101604f65043SSimon Pilgrim}
101704f65043SSimon Pilgrim
101804f65043SSimon Pilgrimdefine i32 @abd_minmax_i32(i32 %a, i32 %b) nounwind {
101904f65043SSimon Pilgrim; RV32I-LABEL: abd_minmax_i32:
102004f65043SSimon Pilgrim; RV32I:       # %bb.0:
1021e4e96b3eSSimon Pilgrim; RV32I-NEXT:    bltu a1, a0, .LBB15_2
102213d04fa5SSimon Pilgrim; RV32I-NEXT:  # %bb.1:
102313d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a1, a0
102413d04fa5SSimon Pilgrim; RV32I-NEXT:    ret
102513d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB15_2:
102613d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
102704f65043SSimon Pilgrim; RV32I-NEXT:    ret
102804f65043SSimon Pilgrim;
102904f65043SSimon Pilgrim; RV64I-LABEL: abd_minmax_i32:
103004f65043SSimon Pilgrim; RV64I:       # %bb.0:
103113d04fa5SSimon Pilgrim; RV64I-NEXT:    slli a1, a1, 32
103213d04fa5SSimon Pilgrim; RV64I-NEXT:    slli a0, a0, 32
1033*9122c523SPengcheng Wang; RV64I-NEXT:    srli a1, a1, 32
103413d04fa5SSimon Pilgrim; RV64I-NEXT:    srli a0, a0, 32
103513d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
103613d04fa5SSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
103713d04fa5SSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
103813d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
103904f65043SSimon Pilgrim; RV64I-NEXT:    ret
104004f65043SSimon Pilgrim;
104104f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_minmax_i32:
104204f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
104304f65043SSimon Pilgrim; RV32ZBB-NEXT:    minu a2, a0, a1
104404f65043SSimon Pilgrim; RV32ZBB-NEXT:    maxu a0, a0, a1
104504f65043SSimon Pilgrim; RV32ZBB-NEXT:    sub a0, a0, a2
104604f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
104704f65043SSimon Pilgrim;
104804f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_minmax_i32:
104904f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
105013d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    slli a1, a1, 32
105113d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    slli a0, a0, 32
1052*9122c523SPengcheng Wang; RV64ZBB-NEXT:    srli a1, a1, 32
105313d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    srli a0, a0, 32
105404f65043SSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
105504f65043SSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
105613d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
105704f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
105804f65043SSimon Pilgrim  %min = call i32 @llvm.umin.i32(i32 %a, i32 %b)
105904f65043SSimon Pilgrim  %max = call i32 @llvm.umax.i32(i32 %a, i32 %b)
106004f65043SSimon Pilgrim  %sub = sub i32 %max, %min
106104f65043SSimon Pilgrim  ret i32 %sub
106204f65043SSimon Pilgrim}
106304f65043SSimon Pilgrim
106404f65043SSimon Pilgrimdefine i64 @abd_minmax_i64(i64 %a, i64 %b) nounwind {
106504f65043SSimon Pilgrim; RV32I-LABEL: abd_minmax_i64:
106604f65043SSimon Pilgrim; RV32I:       # %bb.0:
106713d04fa5SSimon Pilgrim; RV32I-NEXT:    sltu a4, a0, a2
106813d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a3, a1, a3
106913d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a3, a3, a4
107013d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a2, a0, a2
107113d04fa5SSimon Pilgrim; RV32I-NEXT:    beq a3, a1, .LBB16_2
107204f65043SSimon Pilgrim; RV32I-NEXT:  # %bb.1:
107313d04fa5SSimon Pilgrim; RV32I-NEXT:    sltu a0, a1, a3
107404f65043SSimon Pilgrim; RV32I-NEXT:    j .LBB16_3
107504f65043SSimon Pilgrim; RV32I-NEXT:  .LBB16_2:
107613d04fa5SSimon Pilgrim; RV32I-NEXT:    sltu a0, a0, a2
107704f65043SSimon Pilgrim; RV32I-NEXT:  .LBB16_3:
107813d04fa5SSimon Pilgrim; RV32I-NEXT:    neg a1, a0
107913d04fa5SSimon Pilgrim; RV32I-NEXT:    xor a2, a2, a1
1080*9122c523SPengcheng Wang; RV32I-NEXT:    xor a3, a3, a1
1081*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a1, a2, a1
1082*9122c523SPengcheng Wang; RV32I-NEXT:    add a3, a3, a0
1083*9122c523SPengcheng Wang; RV32I-NEXT:    sub a1, a3, a1
108413d04fa5SSimon Pilgrim; RV32I-NEXT:    add a0, a2, a0
108504f65043SSimon Pilgrim; RV32I-NEXT:    ret
108604f65043SSimon Pilgrim;
108704f65043SSimon Pilgrim; RV64I-LABEL: abd_minmax_i64:
108804f65043SSimon Pilgrim; RV64I:       # %bb.0:
1089e4e96b3eSSimon Pilgrim; RV64I-NEXT:    bltu a1, a0, .LBB16_2
109013d04fa5SSimon Pilgrim; RV64I-NEXT:  # %bb.1:
109113d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a1, a0
109213d04fa5SSimon Pilgrim; RV64I-NEXT:    ret
109313d04fa5SSimon Pilgrim; RV64I-NEXT:  .LBB16_2:
109413d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
109504f65043SSimon Pilgrim; RV64I-NEXT:    ret
109604f65043SSimon Pilgrim;
109704f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_minmax_i64:
109804f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
109913d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sltu a4, a0, a2
110013d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a1, a3
110113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a3, a4
110213d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a2, a0, a2
110313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    beq a3, a1, .LBB16_2
110404f65043SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.1:
110513d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a1, a3
110604f65043SSimon Pilgrim; RV32ZBB-NEXT:    j .LBB16_3
110704f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB16_2:
110813d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a0, a2
110904f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB16_3:
111013d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    neg a1, a0
111113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    xor a2, a2, a1
1112*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a3, a3, a1
1113*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a1, a2, a1
1114*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a3, a3, a0
1115*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a1, a3, a1
111613d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    add a0, a2, a0
111704f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
111804f65043SSimon Pilgrim;
111904f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_minmax_i64:
112004f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
112104f65043SSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
112204f65043SSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
112304f65043SSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
112404f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
112504f65043SSimon Pilgrim  %min = call i64 @llvm.umin.i64(i64 %a, i64 %b)
112604f65043SSimon Pilgrim  %max = call i64 @llvm.umax.i64(i64 %a, i64 %b)
112704f65043SSimon Pilgrim  %sub = sub i64 %max, %min
112804f65043SSimon Pilgrim  ret i64 %sub
112904f65043SSimon Pilgrim}
113004f65043SSimon Pilgrim
113104f65043SSimon Pilgrimdefine i128 @abd_minmax_i128(i128 %a, i128 %b) nounwind {
113204f65043SSimon Pilgrim; RV32I-LABEL: abd_minmax_i128:
113304f65043SSimon Pilgrim; RV32I:       # %bb.0:
113414c4f28eSAlex Bradbury; RV32I-NEXT:    lw a3, 0(a2)
113514c4f28eSAlex Bradbury; RV32I-NEXT:    lw a5, 4(a2)
113614c4f28eSAlex Bradbury; RV32I-NEXT:    lw a6, 8(a2)
113714c4f28eSAlex Bradbury; RV32I-NEXT:    lw a7, 12(a2)
113814c4f28eSAlex Bradbury; RV32I-NEXT:    lw a2, 8(a1)
113914c4f28eSAlex Bradbury; RV32I-NEXT:    lw a4, 12(a1)
114014c4f28eSAlex Bradbury; RV32I-NEXT:    lw t0, 0(a1)
114113d04fa5SSimon Pilgrim; RV32I-NEXT:    lw a1, 4(a1)
114214c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a2, a6
114313d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a7, a4, a7
114414c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t2, t0, a3
114513d04fa5SSimon Pilgrim; RV32I-NEXT:    sub a7, a7, t1
114614c4f28eSAlex Bradbury; RV32I-NEXT:    mv t1, t2
114714c4f28eSAlex Bradbury; RV32I-NEXT:    beq a1, a5, .LBB17_2
114814c4f28eSAlex Bradbury; RV32I-NEXT:  # %bb.1:
114914c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a1, a5
115014c4f28eSAlex Bradbury; RV32I-NEXT:  .LBB17_2:
115114c4f28eSAlex Bradbury; RV32I-NEXT:    sub t3, a2, a6
115214c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a6, t3, t1
115314c4f28eSAlex Bradbury; RV32I-NEXT:    sub a6, a7, a6
115414c4f28eSAlex Bradbury; RV32I-NEXT:    sub a7, t3, t1
115514c4f28eSAlex Bradbury; RV32I-NEXT:    beq a6, a4, .LBB17_4
115613d04fa5SSimon Pilgrim; RV32I-NEXT:  # %bb.3:
115714c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a4, a6
115813d04fa5SSimon Pilgrim; RV32I-NEXT:    j .LBB17_5
115913d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB17_4:
116014c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a2, a7
116104f65043SSimon Pilgrim; RV32I-NEXT:  .LBB17_5:
116214c4f28eSAlex Bradbury; RV32I-NEXT:    sub a5, a1, a5
116314c4f28eSAlex Bradbury; RV32I-NEXT:    sub a5, a5, t2
116414c4f28eSAlex Bradbury; RV32I-NEXT:    sub a3, t0, a3
116514c4f28eSAlex Bradbury; RV32I-NEXT:    beq a5, a1, .LBB17_7
116613d04fa5SSimon Pilgrim; RV32I-NEXT:  # %bb.6:
116714c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a1, a1, a5
116813d04fa5SSimon Pilgrim; RV32I-NEXT:    j .LBB17_8
116913d04fa5SSimon Pilgrim; RV32I-NEXT:  .LBB17_7:
117014c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a1, t0, a3
117104f65043SSimon Pilgrim; RV32I-NEXT:  .LBB17_8:
117214c4f28eSAlex Bradbury; RV32I-NEXT:    xor a4, a6, a4
117314c4f28eSAlex Bradbury; RV32I-NEXT:    xor a2, a7, a2
117414c4f28eSAlex Bradbury; RV32I-NEXT:    or a2, a2, a4
117514c4f28eSAlex Bradbury; RV32I-NEXT:    beqz a2, .LBB17_10
117604f65043SSimon Pilgrim; RV32I-NEXT:  # %bb.9:
117713d04fa5SSimon Pilgrim; RV32I-NEXT:    mv a1, t1
117804f65043SSimon Pilgrim; RV32I-NEXT:  .LBB17_10:
117914c4f28eSAlex Bradbury; RV32I-NEXT:    neg t0, a1
118014c4f28eSAlex Bradbury; RV32I-NEXT:    xor a2, a7, t0
118114c4f28eSAlex Bradbury; RV32I-NEXT:    xor a6, a6, t0
1182*9122c523SPengcheng Wang; RV32I-NEXT:    xor a4, a3, t0
1183*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a3, a2, t0
1184*9122c523SPengcheng Wang; RV32I-NEXT:    add a7, a6, a1
1185*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a6, a4, t0
1186*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a7, a3
1187*9122c523SPengcheng Wang; RV32I-NEXT:    xor t1, a5, t0
1188*9122c523SPengcheng Wang; RV32I-NEXT:    mv a7, a6
118914c4f28eSAlex Bradbury; RV32I-NEXT:    beqz a5, .LBB17_12
119004f65043SSimon Pilgrim; RV32I-NEXT:  # %bb.11:
1191*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a7, t1, t0
119204f65043SSimon Pilgrim; RV32I-NEXT:  .LBB17_12:
119314c4f28eSAlex Bradbury; RV32I-NEXT:    add a2, a2, a1
1194*9122c523SPengcheng Wang; RV32I-NEXT:    add t1, t1, a1
1195*9122c523SPengcheng Wang; RV32I-NEXT:    add a1, a4, a1
1196*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a4, a2, a7
1197*9122c523SPengcheng Wang; RV32I-NEXT:    sub a2, a2, a7
1198*9122c523SPengcheng Wang; RV32I-NEXT:    sub a5, t1, a6
1199*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a3, a4
120004f65043SSimon Pilgrim; RV32I-NEXT:    sw a1, 0(a0)
120113d04fa5SSimon Pilgrim; RV32I-NEXT:    sw a5, 4(a0)
120214c4f28eSAlex Bradbury; RV32I-NEXT:    sw a2, 8(a0)
1203*9122c523SPengcheng Wang; RV32I-NEXT:    sw a3, 12(a0)
120404f65043SSimon Pilgrim; RV32I-NEXT:    ret
120504f65043SSimon Pilgrim;
120604f65043SSimon Pilgrim; RV64I-LABEL: abd_minmax_i128:
120704f65043SSimon Pilgrim; RV64I:       # %bb.0:
120813d04fa5SSimon Pilgrim; RV64I-NEXT:    sltu a4, a0, a2
120913d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a3, a1, a3
121013d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a3, a3, a4
121113d04fa5SSimon Pilgrim; RV64I-NEXT:    sub a2, a0, a2
121213d04fa5SSimon Pilgrim; RV64I-NEXT:    beq a3, a1, .LBB17_2
121304f65043SSimon Pilgrim; RV64I-NEXT:  # %bb.1:
121413d04fa5SSimon Pilgrim; RV64I-NEXT:    sltu a0, a1, a3
121504f65043SSimon Pilgrim; RV64I-NEXT:    j .LBB17_3
121604f65043SSimon Pilgrim; RV64I-NEXT:  .LBB17_2:
121713d04fa5SSimon Pilgrim; RV64I-NEXT:    sltu a0, a0, a2
121804f65043SSimon Pilgrim; RV64I-NEXT:  .LBB17_3:
121913d04fa5SSimon Pilgrim; RV64I-NEXT:    neg a1, a0
122013d04fa5SSimon Pilgrim; RV64I-NEXT:    xor a2, a2, a1
1221*9122c523SPengcheng Wang; RV64I-NEXT:    xor a3, a3, a1
1222*9122c523SPengcheng Wang; RV64I-NEXT:    sltu a1, a2, a1
1223*9122c523SPengcheng Wang; RV64I-NEXT:    add a3, a3, a0
1224*9122c523SPengcheng Wang; RV64I-NEXT:    sub a1, a3, a1
122513d04fa5SSimon Pilgrim; RV64I-NEXT:    add a0, a2, a0
122604f65043SSimon Pilgrim; RV64I-NEXT:    ret
122704f65043SSimon Pilgrim;
122804f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_minmax_i128:
122904f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
123014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a3, 0(a2)
123114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a5, 4(a2)
123214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a6, 8(a2)
123314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a7, 12(a2)
123414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a2, 8(a1)
123514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a4, 12(a1)
123614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw t0, 0(a1)
123713d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    lw a1, 4(a1)
123814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a6
123913d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a4, a7
124014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t2, t0, a3
124113d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a7, t1
124214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    mv t1, t2
124314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a1, a5, .LBB17_2
124414c4f28eSAlex Bradbury; RV32ZBB-NEXT:  # %bb.1:
124514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a1, a5
124614c4f28eSAlex Bradbury; RV32ZBB-NEXT:  .LBB17_2:
124714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub t3, a2, a6
124814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a6, t3, t1
124914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a6, a7, a6
125014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a7, t3, t1
125114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a6, a4, .LBB17_4
125213d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.3:
125314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a4, a6
125413d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    j .LBB17_5
125513d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB17_4:
125614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a7
125704f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB17_5:
125814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a1, a5
125914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a5, t2
126014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a3, t0, a3
126114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a5, a1, .LBB17_7
126213d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.6:
126314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, a1, a5
126413d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    j .LBB17_8
126513d04fa5SSimon Pilgrim; RV32ZBB-NEXT:  .LBB17_7:
126614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, t0, a3
126704f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB17_8:
126814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a4, a6, a4
126914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, a2
127014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    or a2, a2, a4
127114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a2, .LBB17_10
127204f65043SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.9:
127313d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    mv a1, t1
127404f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB17_10:
127514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    neg t0, a1
127614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, t0
127714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a6, a6, t0
1278*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a4, a3, t0
1279*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a3, a2, t0
1280*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a7, a6, a1
1281*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a6, a4, t0
1282*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a7, a3
1283*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor t1, a5, t0
1284*9122c523SPengcheng Wang; RV32ZBB-NEXT:    mv a7, a6
128514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a5, .LBB17_12
128604f65043SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.11:
1287*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a7, t1, t0
128804f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB17_12:
128914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    add a2, a2, a1
1290*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add t1, t1, a1
1291*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a1, a4, a1
1292*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a4, a2, a7
1293*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a2, a2, a7
1294*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a5, t1, a6
1295*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a3, a4
129604f65043SSimon Pilgrim; RV32ZBB-NEXT:    sw a1, 0(a0)
129713d04fa5SSimon Pilgrim; RV32ZBB-NEXT:    sw a5, 4(a0)
129814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sw a2, 8(a0)
1299*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sw a3, 12(a0)
130004f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
130104f65043SSimon Pilgrim;
130204f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_minmax_i128:
130304f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
130413d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sltu a4, a0, a2
130513d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a1, a3
130613d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a3, a4
130713d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sub a2, a0, a2
130813d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    beq a3, a1, .LBB17_2
130904f65043SSimon Pilgrim; RV64ZBB-NEXT:  # %bb.1:
131013d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a1, a3
131104f65043SSimon Pilgrim; RV64ZBB-NEXT:    j .LBB17_3
131204f65043SSimon Pilgrim; RV64ZBB-NEXT:  .LBB17_2:
131313d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a0, a2
131404f65043SSimon Pilgrim; RV64ZBB-NEXT:  .LBB17_3:
131513d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    neg a1, a0
131613d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    xor a2, a2, a1
1317*9122c523SPengcheng Wang; RV64ZBB-NEXT:    xor a3, a3, a1
1318*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sltu a1, a2, a1
1319*9122c523SPengcheng Wang; RV64ZBB-NEXT:    add a3, a3, a0
1320*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sub a1, a3, a1
132113d04fa5SSimon Pilgrim; RV64ZBB-NEXT:    add a0, a2, a0
132204f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
132304f65043SSimon Pilgrim  %min = call i128 @llvm.umin.i128(i128 %a, i128 %b)
132404f65043SSimon Pilgrim  %max = call i128 @llvm.umax.i128(i128 %a, i128 %b)
132504f65043SSimon Pilgrim  %sub = sub i128 %max, %min
132604f65043SSimon Pilgrim  ret i128 %sub
132704f65043SSimon Pilgrim}
132804f65043SSimon Pilgrim
132904f65043SSimon Pilgrim;
133004f65043SSimon Pilgrim; select(icmp(a,b),sub(a,b),sub(b,a)) -> abdu(a,b)
133104f65043SSimon Pilgrim;
133204f65043SSimon Pilgrim
133304f65043SSimon Pilgrimdefine i8 @abd_cmp_i8(i8 %a, i8 %b) nounwind {
13348109e5deSSimon Pilgrim; RV32I-LABEL: abd_cmp_i8:
13358109e5deSSimon Pilgrim; RV32I:       # %bb.0:
13368109e5deSSimon Pilgrim; RV32I-NEXT:    andi a1, a1, 255
13378109e5deSSimon Pilgrim; RV32I-NEXT:    andi a0, a0, 255
13388109e5deSSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
13398109e5deSSimon Pilgrim; RV32I-NEXT:    srai a1, a0, 31
13408109e5deSSimon Pilgrim; RV32I-NEXT:    xor a0, a0, a1
13418109e5deSSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
13428109e5deSSimon Pilgrim; RV32I-NEXT:    ret
13438109e5deSSimon Pilgrim;
13448109e5deSSimon Pilgrim; RV64I-LABEL: abd_cmp_i8:
13458109e5deSSimon Pilgrim; RV64I:       # %bb.0:
13468109e5deSSimon Pilgrim; RV64I-NEXT:    andi a1, a1, 255
13478109e5deSSimon Pilgrim; RV64I-NEXT:    andi a0, a0, 255
13488109e5deSSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
13498109e5deSSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
13508109e5deSSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
13518109e5deSSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
13528109e5deSSimon Pilgrim; RV64I-NEXT:    ret
13538109e5deSSimon Pilgrim;
13548109e5deSSimon Pilgrim; ZBB-LABEL: abd_cmp_i8:
13558109e5deSSimon Pilgrim; ZBB:       # %bb.0:
13568109e5deSSimon Pilgrim; ZBB-NEXT:    andi a1, a1, 255
13578109e5deSSimon Pilgrim; ZBB-NEXT:    andi a0, a0, 255
13588109e5deSSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
13598109e5deSSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
13608109e5deSSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
13618109e5deSSimon Pilgrim; ZBB-NEXT:    ret
136204f65043SSimon Pilgrim  %cmp = icmp ugt i8 %a, %b
136304f65043SSimon Pilgrim  %ab = sub i8 %a, %b
136404f65043SSimon Pilgrim  %ba = sub i8 %b, %a
136504f65043SSimon Pilgrim  %sel = select i1 %cmp, i8 %ab, i8 %ba
136604f65043SSimon Pilgrim  ret i8 %sel
136704f65043SSimon Pilgrim}
136804f65043SSimon Pilgrim
136904f65043SSimon Pilgrimdefine i16 @abd_cmp_i16(i16 %a, i16 %b) nounwind {
137004f65043SSimon Pilgrim; RV32I-LABEL: abd_cmp_i16:
137104f65043SSimon Pilgrim; RV32I:       # %bb.0:
137204f65043SSimon Pilgrim; RV32I-NEXT:    lui a2, 16
137304f65043SSimon Pilgrim; RV32I-NEXT:    addi a2, a2, -1
13748109e5deSSimon Pilgrim; RV32I-NEXT:    and a1, a1, a2
13758109e5deSSimon Pilgrim; RV32I-NEXT:    and a0, a0, a2
13768109e5deSSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
13778109e5deSSimon Pilgrim; RV32I-NEXT:    srai a1, a0, 31
13788109e5deSSimon Pilgrim; RV32I-NEXT:    xor a0, a0, a1
137904f65043SSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
138004f65043SSimon Pilgrim; RV32I-NEXT:    ret
138104f65043SSimon Pilgrim;
138204f65043SSimon Pilgrim; RV64I-LABEL: abd_cmp_i16:
138304f65043SSimon Pilgrim; RV64I:       # %bb.0:
138404f65043SSimon Pilgrim; RV64I-NEXT:    lui a2, 16
138504f65043SSimon Pilgrim; RV64I-NEXT:    addiw a2, a2, -1
13868109e5deSSimon Pilgrim; RV64I-NEXT:    and a1, a1, a2
13878109e5deSSimon Pilgrim; RV64I-NEXT:    and a0, a0, a2
13888109e5deSSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
13898109e5deSSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
13908109e5deSSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
139104f65043SSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
139204f65043SSimon Pilgrim; RV64I-NEXT:    ret
139304f65043SSimon Pilgrim;
139404f65043SSimon Pilgrim; ZBB-LABEL: abd_cmp_i16:
139504f65043SSimon Pilgrim; ZBB:       # %bb.0:
13968109e5deSSimon Pilgrim; ZBB-NEXT:    zext.h a1, a1
13978109e5deSSimon Pilgrim; ZBB-NEXT:    zext.h a0, a0
13988109e5deSSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
13998109e5deSSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
14008109e5deSSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
140104f65043SSimon Pilgrim; ZBB-NEXT:    ret
140204f65043SSimon Pilgrim  %cmp = icmp uge i16 %a, %b
140304f65043SSimon Pilgrim  %ab = sub i16 %a, %b
140404f65043SSimon Pilgrim  %ba = sub i16 %b, %a
140504f65043SSimon Pilgrim  %sel = select i1 %cmp, i16 %ab, i16 %ba
140604f65043SSimon Pilgrim  ret i16 %sel
140704f65043SSimon Pilgrim}
140804f65043SSimon Pilgrim
140904f65043SSimon Pilgrimdefine i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
141004f65043SSimon Pilgrim; RV32I-LABEL: abd_cmp_i32:
141104f65043SSimon Pilgrim; RV32I:       # %bb.0:
14128109e5deSSimon Pilgrim; RV32I-NEXT:    bltu a1, a0, .LBB20_2
141304f65043SSimon Pilgrim; RV32I-NEXT:  # %bb.1:
14148109e5deSSimon Pilgrim; RV32I-NEXT:    sub a0, a1, a0
141504f65043SSimon Pilgrim; RV32I-NEXT:    ret
141604f65043SSimon Pilgrim; RV32I-NEXT:  .LBB20_2:
14178109e5deSSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
141804f65043SSimon Pilgrim; RV32I-NEXT:    ret
141904f65043SSimon Pilgrim;
142004f65043SSimon Pilgrim; RV64I-LABEL: abd_cmp_i32:
142104f65043SSimon Pilgrim; RV64I:       # %bb.0:
14228109e5deSSimon Pilgrim; RV64I-NEXT:    slli a1, a1, 32
14238109e5deSSimon Pilgrim; RV64I-NEXT:    slli a0, a0, 32
1424*9122c523SPengcheng Wang; RV64I-NEXT:    srli a1, a1, 32
14258109e5deSSimon Pilgrim; RV64I-NEXT:    srli a0, a0, 32
14268109e5deSSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
14278109e5deSSimon Pilgrim; RV64I-NEXT:    srai a1, a0, 63
14288109e5deSSimon Pilgrim; RV64I-NEXT:    xor a0, a0, a1
14298109e5deSSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
143004f65043SSimon Pilgrim; RV64I-NEXT:    ret
143104f65043SSimon Pilgrim;
143204f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_cmp_i32:
143304f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
14348109e5deSSimon Pilgrim; RV32ZBB-NEXT:    minu a2, a0, a1
14358109e5deSSimon Pilgrim; RV32ZBB-NEXT:    maxu a0, a0, a1
14368109e5deSSimon Pilgrim; RV32ZBB-NEXT:    sub a0, a0, a2
143704f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
143804f65043SSimon Pilgrim;
143904f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_cmp_i32:
144004f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
14418109e5deSSimon Pilgrim; RV64ZBB-NEXT:    slli a1, a1, 32
14428109e5deSSimon Pilgrim; RV64ZBB-NEXT:    slli a0, a0, 32
1443*9122c523SPengcheng Wang; RV64ZBB-NEXT:    srli a1, a1, 32
14448109e5deSSimon Pilgrim; RV64ZBB-NEXT:    srli a0, a0, 32
14458109e5deSSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
14468109e5deSSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
14478109e5deSSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
144804f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
144904f65043SSimon Pilgrim  %cmp = icmp ult i32 %a, %b
145004f65043SSimon Pilgrim  %ab = sub i32 %a, %b
145104f65043SSimon Pilgrim  %ba = sub i32 %b, %a
145204f65043SSimon Pilgrim  %sel = select i1 %cmp, i32 %ba, i32 %ab
145304f65043SSimon Pilgrim  ret i32 %sel
145404f65043SSimon Pilgrim}
145504f65043SSimon Pilgrim
145604f65043SSimon Pilgrimdefine i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {
145704f65043SSimon Pilgrim; RV32I-LABEL: abd_cmp_i64:
145804f65043SSimon Pilgrim; RV32I:       # %bb.0:
145904f65043SSimon Pilgrim; RV32I-NEXT:    sltu a4, a0, a2
14607afdc6bdSSimon Pilgrim; RV32I-NEXT:    sub a3, a1, a3
14617afdc6bdSSimon Pilgrim; RV32I-NEXT:    sub a3, a3, a4
14627afdc6bdSSimon Pilgrim; RV32I-NEXT:    sub a2, a0, a2
14637afdc6bdSSimon Pilgrim; RV32I-NEXT:    beq a3, a1, .LBB21_2
146404f65043SSimon Pilgrim; RV32I-NEXT:  # %bb.1:
14657afdc6bdSSimon Pilgrim; RV32I-NEXT:    sltu a0, a1, a3
14667afdc6bdSSimon Pilgrim; RV32I-NEXT:    j .LBB21_3
146704f65043SSimon Pilgrim; RV32I-NEXT:  .LBB21_2:
14687afdc6bdSSimon Pilgrim; RV32I-NEXT:    sltu a0, a0, a2
14697afdc6bdSSimon Pilgrim; RV32I-NEXT:  .LBB21_3:
14707afdc6bdSSimon Pilgrim; RV32I-NEXT:    neg a1, a0
14717afdc6bdSSimon Pilgrim; RV32I-NEXT:    xor a2, a2, a1
1472*9122c523SPengcheng Wang; RV32I-NEXT:    xor a3, a3, a1
1473*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a1, a2, a1
1474*9122c523SPengcheng Wang; RV32I-NEXT:    add a3, a3, a0
1475*9122c523SPengcheng Wang; RV32I-NEXT:    sub a1, a3, a1
14767afdc6bdSSimon Pilgrim; RV32I-NEXT:    add a0, a2, a0
147704f65043SSimon Pilgrim; RV32I-NEXT:    ret
147804f65043SSimon Pilgrim;
147904f65043SSimon Pilgrim; RV64I-LABEL: abd_cmp_i64:
148004f65043SSimon Pilgrim; RV64I:       # %bb.0:
14817afdc6bdSSimon Pilgrim; RV64I-NEXT:    bltu a1, a0, .LBB21_2
148204f65043SSimon Pilgrim; RV64I-NEXT:  # %bb.1:
14837afdc6bdSSimon Pilgrim; RV64I-NEXT:    sub a0, a1, a0
148404f65043SSimon Pilgrim; RV64I-NEXT:    ret
148504f65043SSimon Pilgrim; RV64I-NEXT:  .LBB21_2:
14867afdc6bdSSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
148704f65043SSimon Pilgrim; RV64I-NEXT:    ret
148804f65043SSimon Pilgrim;
148904f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_cmp_i64:
149004f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
149104f65043SSimon Pilgrim; RV32ZBB-NEXT:    sltu a4, a0, a2
14927afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a1, a3
14937afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a3, a4
14947afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    sub a2, a0, a2
14957afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    beq a3, a1, .LBB21_2
149604f65043SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.1:
14977afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a1, a3
14987afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    j .LBB21_3
149904f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB21_2:
15007afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a0, a2
15017afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:  .LBB21_3:
15027afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    neg a1, a0
15037afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    xor a2, a2, a1
1504*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a3, a3, a1
1505*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a1, a2, a1
1506*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a3, a3, a0
1507*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a1, a3, a1
15087afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    add a0, a2, a0
150904f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
151004f65043SSimon Pilgrim;
151104f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_cmp_i64:
151204f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
15137afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
15147afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
15157afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
151604f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
151704f65043SSimon Pilgrim  %cmp = icmp uge i64 %a, %b
151804f65043SSimon Pilgrim  %ab = sub i64 %a, %b
151904f65043SSimon Pilgrim  %ba = sub i64 %b, %a
15207afdc6bdSSimon Pilgrim  %sel = select i1 %cmp, i64 %ab, i64 %ba
152104f65043SSimon Pilgrim  ret i64 %sel
152204f65043SSimon Pilgrim}
152304f65043SSimon Pilgrim
152404f65043SSimon Pilgrimdefine i128 @abd_cmp_i128(i128 %a, i128 %b) nounwind {
152504f65043SSimon Pilgrim; RV32I-LABEL: abd_cmp_i128:
152604f65043SSimon Pilgrim; RV32I:       # %bb.0:
152714c4f28eSAlex Bradbury; RV32I-NEXT:    lw a3, 0(a2)
152814c4f28eSAlex Bradbury; RV32I-NEXT:    lw a5, 4(a2)
152914c4f28eSAlex Bradbury; RV32I-NEXT:    lw a6, 8(a2)
153014c4f28eSAlex Bradbury; RV32I-NEXT:    lw a7, 12(a2)
153114c4f28eSAlex Bradbury; RV32I-NEXT:    lw a2, 8(a1)
153214c4f28eSAlex Bradbury; RV32I-NEXT:    lw a4, 12(a1)
153314c4f28eSAlex Bradbury; RV32I-NEXT:    lw t0, 0(a1)
153404f65043SSimon Pilgrim; RV32I-NEXT:    lw a1, 4(a1)
153514c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a2, a6
15367afdc6bdSSimon Pilgrim; RV32I-NEXT:    sub a7, a4, a7
153714c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t2, t0, a3
15387afdc6bdSSimon Pilgrim; RV32I-NEXT:    sub a7, a7, t1
153914c4f28eSAlex Bradbury; RV32I-NEXT:    mv t1, t2
154014c4f28eSAlex Bradbury; RV32I-NEXT:    beq a1, a5, .LBB22_2
154114c4f28eSAlex Bradbury; RV32I-NEXT:  # %bb.1:
154214c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a1, a5
154314c4f28eSAlex Bradbury; RV32I-NEXT:  .LBB22_2:
154414c4f28eSAlex Bradbury; RV32I-NEXT:    sub t3, a2, a6
154514c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a6, t3, t1
154614c4f28eSAlex Bradbury; RV32I-NEXT:    sub a6, a7, a6
154714c4f28eSAlex Bradbury; RV32I-NEXT:    sub a7, t3, t1
154814c4f28eSAlex Bradbury; RV32I-NEXT:    beq a6, a4, .LBB22_4
154904f65043SSimon Pilgrim; RV32I-NEXT:  # %bb.3:
155014c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a4, a6
15517afdc6bdSSimon Pilgrim; RV32I-NEXT:    j .LBB22_5
155204f65043SSimon Pilgrim; RV32I-NEXT:  .LBB22_4:
155314c4f28eSAlex Bradbury; RV32I-NEXT:    sltu t1, a2, a7
15547afdc6bdSSimon Pilgrim; RV32I-NEXT:  .LBB22_5:
155514c4f28eSAlex Bradbury; RV32I-NEXT:    sub a5, a1, a5
155614c4f28eSAlex Bradbury; RV32I-NEXT:    sub a5, a5, t2
155714c4f28eSAlex Bradbury; RV32I-NEXT:    sub a3, t0, a3
155814c4f28eSAlex Bradbury; RV32I-NEXT:    beq a5, a1, .LBB22_7
15597afdc6bdSSimon Pilgrim; RV32I-NEXT:  # %bb.6:
156014c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a1, a1, a5
15617afdc6bdSSimon Pilgrim; RV32I-NEXT:    j .LBB22_8
15627afdc6bdSSimon Pilgrim; RV32I-NEXT:  .LBB22_7:
156314c4f28eSAlex Bradbury; RV32I-NEXT:    sltu a1, t0, a3
156404f65043SSimon Pilgrim; RV32I-NEXT:  .LBB22_8:
156514c4f28eSAlex Bradbury; RV32I-NEXT:    xor a4, a6, a4
156614c4f28eSAlex Bradbury; RV32I-NEXT:    xor a2, a7, a2
156714c4f28eSAlex Bradbury; RV32I-NEXT:    or a2, a2, a4
156814c4f28eSAlex Bradbury; RV32I-NEXT:    beqz a2, .LBB22_10
156904f65043SSimon Pilgrim; RV32I-NEXT:  # %bb.9:
15707afdc6bdSSimon Pilgrim; RV32I-NEXT:    mv a1, t1
157104f65043SSimon Pilgrim; RV32I-NEXT:  .LBB22_10:
157214c4f28eSAlex Bradbury; RV32I-NEXT:    neg t0, a1
157314c4f28eSAlex Bradbury; RV32I-NEXT:    xor a2, a7, t0
157414c4f28eSAlex Bradbury; RV32I-NEXT:    xor a6, a6, t0
1575*9122c523SPengcheng Wang; RV32I-NEXT:    xor a4, a3, t0
1576*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a3, a2, t0
1577*9122c523SPengcheng Wang; RV32I-NEXT:    add a7, a6, a1
1578*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a6, a4, t0
1579*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a7, a3
1580*9122c523SPengcheng Wang; RV32I-NEXT:    xor t1, a5, t0
1581*9122c523SPengcheng Wang; RV32I-NEXT:    mv a7, a6
158214c4f28eSAlex Bradbury; RV32I-NEXT:    beqz a5, .LBB22_12
15837afdc6bdSSimon Pilgrim; RV32I-NEXT:  # %bb.11:
1584*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a7, t1, t0
15857afdc6bdSSimon Pilgrim; RV32I-NEXT:  .LBB22_12:
158614c4f28eSAlex Bradbury; RV32I-NEXT:    add a2, a2, a1
1587*9122c523SPengcheng Wang; RV32I-NEXT:    add t1, t1, a1
1588*9122c523SPengcheng Wang; RV32I-NEXT:    add a1, a4, a1
1589*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a4, a2, a7
1590*9122c523SPengcheng Wang; RV32I-NEXT:    sub a2, a2, a7
1591*9122c523SPengcheng Wang; RV32I-NEXT:    sub a5, t1, a6
1592*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a3, a4
15937afdc6bdSSimon Pilgrim; RV32I-NEXT:    sw a1, 0(a0)
15947afdc6bdSSimon Pilgrim; RV32I-NEXT:    sw a5, 4(a0)
159514c4f28eSAlex Bradbury; RV32I-NEXT:    sw a2, 8(a0)
1596*9122c523SPengcheng Wang; RV32I-NEXT:    sw a3, 12(a0)
159704f65043SSimon Pilgrim; RV32I-NEXT:    ret
159804f65043SSimon Pilgrim;
159904f65043SSimon Pilgrim; RV64I-LABEL: abd_cmp_i128:
160004f65043SSimon Pilgrim; RV64I:       # %bb.0:
160104f65043SSimon Pilgrim; RV64I-NEXT:    sltu a4, a0, a2
16027afdc6bdSSimon Pilgrim; RV64I-NEXT:    sub a3, a1, a3
16037afdc6bdSSimon Pilgrim; RV64I-NEXT:    sub a3, a3, a4
16047afdc6bdSSimon Pilgrim; RV64I-NEXT:    sub a2, a0, a2
16057afdc6bdSSimon Pilgrim; RV64I-NEXT:    beq a3, a1, .LBB22_2
160604f65043SSimon Pilgrim; RV64I-NEXT:  # %bb.1:
16077afdc6bdSSimon Pilgrim; RV64I-NEXT:    sltu a0, a1, a3
16087afdc6bdSSimon Pilgrim; RV64I-NEXT:    j .LBB22_3
160904f65043SSimon Pilgrim; RV64I-NEXT:  .LBB22_2:
16107afdc6bdSSimon Pilgrim; RV64I-NEXT:    sltu a0, a0, a2
16117afdc6bdSSimon Pilgrim; RV64I-NEXT:  .LBB22_3:
16127afdc6bdSSimon Pilgrim; RV64I-NEXT:    neg a1, a0
16137afdc6bdSSimon Pilgrim; RV64I-NEXT:    xor a2, a2, a1
1614*9122c523SPengcheng Wang; RV64I-NEXT:    xor a3, a3, a1
1615*9122c523SPengcheng Wang; RV64I-NEXT:    sltu a1, a2, a1
1616*9122c523SPengcheng Wang; RV64I-NEXT:    add a3, a3, a0
1617*9122c523SPengcheng Wang; RV64I-NEXT:    sub a1, a3, a1
16187afdc6bdSSimon Pilgrim; RV64I-NEXT:    add a0, a2, a0
161904f65043SSimon Pilgrim; RV64I-NEXT:    ret
162004f65043SSimon Pilgrim;
162104f65043SSimon Pilgrim; RV32ZBB-LABEL: abd_cmp_i128:
162204f65043SSimon Pilgrim; RV32ZBB:       # %bb.0:
162314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a3, 0(a2)
162414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a5, 4(a2)
162514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a6, 8(a2)
162614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a7, 12(a2)
162714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a2, 8(a1)
162814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a4, 12(a1)
162914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw t0, 0(a1)
163004f65043SSimon Pilgrim; RV32ZBB-NEXT:    lw a1, 4(a1)
163114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a6
16327afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a4, a7
163314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t2, t0, a3
16347afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a7, t1
163514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    mv t1, t2
163614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a1, a5, .LBB22_2
163714c4f28eSAlex Bradbury; RV32ZBB-NEXT:  # %bb.1:
163814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a1, a5
163914c4f28eSAlex Bradbury; RV32ZBB-NEXT:  .LBB22_2:
164014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub t3, a2, a6
164114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a6, t3, t1
164214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a6, a7, a6
164314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a7, t3, t1
164414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a6, a4, .LBB22_4
164504f65043SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.3:
164614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a4, a6
16477afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    j .LBB22_5
164804f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB22_4:
164914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a7
16507afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:  .LBB22_5:
165114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a1, a5
165214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a5, t2
165314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a3, t0, a3
165414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a5, a1, .LBB22_7
16557afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:  # %bb.6:
165614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, a1, a5
16577afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    j .LBB22_8
16587afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:  .LBB22_7:
165914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, t0, a3
166004f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB22_8:
166114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a4, a6, a4
166214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, a2
166314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    or a2, a2, a4
166414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a2, .LBB22_10
166504f65043SSimon Pilgrim; RV32ZBB-NEXT:  # %bb.9:
16667afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    mv a1, t1
166704f65043SSimon Pilgrim; RV32ZBB-NEXT:  .LBB22_10:
166814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    neg t0, a1
166914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, t0
167014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a6, a6, t0
1671*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a4, a3, t0
1672*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a3, a2, t0
1673*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a7, a6, a1
1674*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a6, a4, t0
1675*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a7, a3
1676*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor t1, a5, t0
1677*9122c523SPengcheng Wang; RV32ZBB-NEXT:    mv a7, a6
167814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a5, .LBB22_12
16797afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:  # %bb.11:
1680*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a7, t1, t0
16817afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:  .LBB22_12:
168214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    add a2, a2, a1
1683*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add t1, t1, a1
1684*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a1, a4, a1
1685*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a4, a2, a7
1686*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a2, a2, a7
1687*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a5, t1, a6
1688*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a3, a4
16897afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    sw a1, 0(a0)
16907afdc6bdSSimon Pilgrim; RV32ZBB-NEXT:    sw a5, 4(a0)
169114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sw a2, 8(a0)
1692*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sw a3, 12(a0)
169304f65043SSimon Pilgrim; RV32ZBB-NEXT:    ret
169404f65043SSimon Pilgrim;
169504f65043SSimon Pilgrim; RV64ZBB-LABEL: abd_cmp_i128:
169604f65043SSimon Pilgrim; RV64ZBB:       # %bb.0:
169704f65043SSimon Pilgrim; RV64ZBB-NEXT:    sltu a4, a0, a2
16987afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a1, a3
16997afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a3, a4
17007afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    sub a2, a0, a2
17017afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    beq a3, a1, .LBB22_2
170204f65043SSimon Pilgrim; RV64ZBB-NEXT:  # %bb.1:
17037afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a1, a3
17047afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    j .LBB22_3
170504f65043SSimon Pilgrim; RV64ZBB-NEXT:  .LBB22_2:
17067afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a0, a2
17077afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:  .LBB22_3:
17087afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    neg a1, a0
17097afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    xor a2, a2, a1
1710*9122c523SPengcheng Wang; RV64ZBB-NEXT:    xor a3, a3, a1
1711*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sltu a1, a2, a1
1712*9122c523SPengcheng Wang; RV64ZBB-NEXT:    add a3, a3, a0
1713*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sub a1, a3, a1
17147afdc6bdSSimon Pilgrim; RV64ZBB-NEXT:    add a0, a2, a0
171504f65043SSimon Pilgrim; RV64ZBB-NEXT:    ret
171604f65043SSimon Pilgrim  %cmp = icmp uge i128 %a, %b
171704f65043SSimon Pilgrim  %ab = sub i128 %a, %b
171804f65043SSimon Pilgrim  %ba = sub i128 %b, %a
17197afdc6bdSSimon Pilgrim  %sel = select i1 %cmp, i128 %ab, i128 %ba
172004f65043SSimon Pilgrim  ret i128 %sel
172104f65043SSimon Pilgrim}
172204f65043SSimon Pilgrim
172343da8a7aSSimon Pilgrim;
172443da8a7aSSimon Pilgrim; sub(select(icmp(a,b),a,b),select(icmp(a,b),b,a)) -> abdu(a,b)
172543da8a7aSSimon Pilgrim;
172643da8a7aSSimon Pilgrim
172743da8a7aSSimon Pilgrimdefine i8 @abd_select_i8(i8 %a, i8 %b) nounwind {
1728854ded9bSc8ef; RV32I-LABEL: abd_select_i8:
1729854ded9bSc8ef; RV32I:       # %bb.0:
1730854ded9bSc8ef; RV32I-NEXT:    andi a1, a1, 255
1731854ded9bSc8ef; RV32I-NEXT:    andi a0, a0, 255
1732854ded9bSc8ef; RV32I-NEXT:    sub a0, a0, a1
1733854ded9bSc8ef; RV32I-NEXT:    srai a1, a0, 31
1734854ded9bSc8ef; RV32I-NEXT:    xor a0, a0, a1
1735854ded9bSc8ef; RV32I-NEXT:    sub a0, a0, a1
1736854ded9bSc8ef; RV32I-NEXT:    ret
1737854ded9bSc8ef;
1738854ded9bSc8ef; RV64I-LABEL: abd_select_i8:
1739854ded9bSc8ef; RV64I:       # %bb.0:
1740854ded9bSc8ef; RV64I-NEXT:    andi a1, a1, 255
1741854ded9bSc8ef; RV64I-NEXT:    andi a0, a0, 255
1742854ded9bSc8ef; RV64I-NEXT:    sub a0, a0, a1
1743854ded9bSc8ef; RV64I-NEXT:    srai a1, a0, 63
1744854ded9bSc8ef; RV64I-NEXT:    xor a0, a0, a1
1745854ded9bSc8ef; RV64I-NEXT:    sub a0, a0, a1
1746854ded9bSc8ef; RV64I-NEXT:    ret
174743da8a7aSSimon Pilgrim;
174843da8a7aSSimon Pilgrim; ZBB-LABEL: abd_select_i8:
174943da8a7aSSimon Pilgrim; ZBB:       # %bb.0:
175043da8a7aSSimon Pilgrim; ZBB-NEXT:    andi a1, a1, 255
175143da8a7aSSimon Pilgrim; ZBB-NEXT:    andi a0, a0, 255
175243da8a7aSSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
175343da8a7aSSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
175443da8a7aSSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
175543da8a7aSSimon Pilgrim; ZBB-NEXT:    ret
175643da8a7aSSimon Pilgrim  %cmp = icmp ult i8 %a, %b
175743da8a7aSSimon Pilgrim  %ab = select i1 %cmp, i8 %a, i8 %b
175843da8a7aSSimon Pilgrim  %ba = select i1 %cmp, i8 %b, i8 %a
175943da8a7aSSimon Pilgrim  %sub = sub i8 %ba, %ab
176043da8a7aSSimon Pilgrim  ret i8 %sub
176143da8a7aSSimon Pilgrim}
176243da8a7aSSimon Pilgrim
176343da8a7aSSimon Pilgrimdefine i16 @abd_select_i16(i16 %a, i16 %b) nounwind {
176443da8a7aSSimon Pilgrim; RV32I-LABEL: abd_select_i16:
176543da8a7aSSimon Pilgrim; RV32I:       # %bb.0:
176643da8a7aSSimon Pilgrim; RV32I-NEXT:    lui a2, 16
176743da8a7aSSimon Pilgrim; RV32I-NEXT:    addi a2, a2, -1
1768854ded9bSc8ef; RV32I-NEXT:    and a1, a1, a2
1769854ded9bSc8ef; RV32I-NEXT:    and a0, a0, a2
177043da8a7aSSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
1771854ded9bSc8ef; RV32I-NEXT:    srai a1, a0, 31
1772854ded9bSc8ef; RV32I-NEXT:    xor a0, a0, a1
1773854ded9bSc8ef; RV32I-NEXT:    sub a0, a0, a1
177443da8a7aSSimon Pilgrim; RV32I-NEXT:    ret
177543da8a7aSSimon Pilgrim;
177643da8a7aSSimon Pilgrim; RV64I-LABEL: abd_select_i16:
177743da8a7aSSimon Pilgrim; RV64I:       # %bb.0:
177843da8a7aSSimon Pilgrim; RV64I-NEXT:    lui a2, 16
177943da8a7aSSimon Pilgrim; RV64I-NEXT:    addiw a2, a2, -1
1780854ded9bSc8ef; RV64I-NEXT:    and a1, a1, a2
1781854ded9bSc8ef; RV64I-NEXT:    and a0, a0, a2
178243da8a7aSSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
1783854ded9bSc8ef; RV64I-NEXT:    srai a1, a0, 63
1784854ded9bSc8ef; RV64I-NEXT:    xor a0, a0, a1
1785854ded9bSc8ef; RV64I-NEXT:    sub a0, a0, a1
178643da8a7aSSimon Pilgrim; RV64I-NEXT:    ret
178743da8a7aSSimon Pilgrim;
178843da8a7aSSimon Pilgrim; ZBB-LABEL: abd_select_i16:
178943da8a7aSSimon Pilgrim; ZBB:       # %bb.0:
179043da8a7aSSimon Pilgrim; ZBB-NEXT:    zext.h a1, a1
179143da8a7aSSimon Pilgrim; ZBB-NEXT:    zext.h a0, a0
179243da8a7aSSimon Pilgrim; ZBB-NEXT:    minu a2, a0, a1
179343da8a7aSSimon Pilgrim; ZBB-NEXT:    maxu a0, a0, a1
179443da8a7aSSimon Pilgrim; ZBB-NEXT:    sub a0, a0, a2
179543da8a7aSSimon Pilgrim; ZBB-NEXT:    ret
179643da8a7aSSimon Pilgrim  %cmp = icmp ule i16 %a, %b
179743da8a7aSSimon Pilgrim  %ab = select i1 %cmp, i16 %a, i16 %b
179843da8a7aSSimon Pilgrim  %ba = select i1 %cmp, i16 %b, i16 %a
179943da8a7aSSimon Pilgrim  %sub = sub i16 %ba, %ab
180043da8a7aSSimon Pilgrim  ret i16 %sub
180143da8a7aSSimon Pilgrim}
180243da8a7aSSimon Pilgrim
180343da8a7aSSimon Pilgrimdefine i32 @abd_select_i32(i32 %a, i32 %b) nounwind {
180443da8a7aSSimon Pilgrim; RV32I-LABEL: abd_select_i32:
180543da8a7aSSimon Pilgrim; RV32I:       # %bb.0:
180643da8a7aSSimon Pilgrim; RV32I-NEXT:    bltu a1, a0, .LBB25_2
180743da8a7aSSimon Pilgrim; RV32I-NEXT:  # %bb.1:
180843da8a7aSSimon Pilgrim; RV32I-NEXT:    sub a0, a1, a0
180943da8a7aSSimon Pilgrim; RV32I-NEXT:    ret
181043da8a7aSSimon Pilgrim; RV32I-NEXT:  .LBB25_2:
181143da8a7aSSimon Pilgrim; RV32I-NEXT:    sub a0, a0, a1
181243da8a7aSSimon Pilgrim; RV32I-NEXT:    ret
181343da8a7aSSimon Pilgrim;
181443da8a7aSSimon Pilgrim; RV64I-LABEL: abd_select_i32:
181543da8a7aSSimon Pilgrim; RV64I:       # %bb.0:
1816854ded9bSc8ef; RV64I-NEXT:    slli a1, a1, 32
1817854ded9bSc8ef; RV64I-NEXT:    slli a0, a0, 32
1818*9122c523SPengcheng Wang; RV64I-NEXT:    srli a1, a1, 32
1819854ded9bSc8ef; RV64I-NEXT:    srli a0, a0, 32
1820854ded9bSc8ef; RV64I-NEXT:    sub a0, a0, a1
1821854ded9bSc8ef; RV64I-NEXT:    srai a1, a0, 63
1822854ded9bSc8ef; RV64I-NEXT:    xor a0, a0, a1
1823854ded9bSc8ef; RV64I-NEXT:    sub a0, a0, a1
182443da8a7aSSimon Pilgrim; RV64I-NEXT:    ret
182543da8a7aSSimon Pilgrim;
182643da8a7aSSimon Pilgrim; RV32ZBB-LABEL: abd_select_i32:
182743da8a7aSSimon Pilgrim; RV32ZBB:       # %bb.0:
182843da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    minu a2, a0, a1
182943da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    maxu a0, a0, a1
183043da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sub a0, a0, a2
183143da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    ret
183243da8a7aSSimon Pilgrim;
183343da8a7aSSimon Pilgrim; RV64ZBB-LABEL: abd_select_i32:
183443da8a7aSSimon Pilgrim; RV64ZBB:       # %bb.0:
183543da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    slli a1, a1, 32
183643da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    slli a0, a0, 32
1837*9122c523SPengcheng Wang; RV64ZBB-NEXT:    srli a1, a1, 32
183843da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    srli a0, a0, 32
183943da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
184043da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
184143da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
184243da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    ret
184343da8a7aSSimon Pilgrim  %cmp = icmp ugt i32 %a, %b
184443da8a7aSSimon Pilgrim  %ab = select i1 %cmp, i32 %a, i32 %b
184543da8a7aSSimon Pilgrim  %ba = select i1 %cmp, i32 %b, i32 %a
184643da8a7aSSimon Pilgrim  %sub = sub i32 %ab, %ba
184743da8a7aSSimon Pilgrim  ret i32 %sub
184843da8a7aSSimon Pilgrim}
184943da8a7aSSimon Pilgrim
185043da8a7aSSimon Pilgrimdefine i64 @abd_select_i64(i64 %a, i64 %b) nounwind {
185143da8a7aSSimon Pilgrim; RV32I-LABEL: abd_select_i64:
185243da8a7aSSimon Pilgrim; RV32I:       # %bb.0:
1853a3b0c31eSc8ef; RV32I-NEXT:    sltu a4, a0, a2
1854854ded9bSc8ef; RV32I-NEXT:    sub a3, a1, a3
1855854ded9bSc8ef; RV32I-NEXT:    sub a3, a3, a4
1856854ded9bSc8ef; RV32I-NEXT:    sub a2, a0, a2
1857854ded9bSc8ef; RV32I-NEXT:    beq a3, a1, .LBB26_2
1858854ded9bSc8ef; RV32I-NEXT:  # %bb.1:
1859854ded9bSc8ef; RV32I-NEXT:    sltu a0, a1, a3
1860854ded9bSc8ef; RV32I-NEXT:    j .LBB26_3
1861854ded9bSc8ef; RV32I-NEXT:  .LBB26_2:
1862854ded9bSc8ef; RV32I-NEXT:    sltu a0, a0, a2
1863854ded9bSc8ef; RV32I-NEXT:  .LBB26_3:
1864854ded9bSc8ef; RV32I-NEXT:    neg a1, a0
1865854ded9bSc8ef; RV32I-NEXT:    xor a2, a2, a1
1866*9122c523SPengcheng Wang; RV32I-NEXT:    xor a3, a3, a1
1867*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a1, a2, a1
1868*9122c523SPengcheng Wang; RV32I-NEXT:    add a3, a3, a0
1869*9122c523SPengcheng Wang; RV32I-NEXT:    sub a1, a3, a1
1870854ded9bSc8ef; RV32I-NEXT:    add a0, a2, a0
187143da8a7aSSimon Pilgrim; RV32I-NEXT:    ret
187243da8a7aSSimon Pilgrim;
187343da8a7aSSimon Pilgrim; RV64I-LABEL: abd_select_i64:
187443da8a7aSSimon Pilgrim; RV64I:       # %bb.0:
1875854ded9bSc8ef; RV64I-NEXT:    bltu a1, a0, .LBB26_2
187643da8a7aSSimon Pilgrim; RV64I-NEXT:  # %bb.1:
187743da8a7aSSimon Pilgrim; RV64I-NEXT:    sub a0, a1, a0
187843da8a7aSSimon Pilgrim; RV64I-NEXT:    ret
187943da8a7aSSimon Pilgrim; RV64I-NEXT:  .LBB26_2:
188043da8a7aSSimon Pilgrim; RV64I-NEXT:    sub a0, a0, a1
188143da8a7aSSimon Pilgrim; RV64I-NEXT:    ret
188243da8a7aSSimon Pilgrim;
188343da8a7aSSimon Pilgrim; RV32ZBB-LABEL: abd_select_i64:
188443da8a7aSSimon Pilgrim; RV32ZBB:       # %bb.0:
188543da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sltu a4, a0, a2
188643da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a1, a3
188743da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sub a3, a3, a4
188843da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sub a2, a0, a2
188943da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    beq a3, a1, .LBB26_2
189043da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  # %bb.1:
189143da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a1, a3
189243da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    j .LBB26_3
189343da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  .LBB26_2:
189443da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sltu a0, a0, a2
189543da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  .LBB26_3:
189643da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    neg a1, a0
189743da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    xor a2, a2, a1
1898*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a3, a3, a1
1899*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a1, a2, a1
1900*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a3, a3, a0
1901*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a1, a3, a1
190243da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    add a0, a2, a0
190343da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    ret
190443da8a7aSSimon Pilgrim;
190543da8a7aSSimon Pilgrim; RV64ZBB-LABEL: abd_select_i64:
190643da8a7aSSimon Pilgrim; RV64ZBB:       # %bb.0:
190743da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    minu a2, a0, a1
190843da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    maxu a0, a0, a1
190943da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    sub a0, a0, a2
191043da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    ret
191143da8a7aSSimon Pilgrim  %cmp = icmp uge i64 %a, %b
191243da8a7aSSimon Pilgrim  %ab = select i1 %cmp, i64 %a, i64 %b
191343da8a7aSSimon Pilgrim  %ba = select i1 %cmp, i64 %b, i64 %a
191443da8a7aSSimon Pilgrim  %sub = sub i64 %ab, %ba
191543da8a7aSSimon Pilgrim  ret i64 %sub
191643da8a7aSSimon Pilgrim}
191743da8a7aSSimon Pilgrim
191843da8a7aSSimon Pilgrimdefine i128 @abd_select_i128(i128 %a, i128 %b) nounwind {
191943da8a7aSSimon Pilgrim; RV32I-LABEL: abd_select_i128:
192043da8a7aSSimon Pilgrim; RV32I:       # %bb.0:
1921854ded9bSc8ef; RV32I-NEXT:    lw a3, 0(a2)
1922854ded9bSc8ef; RV32I-NEXT:    lw a5, 4(a2)
192343da8a7aSSimon Pilgrim; RV32I-NEXT:    lw a6, 8(a2)
1924854ded9bSc8ef; RV32I-NEXT:    lw a7, 12(a2)
1925854ded9bSc8ef; RV32I-NEXT:    lw a2, 8(a1)
1926854ded9bSc8ef; RV32I-NEXT:    lw a4, 12(a1)
1927854ded9bSc8ef; RV32I-NEXT:    lw t0, 0(a1)
1928854ded9bSc8ef; RV32I-NEXT:    lw a1, 4(a1)
1929854ded9bSc8ef; RV32I-NEXT:    sltu t1, a2, a6
1930854ded9bSc8ef; RV32I-NEXT:    sub a7, a4, a7
1931854ded9bSc8ef; RV32I-NEXT:    sltu t2, t0, a3
1932854ded9bSc8ef; RV32I-NEXT:    sub a7, a7, t1
1933854ded9bSc8ef; RV32I-NEXT:    mv t1, t2
1934854ded9bSc8ef; RV32I-NEXT:    beq a1, a5, .LBB27_2
193543da8a7aSSimon Pilgrim; RV32I-NEXT:  # %bb.1:
1936854ded9bSc8ef; RV32I-NEXT:    sltu t1, a1, a5
193743da8a7aSSimon Pilgrim; RV32I-NEXT:  .LBB27_2:
1938854ded9bSc8ef; RV32I-NEXT:    sub t3, a2, a6
1939854ded9bSc8ef; RV32I-NEXT:    sltu a6, t3, t1
1940a3b0c31eSc8ef; RV32I-NEXT:    sub a6, a7, a6
1941854ded9bSc8ef; RV32I-NEXT:    sub a7, t3, t1
1942854ded9bSc8ef; RV32I-NEXT:    beq a6, a4, .LBB27_4
1943854ded9bSc8ef; RV32I-NEXT:  # %bb.3:
1944854ded9bSc8ef; RV32I-NEXT:    sltu t1, a4, a6
1945854ded9bSc8ef; RV32I-NEXT:    j .LBB27_5
1946854ded9bSc8ef; RV32I-NEXT:  .LBB27_4:
1947854ded9bSc8ef; RV32I-NEXT:    sltu t1, a2, a7
1948854ded9bSc8ef; RV32I-NEXT:  .LBB27_5:
1949854ded9bSc8ef; RV32I-NEXT:    sub a5, a1, a5
1950854ded9bSc8ef; RV32I-NEXT:    sub a5, a5, t2
1951854ded9bSc8ef; RV32I-NEXT:    sub a3, t0, a3
1952854ded9bSc8ef; RV32I-NEXT:    beq a5, a1, .LBB27_7
1953854ded9bSc8ef; RV32I-NEXT:  # %bb.6:
1954854ded9bSc8ef; RV32I-NEXT:    sltu a1, a1, a5
1955854ded9bSc8ef; RV32I-NEXT:    j .LBB27_8
1956854ded9bSc8ef; RV32I-NEXT:  .LBB27_7:
1957854ded9bSc8ef; RV32I-NEXT:    sltu a1, t0, a3
1958854ded9bSc8ef; RV32I-NEXT:  .LBB27_8:
1959854ded9bSc8ef; RV32I-NEXT:    xor a4, a6, a4
1960854ded9bSc8ef; RV32I-NEXT:    xor a2, a7, a2
1961854ded9bSc8ef; RV32I-NEXT:    or a2, a2, a4
1962854ded9bSc8ef; RV32I-NEXT:    beqz a2, .LBB27_10
1963854ded9bSc8ef; RV32I-NEXT:  # %bb.9:
1964854ded9bSc8ef; RV32I-NEXT:    mv a1, t1
1965854ded9bSc8ef; RV32I-NEXT:  .LBB27_10:
1966854ded9bSc8ef; RV32I-NEXT:    neg t0, a1
1967854ded9bSc8ef; RV32I-NEXT:    xor a2, a7, t0
1968854ded9bSc8ef; RV32I-NEXT:    xor a6, a6, t0
1969*9122c523SPengcheng Wang; RV32I-NEXT:    xor a4, a3, t0
1970*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a3, a2, t0
1971*9122c523SPengcheng Wang; RV32I-NEXT:    add a7, a6, a1
1972*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a6, a4, t0
1973*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a7, a3
1974*9122c523SPengcheng Wang; RV32I-NEXT:    xor t1, a5, t0
1975*9122c523SPengcheng Wang; RV32I-NEXT:    mv a7, a6
1976854ded9bSc8ef; RV32I-NEXT:    beqz a5, .LBB27_12
1977854ded9bSc8ef; RV32I-NEXT:  # %bb.11:
1978*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a7, t1, t0
1979854ded9bSc8ef; RV32I-NEXT:  .LBB27_12:
1980854ded9bSc8ef; RV32I-NEXT:    add a2, a2, a1
1981*9122c523SPengcheng Wang; RV32I-NEXT:    add t1, t1, a1
1982*9122c523SPengcheng Wang; RV32I-NEXT:    add a1, a4, a1
1983*9122c523SPengcheng Wang; RV32I-NEXT:    sltu a4, a2, a7
1984*9122c523SPengcheng Wang; RV32I-NEXT:    sub a2, a2, a7
1985*9122c523SPengcheng Wang; RV32I-NEXT:    sub a5, t1, a6
1986*9122c523SPengcheng Wang; RV32I-NEXT:    sub a3, a3, a4
198743da8a7aSSimon Pilgrim; RV32I-NEXT:    sw a1, 0(a0)
1988854ded9bSc8ef; RV32I-NEXT:    sw a5, 4(a0)
1989854ded9bSc8ef; RV32I-NEXT:    sw a2, 8(a0)
1990*9122c523SPengcheng Wang; RV32I-NEXT:    sw a3, 12(a0)
199143da8a7aSSimon Pilgrim; RV32I-NEXT:    ret
199243da8a7aSSimon Pilgrim;
199343da8a7aSSimon Pilgrim; RV64I-LABEL: abd_select_i128:
199443da8a7aSSimon Pilgrim; RV64I:       # %bb.0:
1995a3b0c31eSc8ef; RV64I-NEXT:    sltu a4, a0, a2
1996854ded9bSc8ef; RV64I-NEXT:    sub a3, a1, a3
1997854ded9bSc8ef; RV64I-NEXT:    sub a3, a3, a4
1998854ded9bSc8ef; RV64I-NEXT:    sub a2, a0, a2
1999854ded9bSc8ef; RV64I-NEXT:    beq a3, a1, .LBB27_2
2000854ded9bSc8ef; RV64I-NEXT:  # %bb.1:
2001854ded9bSc8ef; RV64I-NEXT:    sltu a0, a1, a3
2002854ded9bSc8ef; RV64I-NEXT:    j .LBB27_3
2003854ded9bSc8ef; RV64I-NEXT:  .LBB27_2:
2004854ded9bSc8ef; RV64I-NEXT:    sltu a0, a0, a2
2005854ded9bSc8ef; RV64I-NEXT:  .LBB27_3:
2006854ded9bSc8ef; RV64I-NEXT:    neg a1, a0
2007854ded9bSc8ef; RV64I-NEXT:    xor a2, a2, a1
2008*9122c523SPengcheng Wang; RV64I-NEXT:    xor a3, a3, a1
2009*9122c523SPengcheng Wang; RV64I-NEXT:    sltu a1, a2, a1
2010*9122c523SPengcheng Wang; RV64I-NEXT:    add a3, a3, a0
2011*9122c523SPengcheng Wang; RV64I-NEXT:    sub a1, a3, a1
2012854ded9bSc8ef; RV64I-NEXT:    add a0, a2, a0
201343da8a7aSSimon Pilgrim; RV64I-NEXT:    ret
201443da8a7aSSimon Pilgrim;
201543da8a7aSSimon Pilgrim; RV32ZBB-LABEL: abd_select_i128:
201643da8a7aSSimon Pilgrim; RV32ZBB:       # %bb.0:
201714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a3, 0(a2)
201814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a5, 4(a2)
201914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a6, 8(a2)
202014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a7, 12(a2)
202114c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a2, 8(a1)
202214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw a4, 12(a1)
202314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    lw t0, 0(a1)
202443da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    lw a1, 4(a1)
202514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a6
202643da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a4, a7
202714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t2, t0, a3
202843da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sub a7, a7, t1
202914c4f28eSAlex Bradbury; RV32ZBB-NEXT:    mv t1, t2
203014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a1, a5, .LBB27_2
203114c4f28eSAlex Bradbury; RV32ZBB-NEXT:  # %bb.1:
203214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a1, a5
203314c4f28eSAlex Bradbury; RV32ZBB-NEXT:  .LBB27_2:
203414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub t3, a2, a6
203514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a6, t3, t1
203614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a6, a7, a6
203714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a7, t3, t1
203814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a6, a4, .LBB27_4
203943da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  # %bb.3:
204014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a4, a6
204143da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    j .LBB27_5
204243da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  .LBB27_4:
204314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu t1, a2, a7
204443da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  .LBB27_5:
204514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a1, a5
204614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a5, a5, t2
204714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sub a3, t0, a3
204814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beq a5, a1, .LBB27_7
204943da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  # %bb.6:
205014c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, a1, a5
205143da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    j .LBB27_8
205243da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  .LBB27_7:
205314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sltu a1, t0, a3
205443da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  .LBB27_8:
205514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a4, a6, a4
205614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, a2
205714c4f28eSAlex Bradbury; RV32ZBB-NEXT:    or a2, a2, a4
205814c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a2, .LBB27_10
205943da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  # %bb.9:
206043da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    mv a1, t1
206143da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  .LBB27_10:
206214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    neg t0, a1
206314c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a2, a7, t0
206414c4f28eSAlex Bradbury; RV32ZBB-NEXT:    xor a6, a6, t0
2065*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor a4, a3, t0
2066*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a3, a2, t0
2067*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a7, a6, a1
2068*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a6, a4, t0
2069*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a7, a3
2070*9122c523SPengcheng Wang; RV32ZBB-NEXT:    xor t1, a5, t0
2071*9122c523SPengcheng Wang; RV32ZBB-NEXT:    mv a7, a6
207214c4f28eSAlex Bradbury; RV32ZBB-NEXT:    beqz a5, .LBB27_12
207343da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  # %bb.11:
2074*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a7, t1, t0
207543da8a7aSSimon Pilgrim; RV32ZBB-NEXT:  .LBB27_12:
207614c4f28eSAlex Bradbury; RV32ZBB-NEXT:    add a2, a2, a1
2077*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add t1, t1, a1
2078*9122c523SPengcheng Wang; RV32ZBB-NEXT:    add a1, a4, a1
2079*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sltu a4, a2, a7
2080*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a2, a2, a7
2081*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a5, t1, a6
2082*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sub a3, a3, a4
208343da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sw a1, 0(a0)
208443da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    sw a5, 4(a0)
208514c4f28eSAlex Bradbury; RV32ZBB-NEXT:    sw a2, 8(a0)
2086*9122c523SPengcheng Wang; RV32ZBB-NEXT:    sw a3, 12(a0)
208743da8a7aSSimon Pilgrim; RV32ZBB-NEXT:    ret
208843da8a7aSSimon Pilgrim;
208943da8a7aSSimon Pilgrim; RV64ZBB-LABEL: abd_select_i128:
209043da8a7aSSimon Pilgrim; RV64ZBB:       # %bb.0:
209143da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    sltu a4, a0, a2
209243da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a1, a3
209343da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    sub a3, a3, a4
209443da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    sub a2, a0, a2
209543da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    beq a3, a1, .LBB27_2
209643da8a7aSSimon Pilgrim; RV64ZBB-NEXT:  # %bb.1:
209743da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a1, a3
209843da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    j .LBB27_3
209943da8a7aSSimon Pilgrim; RV64ZBB-NEXT:  .LBB27_2:
210043da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    sltu a0, a0, a2
210143da8a7aSSimon Pilgrim; RV64ZBB-NEXT:  .LBB27_3:
210243da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    neg a1, a0
210343da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    xor a2, a2, a1
2104*9122c523SPengcheng Wang; RV64ZBB-NEXT:    xor a3, a3, a1
2105*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sltu a1, a2, a1
2106*9122c523SPengcheng Wang; RV64ZBB-NEXT:    add a3, a3, a0
2107*9122c523SPengcheng Wang; RV64ZBB-NEXT:    sub a1, a3, a1
210843da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    add a0, a2, a0
210943da8a7aSSimon Pilgrim; RV64ZBB-NEXT:    ret
211043da8a7aSSimon Pilgrim  %cmp = icmp ult i128 %a, %b
211143da8a7aSSimon Pilgrim  %ab = select i1 %cmp, i128 %a, i128 %b
211243da8a7aSSimon Pilgrim  %ba = select i1 %cmp, i128 %b, i128 %a
211343da8a7aSSimon Pilgrim  %sub = sub i128 %ba, %ab
211443da8a7aSSimon Pilgrim  ret i128 %sub
211543da8a7aSSimon Pilgrim}
211643da8a7aSSimon Pilgrim
211704f65043SSimon Pilgrimdeclare i8 @llvm.abs.i8(i8, i1)
211804f65043SSimon Pilgrimdeclare i16 @llvm.abs.i16(i16, i1)
211904f65043SSimon Pilgrimdeclare i32 @llvm.abs.i32(i32, i1)
212004f65043SSimon Pilgrimdeclare i64 @llvm.abs.i64(i64, i1)
212104f65043SSimon Pilgrimdeclare i128 @llvm.abs.i128(i128, i1)
212204f65043SSimon Pilgrim
212304f65043SSimon Pilgrimdeclare i8 @llvm.umax.i8(i8, i8)
212404f65043SSimon Pilgrimdeclare i16 @llvm.umax.i16(i16, i16)
212504f65043SSimon Pilgrimdeclare i32 @llvm.umax.i32(i32, i32)
212604f65043SSimon Pilgrimdeclare i64 @llvm.umax.i64(i64, i64)
212704f65043SSimon Pilgrim
212804f65043SSimon Pilgrimdeclare i8 @llvm.umin.i8(i8, i8)
212904f65043SSimon Pilgrimdeclare i16 @llvm.umin.i16(i16, i16)
213004f65043SSimon Pilgrimdeclare i32 @llvm.umin.i32(i32, i32)
213104f65043SSimon Pilgrimdeclare i64 @llvm.umin.i64(i64, i64)
213213d04fa5SSimon Pilgrim;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
21338109e5deSSimon Pilgrim; CHECK: {{.*}}
2134854ded9bSc8ef; NOZBB: {{.*}}
2135