xref: /llvm-project/llvm/test/CodeGen/RISCV/O3-pipeline.ll (revision 3630d9ef65b30af7e4ca78e668649bbc48b5be66)
17cd78da8SCraig Topper; RUN: llc -mtriple=riscv32 -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | \
27cd78da8SCraig Topper; RUN:   grep -v "Verify generated machine code" | \
37cd78da8SCraig Topper; RUN:   FileCheck %s --check-prefixes=CHECK
47cd78da8SCraig Topper; RUN: llc -mtriple=riscv64 -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | \
57cd78da8SCraig Topper; RUN:   grep -v "Verify generated machine code" | \
67cd78da8SCraig Topper; RUN:   FileCheck %s --check-prefixes=CHECK,RV64
77cd78da8SCraig Topper
87cd78da8SCraig Topper; REQUIRES: asserts
97cd78da8SCraig Topper
107cd78da8SCraig Topper; CHECK-LABEL: Pass Arguments:
117cd78da8SCraig Topper; CHECK-NEXT: Target Library Information
127cd78da8SCraig Topper; CHECK-NEXT: Target Pass Configuration
137cd78da8SCraig Topper; CHECK-NEXT: Machine Module Information
147cd78da8SCraig Topper; CHECK-NEXT: Target Transform Information
157cd78da8SCraig Topper; CHECK-NEXT: Assumption Cache Tracker
167cd78da8SCraig Topper; CHECK-NEXT: Profile summary info
179bb69c1dSWang Pengcheng; CHECK-NEXT: Type-Based Alias Analysis
189bb69c1dSWang Pengcheng; CHECK-NEXT: Scoped NoAlias Alias Analysis
197cd78da8SCraig Topper; CHECK-NEXT: Create Garbage Collector Module Metadata
207cd78da8SCraig Topper; CHECK-NEXT: Machine Branch Probability Analysis
217cd78da8SCraig Topper; CHECK-NEXT: Default Regalloc Eviction Advisor
22d8a2d3f7SEric Wang; CHECK-NEXT: Default Regalloc Priority Advisor
237cd78da8SCraig Topper; CHECK-NEXT:   ModulePass Manager
247cd78da8SCraig Topper; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
257cd78da8SCraig Topper; CHECK-NEXT:     FunctionPass Manager
26af3758d6SMatthias Gehre; CHECK-NEXT:       Expand large div/rem
2789f36dd8SFreddy Ye; CHECK-NEXT:       Expand large fp convert
287cd78da8SCraig Topper; CHECK-NEXT:       Expand Atomic instructions
290ee10e94SAlex Bradbury; CHECK-NEXT:       RISC-V Zacas ABI fix
307cd78da8SCraig Topper; CHECK-NEXT:       Dominator Tree Construction
317cd78da8SCraig Topper; CHECK-NEXT:       Natural Loop Information
329bb69c1dSWang Pengcheng; CHECK-NEXT:       Canonicalize natural loops
339bb69c1dSWang Pengcheng; CHECK-NEXT:       Lazy Branch Probability Analysis
349bb69c1dSWang Pengcheng; CHECK-NEXT:       Lazy Block Frequency Analysis
359bb69c1dSWang Pengcheng; CHECK-NEXT:       Optimization Remark Emitter
369bb69c1dSWang Pengcheng; CHECK-NEXT:       Scalar Evolution Analysis
379bb69c1dSWang Pengcheng; CHECK-NEXT:       Loop Data Prefetch
380f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V gather/scatter lowering
39ec26c9cdSLuke Lau; CHECK-NEXT:       Interleaved Access Pass
400f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V CodeGenPrepare
417cd78da8SCraig Topper; CHECK-NEXT:       Module Verifier
427cd78da8SCraig Topper; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
437cd78da8SCraig Topper; CHECK-NEXT:       Canonicalize natural loops
447cd78da8SCraig Topper; CHECK-NEXT:       Scalar Evolution Analysis
457cd78da8SCraig Topper; CHECK-NEXT:       Loop Pass Manager
467cd78da8SCraig Topper; CHECK-NEXT:         Canonicalize Freeze Instructions in Loops
477cd78da8SCraig Topper; CHECK-NEXT:         Induction Variable Users
487cd78da8SCraig Topper; CHECK-NEXT:         Loop Strength Reduction
4927a62ec7SPhilip Reames; CHECK-NEXT:         Loop Terminator Folding
507cd78da8SCraig Topper; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
517cd78da8SCraig Topper; CHECK-NEXT:       Function Alias Analysis Results
527cd78da8SCraig Topper; CHECK-NEXT:       Merge contiguous icmps into a memcmp
537cd78da8SCraig Topper; CHECK-NEXT:       Natural Loop Information
547cd78da8SCraig Topper; CHECK-NEXT:       Lazy Branch Probability Analysis
557cd78da8SCraig Topper; CHECK-NEXT:       Lazy Block Frequency Analysis
567cd78da8SCraig Topper; CHECK-NEXT:       Expand memcmp() to load/stores
577cd78da8SCraig Topper; CHECK-NEXT:       Lower Garbage Collection Instructions
587cd78da8SCraig Topper; CHECK-NEXT:       Shadow Stack GC Lowering
597cd78da8SCraig Topper; CHECK-NEXT:       Remove unreachable blocks from the CFG
607cd78da8SCraig Topper; CHECK-NEXT:       Natural Loop Information
617cd78da8SCraig Topper; CHECK-NEXT:       Post-Dominator Tree Construction
627cd78da8SCraig Topper; CHECK-NEXT:       Branch Probability Analysis
637cd78da8SCraig Topper; CHECK-NEXT:       Block Frequency Analysis
647cd78da8SCraig Topper; CHECK-NEXT:       Constant Hoisting
657cd78da8SCraig Topper; CHECK-NEXT:       Replace intrinsics with calls to vector library
66*3630d9efSTiborGY; CHECK-NEXT:       Lazy Branch Probability Analysis
67*3630d9efSTiborGY; CHECK-NEXT:       Lazy Block Frequency Analysis
68*3630d9efSTiborGY; CHECK-NEXT:       Optimization Remark Emitter
697cd78da8SCraig Topper; CHECK-NEXT:       Partially inline calls to library functions
70cab81dd0SEgor Pasko; CHECK-NEXT:       Instrument function entry/exit with calls to e.g. mcount() (post inlining)
717cd78da8SCraig Topper; CHECK-NEXT:       Scalarize Masked Memory Intrinsics
727cd78da8SCraig Topper; CHECK-NEXT:       Expand reduction intrinsics
737cd78da8SCraig Topper; CHECK-NEXT:       Natural Loop Information
747d40ea85SCraig Topper; CHECK-NEXT:       Type Promotion
757cd78da8SCraig Topper; CHECK-NEXT:       CodeGen Prepare
767cd78da8SCraig Topper; CHECK-NEXT:       Dominator Tree Construction
777cd78da8SCraig Topper; CHECK-NEXT:       Exception handling preparation
784ff5e818Swangpc; CHECK-NEXT:     A No-Op Barrier Pass
794ff5e818Swangpc; CHECK-NEXT:     FunctionPass Manager
809d02264bSAlex Bradbury; CHECK-NEXT:       Merge internal globals
8174e4694bSPeter Rong; CHECK-NEXT:       Dominator Tree Construction
8274e4694bSPeter Rong; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
8374e4694bSPeter Rong; CHECK-NEXT:       Function Alias Analysis Results
8474e4694bSPeter Rong; CHECK-NEXT:       ObjC ARC contraction
85a3a84c9eSNick Desaulniers; CHECK-NEXT:       Prepare callbr
867cd78da8SCraig Topper; CHECK-NEXT:       Safe Stack instrumentation pass
877cd78da8SCraig Topper; CHECK-NEXT:       Insert stack protectors
887cd78da8SCraig Topper; CHECK-NEXT:       Module Verifier
897cd78da8SCraig Topper; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
907cd78da8SCraig Topper; CHECK-NEXT:       Function Alias Analysis Results
917cd78da8SCraig Topper; CHECK-NEXT:       Natural Loop Information
927cd78da8SCraig Topper; CHECK-NEXT:       Post-Dominator Tree Construction
937cd78da8SCraig Topper; CHECK-NEXT:       Branch Probability Analysis
9499c12afeSOCHyams; CHECK-NEXT:       Assignment Tracking Analysis
957cd78da8SCraig Topper; CHECK-NEXT:       Lazy Branch Probability Analysis
967cd78da8SCraig Topper; CHECK-NEXT:       Lazy Block Frequency Analysis
970f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V DAG->DAG Pattern Instruction Selection
987cd78da8SCraig Topper; CHECK-NEXT:       Finalize ISel and expand pseudo-instructions
996f65a397SLuke Lau; CHECK-NEXT:       RISC-V Vector Peephole Optimization
1007cd78da8SCraig Topper; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
1017cd78da8SCraig Topper; CHECK-NEXT:       Early Tail Duplication
1027cd78da8SCraig Topper; CHECK-NEXT:       Optimize machine instruction PHIs
1037cd78da8SCraig Topper; CHECK-NEXT:       Slot index numbering
1047cd78da8SCraig Topper; CHECK-NEXT:       Merge disjoint stack slots
1057cd78da8SCraig Topper; CHECK-NEXT:       Local Stack Slot Allocation
1067cd78da8SCraig Topper; CHECK-NEXT:       Remove dead machine instructions
1077cd78da8SCraig Topper; CHECK-NEXT:       MachineDominator Tree Construction
1087cd78da8SCraig Topper; CHECK-NEXT:       Machine Natural Loop Construction
1097cd78da8SCraig Topper; CHECK-NEXT:       Machine Block Frequency Analysis
1107cd78da8SCraig Topper; CHECK-NEXT:       Early Machine Loop Invariant Code Motion
1117cd78da8SCraig Topper; CHECK-NEXT:       MachineDominator Tree Construction
1127cd78da8SCraig Topper; CHECK-NEXT:       Machine Block Frequency Analysis
1137cd78da8SCraig Topper; CHECK-NEXT:       Machine Common Subexpression Elimination
1147cd78da8SCraig Topper; CHECK-NEXT:       MachinePostDominator Tree Construction
115d7927523SChen Zheng; CHECK-NEXT:       Machine Cycle Info Analysis
1167cd78da8SCraig Topper; CHECK-NEXT:       Machine code sinking
1177cd78da8SCraig Topper; CHECK-NEXT:       Peephole Optimizations
1187cd78da8SCraig Topper; CHECK-NEXT:       Remove dead machine instructions
1191978b4d9SAnton Sidorenko; CHECK-NEXT:       Machine Trace Metrics
1201978b4d9SAnton Sidorenko; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
1211978b4d9SAnton Sidorenko; CHECK-NEXT:       Machine InstCombiner
1224c10a612SCraig Topper; RV64-NEXT:        RISC-V Optimize W Instructions
1230f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V Pre-RA pseudo instruction expansion pass
1240f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V Merge Base Offset
125169c32ebSMichael Maitland; CHECK-NEXT:       MachineDominator Tree Construction
126169c32ebSMichael Maitland; CHECK-NEXT:       RISC-V VL Optimizer
1277c836512SeopXD; CHECK-NEXT:       RISC-V Insert Read/Write CSR Pass
128014390d9SCraig Topper; CHECK-NEXT:       RISC-V Insert Write VXRM Pass
129e80d8e1bSYeting Kuo; CHECK-NEXT:       RISC-V Landing Pad Setup
1307cd78da8SCraig Topper; CHECK-NEXT:       Detect Dead Lanes
13128233408SJack Styles; CHECK-NEXT:       Init Undef Pass
1327cd78da8SCraig Topper; CHECK-NEXT:       Process Implicit Definitions
1337cd78da8SCraig Topper; CHECK-NEXT:       Remove unreachable machine basic blocks
1347cd78da8SCraig Topper; CHECK-NEXT:       Live Variable Analysis
1357cd78da8SCraig Topper; CHECK-NEXT:       Eliminate PHI nodes for register allocation
1367cd78da8SCraig Topper; CHECK-NEXT:       Two-Address instruction pass
1377cd78da8SCraig Topper; CHECK-NEXT:       Slot index numbering
1387cd78da8SCraig Topper; CHECK-NEXT:       Live Interval Analysis
13980e2c26dSMatt Arsenault; CHECK-NEXT:       Register Coalescer
1407cd78da8SCraig Topper; CHECK-NEXT:       Rename Disconnected Subregister Components
1417cd78da8SCraig Topper; CHECK-NEXT:       Machine Instruction Scheduler
1427cd78da8SCraig Topper; CHECK-NEXT:       Machine Block Frequency Analysis
1437cd78da8SCraig Topper; CHECK-NEXT:       Debug Variable Analysis
1447cd78da8SCraig Topper; CHECK-NEXT:       Live Stack Slot Analysis
1457cd78da8SCraig Topper; CHECK-NEXT:       Virtual Register Map
1467cd78da8SCraig Topper; CHECK-NEXT:       Live Register Matrix
1477cd78da8SCraig Topper; CHECK-NEXT:       Bundle Machine CFG Edges
1487cd78da8SCraig Topper; CHECK-NEXT:       Spill Code Placement Analysis
1497cd78da8SCraig Topper; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
1507cd78da8SCraig Topper; CHECK-NEXT:       Machine Optimization Remark Emitter
1517cd78da8SCraig Topper; CHECK-NEXT:       Greedy Register Allocator
1527cd78da8SCraig Topper; CHECK-NEXT:       Virtual Register Rewriter
153675e7bd1SPiyou Chen; CHECK-NEXT:       RISC-V Insert VSETVLI pass
15452187b9fSLuke Lau; CHECK-NEXT:       RISC-V Dead register definitions
155d0a39e61SPiyou Chen; CHECK-NEXT:       Virtual Register Map
156d0a39e61SPiyou Chen; CHECK-NEXT:       Live Register Matrix
157d0a39e61SPiyou Chen; CHECK-NEXT:       Greedy Register Allocator
158d0a39e61SPiyou Chen; CHECK-NEXT:       Virtual Register Rewriter
1597cd78da8SCraig Topper; CHECK-NEXT:       Register Allocation Pass Scoring
1607cd78da8SCraig Topper; CHECK-NEXT:       Stack Slot Coloring
1617cd78da8SCraig Topper; CHECK-NEXT:       Machine Copy Propagation Pass
1627cd78da8SCraig Topper; CHECK-NEXT:       Machine Loop Invariant Code Motion
1630f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V Redundant Copy Elimination
1647cd78da8SCraig Topper; CHECK-NEXT:       Remove Redundant DEBUG_VALUE analysis
1657cd78da8SCraig Topper; CHECK-NEXT:       Fixup Statepoint Caller Saved
1667cd78da8SCraig Topper; CHECK-NEXT:       PostRA Machine Sink
1677cd78da8SCraig Topper; CHECK-NEXT:       MachineDominator Tree Construction
1687cd78da8SCraig Topper; CHECK-NEXT:       Machine Natural Loop Construction
1697cd78da8SCraig Topper; CHECK-NEXT:       Machine Block Frequency Analysis
1707cd78da8SCraig Topper; CHECK-NEXT:       MachinePostDominator Tree Construction
1717cd78da8SCraig Topper; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
1727cd78da8SCraig Topper; CHECK-NEXT:       Machine Optimization Remark Emitter
1737cd78da8SCraig Topper; CHECK-NEXT:       Shrink Wrapping analysis
1747cd78da8SCraig Topper; CHECK-NEXT:       Prologue/Epilogue Insertion & Frame Finalization
175f8c68122SCraig Topper; CHECK-NEXT:       Machine Late Instructions Cleanup Pass
1767cd78da8SCraig Topper; CHECK-NEXT:       Control Flow Optimizer
1777cd78da8SCraig Topper; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
1787cd78da8SCraig Topper; CHECK-NEXT:       Tail Duplication
1797cd78da8SCraig Topper; CHECK-NEXT:       Machine Copy Propagation Pass
1807cd78da8SCraig Topper; CHECK-NEXT:       Post-RA pseudo instruction expansion pass
181109aa586SCraig Topper; CHECK-NEXT:       RISC-V post-regalloc pseudo instruction expansion pass
18283835e22SSami Tolvanen; CHECK-NEXT:       Insert KCFI indirect call checks
1837cd78da8SCraig Topper; CHECK-NEXT:       MachineDominator Tree Construction
1847cd78da8SCraig Topper; CHECK-NEXT:       Machine Natural Loop Construction
185f4231bf4SWang Pengcheng; CHECK-NEXT:       PostRA Machine Instruction Scheduler
1867cd78da8SCraig Topper; CHECK-NEXT:       Analyze Machine Code For Garbage Collection
1877cd78da8SCraig Topper; CHECK-NEXT:       Machine Block Frequency Analysis
1887cd78da8SCraig Topper; CHECK-NEXT:       MachinePostDominator Tree Construction
1897cd78da8SCraig Topper; CHECK-NEXT:       Branch Probability Basic Block Placement
1907cd78da8SCraig Topper; CHECK-NEXT:       Insert fentry calls
1917cd78da8SCraig Topper; CHECK-NEXT:       Insert XRay ops
1927cd78da8SCraig Topper; CHECK-NEXT:       Implement the 'patchable-function' attribute
193a833fa7dSYunzezhu94; CHECK-NEXT:       Machine Copy Propagation Pass
1947cd78da8SCraig Topper; CHECK-NEXT:       Branch relaxation pass
1950f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V Make Compressible
1967cd78da8SCraig Topper; CHECK-NEXT:       Contiguously Lay Out Funclets
1973d08ade7SStephen Tozer; CHECK-NEXT:       Remove Loads Into Fake Uses
1987cd78da8SCraig Topper; CHECK-NEXT:       StackMap Liveness Analysis
1997cd78da8SCraig Topper; CHECK-NEXT:       Live DEBUG_VALUE analysis
200dbe8c2c3SDmitry Vyukov; CHECK-NEXT:       Machine Sanitizer Binary Metadata
2014ff5e818Swangpc; CHECK-NEXT:     Machine Outliner
2024ff5e818Swangpc; CHECK-NEXT:     FunctionPass Manager
20397982a8cSdlav-sc; CHECK-NEXT:       Insert CFI remember/restore state instructions
204557a5bc3SPaul Kirth; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
205557a5bc3SPaul Kirth; CHECK-NEXT:       Machine Optimization Remark Emitter
206557a5bc3SPaul Kirth; CHECK-NEXT:       Stack Frame Layout Analysis
207c9e08fa6SWuXinlong; CHECK-NEXT:       RISC-V Zcmp move merging pass
208c0221e00SWuXinlong; CHECK-NEXT:       RISC-V Zcmp Push/Pop optimization pass
2099fb196b4SYeting Kuo; CHECK-NEXT:       RISC-V Indirect Branch Tracking
2100f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V pseudo instruction expansion pass
2110f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V atomic pseudo instruction expansion pass
21283835e22SSami Tolvanen; CHECK-NEXT:       Unpack machine instruction bundles
2137cd78da8SCraig Topper; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
2147cd78da8SCraig Topper; CHECK-NEXT:       Machine Optimization Remark Emitter
2150f4c9c01SCraig Topper; CHECK-NEXT:       RISC-V Assembly Printer
2167cd78da8SCraig Topper; CHECK-NEXT:       Free MachineFunction
217