xref: /llvm-project/llvm/test/CodeGen/PowerPC/lrint-conv.ll (revision 6d7bf5e8df5455fa32cc437f7043bbb0a0607d49)
1*6d7bf5e8SAdhemerval Zanella; RUN: llc < %s -mtriple=powerpc64le | FileCheck %s
2*6d7bf5e8SAdhemerval Zanella
3*6d7bf5e8SAdhemerval Zanella; CHECK-LABEL: testmsws:
4*6d7bf5e8SAdhemerval Zanella; CHECK:       bl      lrintf
5*6d7bf5e8SAdhemerval Zanelladefine signext i32 @testmsws(float %x) {
6*6d7bf5e8SAdhemerval Zanellaentry:
7*6d7bf5e8SAdhemerval Zanella  %0 = tail call i64 @llvm.lrint.i64.f32(float %x)
8*6d7bf5e8SAdhemerval Zanella  %conv = trunc i64 %0 to i32
9*6d7bf5e8SAdhemerval Zanella  ret i32 %conv
10*6d7bf5e8SAdhemerval Zanella}
11*6d7bf5e8SAdhemerval Zanella
12*6d7bf5e8SAdhemerval Zanella; CHECK-LABEL: testmsxs:
13*6d7bf5e8SAdhemerval Zanella; CHECK:       bl      lrintf
14*6d7bf5e8SAdhemerval Zanelladefine i64 @testmsxs(float %x) {
15*6d7bf5e8SAdhemerval Zanellaentry:
16*6d7bf5e8SAdhemerval Zanella  %0 = tail call i64 @llvm.lrint.i64.f32(float %x)
17*6d7bf5e8SAdhemerval Zanella  ret i64 %0
18*6d7bf5e8SAdhemerval Zanella}
19*6d7bf5e8SAdhemerval Zanella
20*6d7bf5e8SAdhemerval Zanella; CHECK-LABEL: testmswd:
21*6d7bf5e8SAdhemerval Zanella; CHECK:       bl      lrint
22*6d7bf5e8SAdhemerval Zanelladefine signext i32 @testmswd(double %x) {
23*6d7bf5e8SAdhemerval Zanellaentry:
24*6d7bf5e8SAdhemerval Zanella  %0 = tail call i64 @llvm.lrint.i64.f64(double %x)
25*6d7bf5e8SAdhemerval Zanella  %conv = trunc i64 %0 to i32
26*6d7bf5e8SAdhemerval Zanella  ret i32 %conv
27*6d7bf5e8SAdhemerval Zanella}
28*6d7bf5e8SAdhemerval Zanella
29*6d7bf5e8SAdhemerval Zanella; CHECK-LABEL: testmsxd:
30*6d7bf5e8SAdhemerval Zanella; CHECK:       bl      lrint
31*6d7bf5e8SAdhemerval Zanelladefine i64 @testmsxd(double %x) {
32*6d7bf5e8SAdhemerval Zanellaentry:
33*6d7bf5e8SAdhemerval Zanella  %0 = tail call i64 @llvm.lrint.i64.f64(double %x)
34*6d7bf5e8SAdhemerval Zanella  ret i64 %0
35*6d7bf5e8SAdhemerval Zanella}
36*6d7bf5e8SAdhemerval Zanella
37*6d7bf5e8SAdhemerval Zanella; CHECK-LABEL: testmswl:
38*6d7bf5e8SAdhemerval Zanella; CHECK:       bl      lrintl
39*6d7bf5e8SAdhemerval Zanelladefine signext i32 @testmswl(ppc_fp128 %x) {
40*6d7bf5e8SAdhemerval Zanellaentry:
41*6d7bf5e8SAdhemerval Zanella  %0 = tail call i64 @llvm.lrint.i64.ppcf128(ppc_fp128 %x)
42*6d7bf5e8SAdhemerval Zanella  %conv = trunc i64 %0 to i32
43*6d7bf5e8SAdhemerval Zanella  ret i32 %conv
44*6d7bf5e8SAdhemerval Zanella}
45*6d7bf5e8SAdhemerval Zanella
46*6d7bf5e8SAdhemerval Zanella; CHECK-LABEL: testmsll:
47*6d7bf5e8SAdhemerval Zanella; CHECK:       bl      lrintl
48*6d7bf5e8SAdhemerval Zanelladefine i64 @testmsll(ppc_fp128 %x) {
49*6d7bf5e8SAdhemerval Zanellaentry:
50*6d7bf5e8SAdhemerval Zanella  %0 = tail call i64 @llvm.lrint.i64.ppcf128(ppc_fp128 %x)
51*6d7bf5e8SAdhemerval Zanella  ret i64 %0
52*6d7bf5e8SAdhemerval Zanella}
53*6d7bf5e8SAdhemerval Zanella
54*6d7bf5e8SAdhemerval Zanelladeclare i64 @llvm.lrint.i64.f32(float) nounwind readnone
55*6d7bf5e8SAdhemerval Zanelladeclare i64 @llvm.lrint.i64.f64(double) nounwind readnone
56*6d7bf5e8SAdhemerval Zanelladeclare i64 @llvm.lrint.i64.ppcf128(ppc_fp128) nounwind readnone
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