1*b279f6b0SFangrui Song; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_30 | FileCheck %s --check-prefixes=ALL,SM30 2*b279f6b0SFangrui Song; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_60 | FileCheck %s --check-prefixes=ALL,SM60 3*b279f6b0SFangrui Song; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_30 | %ptxas-verify %} 4*b279f6b0SFangrui Song; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_60 | %ptxas-verify -arch=sm_60 %} 5ecf5b780SShilei Tian 6ecf5b780SShilei Tian; CHECK-LABEL: fadd_double 7ecf5b780SShilei Tiandefine void @fadd_double(ptr %0, double %1) { 8ecf5b780SShilei Tianentry: 9ecf5b780SShilei Tian ; SM30: atom.cas.b64 10ecf5b780SShilei Tian ; SM60: atom.add.f64 11ecf5b780SShilei Tian %2 = atomicrmw fadd ptr %0, double %1 monotonic, align 8 12ecf5b780SShilei Tian ret void 13ecf5b780SShilei Tian} 14ecf5b780SShilei Tian 15ecf5b780SShilei Tian; CHECK-LABEL: fadd_float 16ecf5b780SShilei Tiandefine void @fadd_float(ptr %0, float %1) { 17ecf5b780SShilei Tianentry: 18ecf5b780SShilei Tian ; ALL: atom.add.f32 19ecf5b780SShilei Tian %2 = atomicrmw fadd ptr %0, float %1 monotonic, align 4 20ecf5b780SShilei Tian ret void 21ecf5b780SShilei Tian} 22ecf5b780SShilei Tian 23ecf5b780SShilei Tian; CHECK-LABEL: bitwise_i32 24ecf5b780SShilei Tiandefine void @bitwise_i32(ptr %0, i32 %1) { 25ecf5b780SShilei Tianentry: 26ecf5b780SShilei Tian ; ALL: atom.and.b32 27ecf5b780SShilei Tian %2 = atomicrmw and ptr %0, i32 %1 monotonic, align 4 28ecf5b780SShilei Tian ; ALL: atom.or.b32 29ecf5b780SShilei Tian %3 = atomicrmw or ptr %0, i32 %1 monotonic, align 4 30ecf5b780SShilei Tian ; ALL: atom.xor.b32 31ecf5b780SShilei Tian %4 = atomicrmw xor ptr %0, i32 %1 monotonic, align 4 32ecf5b780SShilei Tian ; ALL: atom.exch.b32 33ecf5b780SShilei Tian %5 = atomicrmw xchg ptr %0, i32 %1 monotonic, align 4 34ecf5b780SShilei Tian ret void 35ecf5b780SShilei Tian} 36ecf5b780SShilei Tian 37ecf5b780SShilei Tian; CHECK-LABEL: bitwise_i64 38ecf5b780SShilei Tiandefine void @bitwise_i64(ptr %0, i64 %1) { 39ecf5b780SShilei Tianentry: 40ecf5b780SShilei Tian ; SM30: atom.cas.b64 41ecf5b780SShilei Tian ; SM60: atom.and.b64 42ecf5b780SShilei Tian %2 = atomicrmw and ptr %0, i64 %1 monotonic, align 8 43ecf5b780SShilei Tian ; SM30: atom.cas.b64 44ecf5b780SShilei Tian ; SM60: atom.or.b64 45ecf5b780SShilei Tian %3 = atomicrmw or ptr %0, i64 %1 monotonic, align 8 46ecf5b780SShilei Tian ; SM30: atom.cas.b64 47ecf5b780SShilei Tian ; SM60: atom.xor.b64 48ecf5b780SShilei Tian %4 = atomicrmw xor ptr %0, i64 %1 monotonic, align 8 49ecf5b780SShilei Tian ; SM30: atom.cas.b64 50ecf5b780SShilei Tian ; SM60: atom.exch.b64 51ecf5b780SShilei Tian %5 = atomicrmw xchg ptr %0, i64 %1 monotonic, align 8 52ecf5b780SShilei Tian ret void 53ecf5b780SShilei Tian} 54ecf5b780SShilei Tian 55ecf5b780SShilei Tian; CHECK-LABEL: minmax_i32 56ecf5b780SShilei Tiandefine void @minmax_i32(ptr %0, i32 %1) { 57ecf5b780SShilei Tianentry: 58ecf5b780SShilei Tian ; ALL: atom.min.s32 59ecf5b780SShilei Tian %2 = atomicrmw min ptr %0, i32 %1 monotonic, align 4 60ecf5b780SShilei Tian ; ALL: atom.max.s32 61ecf5b780SShilei Tian %3 = atomicrmw max ptr %0, i32 %1 monotonic, align 4 62ecf5b780SShilei Tian ; ALL: atom.min.u32 63ecf5b780SShilei Tian %4 = atomicrmw umin ptr %0, i32 %1 monotonic, align 4 64ecf5b780SShilei Tian ; ALL: atom.max.u32 65ecf5b780SShilei Tian %5 = atomicrmw umax ptr %0, i32 %1 monotonic, align 4 66ecf5b780SShilei Tian ret void 67ecf5b780SShilei Tian} 68ecf5b780SShilei Tian 69ecf5b780SShilei Tian; CHECK-LABEL: minmax_i64 70ecf5b780SShilei Tiandefine void @minmax_i64(ptr %0, i64 %1) { 71ecf5b780SShilei Tianentry: 72ecf5b780SShilei Tian ; SM30: atom.cas.b64 73ecf5b780SShilei Tian ; SM60: atom.min.s64 74ecf5b780SShilei Tian %2 = atomicrmw min ptr %0, i64 %1 monotonic, align 8 75ecf5b780SShilei Tian ; SM30: atom.cas.b64 76ecf5b780SShilei Tian ; SM60: atom.max.s64 77ecf5b780SShilei Tian %3 = atomicrmw max ptr %0, i64 %1 monotonic, align 8 78ecf5b780SShilei Tian ; SM30: atom.cas.b64 79ecf5b780SShilei Tian ; SM60: atom.min.u64 80ecf5b780SShilei Tian %4 = atomicrmw umin ptr %0, i64 %1 monotonic, align 8 81ecf5b780SShilei Tian ; SM30: atom.cas.b64 82ecf5b780SShilei Tian ; SM60: atom.max.u64 83ecf5b780SShilei Tian %5 = atomicrmw umax ptr %0, i64 %1 monotonic, align 8 84ecf5b780SShilei Tian ret void 85ecf5b780SShilei Tian} 86ecf5b780SShilei Tian 87ecf5b780SShilei Tian; CHECK-LABEL: bitwise_i8 88ecf5b780SShilei Tiandefine void @bitwise_i8(ptr %0, i8 %1) { 89ecf5b780SShilei Tianentry: 90ecf5b780SShilei Tian ; ALL: atom.and.b32 91ecf5b780SShilei Tian %2 = atomicrmw and ptr %0, i8 %1 monotonic, align 1 92ecf5b780SShilei Tian ; ALL: atom.or.b32 93ecf5b780SShilei Tian %3 = atomicrmw or ptr %0, i8 %1 monotonic, align 1 94ecf5b780SShilei Tian ; ALL: atom.xor.b32 95ecf5b780SShilei Tian %4 = atomicrmw xor ptr %0, i8 %1 monotonic, align 1 96ecf5b780SShilei Tian ; ALL: atom.cas.b32 97ecf5b780SShilei Tian %5 = atomicrmw xchg ptr %0, i8 %1 monotonic, align 1 98ecf5b780SShilei Tian ret void 99ecf5b780SShilei Tian} 100ecf5b780SShilei Tian 101ecf5b780SShilei Tian; CHECK-LABEL: minmax_i8 102ecf5b780SShilei Tiandefine void @minmax_i8(ptr %0, i8 %1) { 103ecf5b780SShilei Tianentry: 104ecf5b780SShilei Tian ; ALL: atom.cas.b32 105ecf5b780SShilei Tian %2 = atomicrmw min ptr %0, i8 %1 monotonic, align 1 106ecf5b780SShilei Tian ; ALL: atom.cas.b32 107ecf5b780SShilei Tian %3 = atomicrmw max ptr %0, i8 %1 monotonic, align 1 108ecf5b780SShilei Tian ; ALL: atom.cas.b32 109ecf5b780SShilei Tian %4 = atomicrmw umin ptr %0, i8 %1 monotonic, align 1 110ecf5b780SShilei Tian ; ALL: atom.cas.b32 111ecf5b780SShilei Tian %5 = atomicrmw umax ptr %0, i8 %1 monotonic, align 1 112ecf5b780SShilei Tian ret void 113ecf5b780SShilei Tian} 114ecf5b780SShilei Tian 115ecf5b780SShilei Tian; CHECK-LABEL: bitwise_i16 116ecf5b780SShilei Tiandefine void @bitwise_i16(ptr %0, i16 %1) { 117ecf5b780SShilei Tianentry: 118ecf5b780SShilei Tian ; ALL: atom.and.b32 119ecf5b780SShilei Tian %2 = atomicrmw and ptr %0, i16 %1 monotonic, align 2 120ecf5b780SShilei Tian ; ALL: atom.or.b32 121ecf5b780SShilei Tian %3 = atomicrmw or ptr %0, i16 %1 monotonic, align 2 122ecf5b780SShilei Tian ; ALL: atom.xor.b32 123ecf5b780SShilei Tian %4 = atomicrmw xor ptr %0, i16 %1 monotonic, align 2 124ecf5b780SShilei Tian ; ALL: atom.cas.b32 125ecf5b780SShilei Tian %5 = atomicrmw xchg ptr %0, i16 %1 monotonic, align 2 126ecf5b780SShilei Tian ret void 127ecf5b780SShilei Tian} 128ecf5b780SShilei Tian 129ecf5b780SShilei Tian; CHECK-LABEL: minmax_i16 130ecf5b780SShilei Tiandefine void @minmax_i16(ptr %0, i16 %1) { 131ecf5b780SShilei Tianentry: 132ecf5b780SShilei Tian ; ALL: atom.cas.b32 133ecf5b780SShilei Tian %2 = atomicrmw min ptr %0, i16 %1 monotonic, align 2 134ecf5b780SShilei Tian ; ALL: atom.cas.b32 135ecf5b780SShilei Tian %3 = atomicrmw max ptr %0, i16 %1 monotonic, align 2 136ecf5b780SShilei Tian ; ALL: atom.cas.b32 137ecf5b780SShilei Tian %4 = atomicrmw umin ptr %0, i16 %1 monotonic, align 2 138ecf5b780SShilei Tian ; ALL: atom.cas.b32 139ecf5b780SShilei Tian %5 = atomicrmw umax ptr %0, i16 %1 monotonic, align 2 140ecf5b780SShilei Tian ret void 141ecf5b780SShilei Tian} 142ecf5b780SShilei Tian 143b856e77bSJames Y Knight; CHECK-LABEL: bitwise_i128 144b856e77bSJames Y Knightdefine void @bitwise_i128(ptr %0, i128 %1) { 145b856e77bSJames Y Knightentry: 146b856e77bSJames Y Knight ; ALL: __atomic_fetch_and_16 147b856e77bSJames Y Knight %2 = atomicrmw and ptr %0, i128 %1 monotonic, align 16 148b856e77bSJames Y Knight ; ALL: __atomic_fetch_or_16 149b856e77bSJames Y Knight %3 = atomicrmw or ptr %0, i128 %1 monotonic, align 16 150b856e77bSJames Y Knight ; ALL: __atomic_fetch_xor_16 151b856e77bSJames Y Knight %4 = atomicrmw xor ptr %0, i128 %1 monotonic, align 16 152b856e77bSJames Y Knight ; ALL: __atomic_exchange_16 153b856e77bSJames Y Knight %5 = atomicrmw xchg ptr %0, i128 %1 monotonic, align 16 154b856e77bSJames Y Knight ret void 155b856e77bSJames Y Knight} 156ecf5b780SShilei Tian 157b856e77bSJames Y Knight; CHECK-LABEL: minmax_i128 158b856e77bSJames Y Knightdefine void @minmax_i128(ptr %0, i128 %1) { 159b856e77bSJames Y Knightentry: 160b856e77bSJames Y Knight ; ALL: __atomic_compare_exchange_16 161b856e77bSJames Y Knight %2 = atomicrmw min ptr %0, i128 %1 monotonic, align 16 162b856e77bSJames Y Knight ; ALL: __atomic_compare_exchange_16 163b856e77bSJames Y Knight %3 = atomicrmw max ptr %0, i128 %1 monotonic, align 16 164b856e77bSJames Y Knight ; ALL: __atomic_compare_exchange_16 165b856e77bSJames Y Knight %4 = atomicrmw umin ptr %0, i128 %1 monotonic, align 16 166b856e77bSJames Y Knight ; ALL: __atomic_compare_exchange_16 167b856e77bSJames Y Knight %5 = atomicrmw umax ptr %0, i128 %1 monotonic, align 16 168b856e77bSJames Y Knight ret void 169b856e77bSJames Y Knight} 170