xref: /llvm-project/llvm/test/CodeGen/NVPTX/addrspacecast-cse.ll (revision 3606876b67bbd42d6ee0e04548611834467af806)
1*3606876bSAlex MacLean; RUN: llc < %s -O0 -debug-only=isel -o /dev/null 2>&1 | FileCheck %s
2*3606876bSAlex MacLean
3*3606876bSAlex MacLean; REQUIRES: asserts
4*3606876bSAlex MacLean
5*3606876bSAlex MacLeantarget triple = "nvptx64-nvidia-cuda"
6*3606876bSAlex MacLean
7*3606876bSAlex MacLean;; Selection DAG CSE is hard to test since we run CSE/GVN on the IR before and
8*3606876bSAlex MacLean;; after selection DAG ISel so most cases will be handled by one of these.
9*3606876bSAlex MacLeandefine void @foo(ptr %p) {
10*3606876bSAlex MacLean; CHECK-LABEL: Initial selection DAG
11*3606876bSAlex MacLean;
12*3606876bSAlex MacLean; CHECK:  [[ASC:t[0-9]+]]{{.*}} = addrspacecast
13*3606876bSAlex MacLean; CHECK:                          store{{.*}} [[ASC]]
14*3606876bSAlex MacLean; CHECK:                          store{{.*}} [[ASC]]
15*3606876bSAlex MacLean;
16*3606876bSAlex MacLean; CHECK-LABEL: Optimized lowered selection
17*3606876bSAlex MacLean;
18*3606876bSAlex MacLean   %a1 = addrspacecast ptr %p to ptr addrspace(5)
19*3606876bSAlex MacLean   %a2 = addrspacecast ptr %p to ptr addrspace(5)
20*3606876bSAlex MacLean   store i32 0, ptr addrspace(5) %a1
21*3606876bSAlex MacLean   store i32 0, ptr addrspace(5) %a2
22*3606876bSAlex MacLean   ret void
23*3606876bSAlex MacLean}
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