xref: /llvm-project/llvm/test/CodeGen/M68k/pipeline.ll (revision 590e5e20b12f9fd956d0ba7de83aa2ab44c9faeb)
1dbfa4a0aSSheng; RUN: llc -mtriple=m68k -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s
2dbfa4a0aSSheng; CHECK:  ModulePass Manager
3dbfa4a0aSSheng; CHECK-NEXT:    Pre-ISel Intrinsic Lowering
4dbfa4a0aSSheng; CHECK-NEXT:    FunctionPass Manager
5dbfa4a0aSSheng; CHECK-NEXT:      Expand large div/rem
689f36dd8SFreddy Ye; CHECK-NEXT:      Expand large fp convert
7e086b24dSSheng; CHECK-NEXT:      Expand Atomic instructions
8dbfa4a0aSSheng; CHECK-NEXT:      Module Verifier
9dbfa4a0aSSheng; CHECK-NEXT:      Dominator Tree Construction
10dbfa4a0aSSheng; CHECK-NEXT:      Basic Alias Analysis (stateless AA impl)
11dbfa4a0aSSheng; CHECK-NEXT:      Natural Loop Information
12dbfa4a0aSSheng; CHECK-NEXT:      Canonicalize natural loops
13dbfa4a0aSSheng; CHECK-NEXT:      Scalar Evolution Analysis
14dbfa4a0aSSheng; CHECK-NEXT:      Loop Pass Manager
15dbfa4a0aSSheng; CHECK-NEXT:        Canonicalize Freeze Instructions in Loops
16dbfa4a0aSSheng; CHECK-NEXT:        Induction Variable Users
17dbfa4a0aSSheng; CHECK-NEXT:        Loop Strength Reduction
18dbfa4a0aSSheng; CHECK-NEXT:      Basic Alias Analysis (stateless AA impl)
19dbfa4a0aSSheng; CHECK-NEXT:      Function Alias Analysis Results
20dbfa4a0aSSheng; CHECK-NEXT:      Merge contiguous icmps into a memcmp
21dbfa4a0aSSheng; CHECK-NEXT:      Natural Loop Information
22dbfa4a0aSSheng; CHECK-NEXT:      Lazy Branch Probability Analysis
23dbfa4a0aSSheng; CHECK-NEXT:      Lazy Block Frequency Analysis
24dbfa4a0aSSheng; CHECK-NEXT:      Expand memcmp() to load/stores
25dbfa4a0aSSheng; CHECK-NEXT:      Lower Garbage Collection Instructions
26dbfa4a0aSSheng; CHECK-NEXT:      Shadow Stack GC Lowering
27dbfa4a0aSSheng; CHECK-NEXT:      Remove unreachable blocks from the CFG
28dbfa4a0aSSheng; CHECK-NEXT:      Natural Loop Information
29dbfa4a0aSSheng; CHECK-NEXT:      Post-Dominator Tree Construction
30dbfa4a0aSSheng; CHECK-NEXT:      Branch Probability Analysis
31dbfa4a0aSSheng; CHECK-NEXT:      Block Frequency Analysis
32dbfa4a0aSSheng; CHECK-NEXT:      Constant Hoisting
33dbfa4a0aSSheng; CHECK-NEXT:      Replace intrinsics with calls to vector library
34*590e5e20SMichael Liao; CHECK-NEXT:      Lazy Branch Probability Analysis
35*590e5e20SMichael Liao; CHECK-NEXT:      Lazy Block Frequency Analysis
36*590e5e20SMichael Liao; CHECK-NEXT:      Optimization Remark Emitter
37dbfa4a0aSSheng; CHECK-NEXT:      Partially inline calls to library functions
38f5bab967SMichael Liao; CHECK-NEXT:      Instrument function entry/exit with calls to e.g. mcount() (post inlining)
39dbfa4a0aSSheng; CHECK-NEXT:      Scalarize Masked Memory Intrinsics
40dbfa4a0aSSheng; CHECK-NEXT:      Expand reduction intrinsics
41dbfa4a0aSSheng; CHECK-NEXT:      Natural Loop Information
42dbfa4a0aSSheng; CHECK-NEXT:      CodeGen Prepare
43dbfa4a0aSSheng; CHECK-NEXT:      Dominator Tree Construction
44dbfa4a0aSSheng; CHECK-NEXT:      Exception handling preparation
4574e4694bSPeter Rong; CHECK-NEXT:      Basic Alias Analysis (stateless AA impl)
4674e4694bSPeter Rong; CHECK-NEXT:      Function Alias Analysis Results
4774e4694bSPeter Rong; CHECK-NEXT:      ObjC ARC contraction
48cf86855cSNick Desaulniers; CHECK-NEXT:      Prepare callbr
49dbfa4a0aSSheng; CHECK-NEXT:      Safe Stack instrumentation pass
50dbfa4a0aSSheng; CHECK-NEXT:      Insert stack protectors
51dbfa4a0aSSheng; CHECK-NEXT:      Module Verifier
52dbfa4a0aSSheng; CHECK-NEXT:      Basic Alias Analysis (stateless AA impl)
53dbfa4a0aSSheng; CHECK-NEXT:      Function Alias Analysis Results
54dbfa4a0aSSheng; CHECK-NEXT:      Natural Loop Information
55dbfa4a0aSSheng; CHECK-NEXT:      Post-Dominator Tree Construction
56dbfa4a0aSSheng; CHECK-NEXT:      Branch Probability Analysis
5797a1c98fSSimon Pilgrim; CHECK-NEXT:      Assignment Tracking Analysis
58dbfa4a0aSSheng; CHECK-NEXT:      Lazy Branch Probability Analysis
59dbfa4a0aSSheng; CHECK-NEXT:      Lazy Block Frequency Analysis
60dbfa4a0aSSheng; CHECK-NEXT:      M68k DAG->DAG Pattern Instruction Selection
61dbfa4a0aSSheng; CHECK-NEXT:      M68k PIC Global Base Reg Initialization
62dbfa4a0aSSheng; CHECK-NEXT:      Finalize ISel and expand pseudo-instructions
63dbfa4a0aSSheng; CHECK-NEXT:      Lazy Machine Block Frequency Analysis
64dbfa4a0aSSheng; CHECK-NEXT:      Early Tail Duplication
65dbfa4a0aSSheng; CHECK-NEXT:      Optimize machine instruction PHIs
66dbfa4a0aSSheng; CHECK-NEXT:      Slot index numbering
67dbfa4a0aSSheng; CHECK-NEXT:      Merge disjoint stack slots
68dbfa4a0aSSheng; CHECK-NEXT:      Local Stack Slot Allocation
69dbfa4a0aSSheng; CHECK-NEXT:      Remove dead machine instructions
70dbfa4a0aSSheng; CHECK-NEXT:      MachineDominator Tree Construction
71dbfa4a0aSSheng; CHECK-NEXT:      Machine Natural Loop Construction
72dbfa4a0aSSheng; CHECK-NEXT:      Machine Block Frequency Analysis
73dbfa4a0aSSheng; CHECK-NEXT:      Early Machine Loop Invariant Code Motion
74dbfa4a0aSSheng; CHECK-NEXT:      MachineDominator Tree Construction
75dbfa4a0aSSheng; CHECK-NEXT:      Machine Block Frequency Analysis
76dbfa4a0aSSheng; CHECK-NEXT:      Machine Common Subexpression Elimination
77dbfa4a0aSSheng; CHECK-NEXT:      MachinePostDominator Tree Construction
78dbfa4a0aSSheng; CHECK-NEXT:      Machine Cycle Info Analysis
79dbfa4a0aSSheng; CHECK-NEXT:      Machine code sinking
80dbfa4a0aSSheng; CHECK-NEXT:      Peephole Optimizations
81dbfa4a0aSSheng; CHECK-NEXT:      Remove dead machine instructions
82dbfa4a0aSSheng; CHECK-NEXT:      Detect Dead Lanes
83a490bbf5SMichael Liao; CHECK-NEXT:      Init Undef Pass
84dbfa4a0aSSheng; CHECK-NEXT:      Process Implicit Definitions
85dbfa4a0aSSheng; CHECK-NEXT:      Remove unreachable machine basic blocks
86dbfa4a0aSSheng; CHECK-NEXT:      Live Variable Analysis
87dbfa4a0aSSheng; CHECK-NEXT:      Eliminate PHI nodes for register allocation
88dbfa4a0aSSheng; CHECK-NEXT:      Two-Address instruction pass
89dbfa4a0aSSheng; CHECK-NEXT:      MachineDominator Tree Construction
90dbfa4a0aSSheng; CHECK-NEXT:      Slot index numbering
91dbfa4a0aSSheng; CHECK-NEXT:      Live Interval Analysis
9280e2c26dSMatt Arsenault; CHECK-NEXT:      Register Coalescer
93dbfa4a0aSSheng; CHECK-NEXT:      Rename Disconnected Subregister Components
94dbfa4a0aSSheng; CHECK-NEXT:      Machine Instruction Scheduler
95dbfa4a0aSSheng; CHECK-NEXT:      Machine Block Frequency Analysis
96dbfa4a0aSSheng; CHECK-NEXT:      Debug Variable Analysis
97dbfa4a0aSSheng; CHECK-NEXT:      Live Stack Slot Analysis
98dbfa4a0aSSheng; CHECK-NEXT:      Virtual Register Map
99dbfa4a0aSSheng; CHECK-NEXT:      Live Register Matrix
100dbfa4a0aSSheng; CHECK-NEXT:      Bundle Machine CFG Edges
101dbfa4a0aSSheng; CHECK-NEXT:      Spill Code Placement Analysis
102dbfa4a0aSSheng; CHECK-NEXT:      Lazy Machine Block Frequency Analysis
103dbfa4a0aSSheng; CHECK-NEXT:      Machine Optimization Remark Emitter
104dbfa4a0aSSheng; CHECK-NEXT:      Greedy Register Allocator
105dbfa4a0aSSheng; CHECK-NEXT:      Virtual Register Rewriter
106dbfa4a0aSSheng; CHECK-NEXT:      Register Allocation Pass Scoring
107dbfa4a0aSSheng; CHECK-NEXT:      Stack Slot Coloring
108dbfa4a0aSSheng; CHECK-NEXT:      Machine Copy Propagation Pass
109dbfa4a0aSSheng; CHECK-NEXT:      Machine Loop Invariant Code Motion
110dbfa4a0aSSheng; CHECK-NEXT:      Remove Redundant DEBUG_VALUE analysis
111dbfa4a0aSSheng; CHECK-NEXT:      Fixup Statepoint Caller Saved
112dbfa4a0aSSheng; CHECK-NEXT:      PostRA Machine Sink
113dbfa4a0aSSheng; CHECK-NEXT:      Machine Block Frequency Analysis
114dbfa4a0aSSheng; CHECK-NEXT:      MachineDominator Tree Construction
115dbfa4a0aSSheng; CHECK-NEXT:      MachinePostDominator Tree Construction
116dbfa4a0aSSheng; CHECK-NEXT:      Lazy Machine Block Frequency Analysis
117dbfa4a0aSSheng; CHECK-NEXT:      Machine Optimization Remark Emitter
118dbfa4a0aSSheng; CHECK-NEXT:      Shrink Wrapping analysis
119dbfa4a0aSSheng; CHECK-NEXT:      Prologue/Epilogue Insertion & Frame Finalization
1205ecd3632SJonas Paulsson; CHECK-NEXT:      Machine Late Instructions Cleanup Pass
121dbfa4a0aSSheng; CHECK-NEXT:      Control Flow Optimizer
122dbfa4a0aSSheng; CHECK-NEXT:      Lazy Machine Block Frequency Analysis
123dbfa4a0aSSheng; CHECK-NEXT:      Tail Duplication
124dbfa4a0aSSheng; CHECK-NEXT:      Machine Copy Propagation Pass
125dbfa4a0aSSheng; CHECK-NEXT:      Post-RA pseudo instruction expansion pass
126dbfa4a0aSSheng; CHECK-NEXT:      M68k pseudo instruction expansion pass
127dbfa4a0aSSheng; CHECK-NEXT:      MachineDominator Tree Construction
128dbfa4a0aSSheng; CHECK-NEXT:      Machine Natural Loop Construction
129dbfa4a0aSSheng; CHECK-NEXT:      Post RA top-down list latency scheduler
130dbfa4a0aSSheng; CHECK-NEXT:      Analyze Machine Code For Garbage Collection
131dbfa4a0aSSheng; CHECK-NEXT:      Machine Block Frequency Analysis
132dbfa4a0aSSheng; CHECK-NEXT:      MachinePostDominator Tree Construction
133dbfa4a0aSSheng; CHECK-NEXT:      Branch Probability Basic Block Placement
134dbfa4a0aSSheng; CHECK-NEXT:      Insert fentry calls
135dbfa4a0aSSheng; CHECK-NEXT:      Insert XRay ops
136dbfa4a0aSSheng; CHECK-NEXT:      Implement the 'patchable-function' attribute
137dbfa4a0aSSheng; CHECK-NEXT:      M68k MOVEM collapser pass
138dbfa4a0aSSheng; CHECK-NEXT:      Contiguously Lay Out Funclets
1398e4b8155SMichael Liao; CHECK-NEXT:      Remove Loads Into Fake Uses
140dbfa4a0aSSheng; CHECK-NEXT:      StackMap Liveness Analysis
141dbfa4a0aSSheng; CHECK-NEXT:      Live DEBUG_VALUE analysis
142dbe8c2c3SDmitry Vyukov; CHECK-NEXT:      Machine Sanitizer Binary Metadata
143dbfa4a0aSSheng; CHECK-NEXT:      Lazy Machine Block Frequency Analysis
144dbfa4a0aSSheng; CHECK-NEXT:      Machine Optimization Remark Emitter
145557a5bc3SPaul Kirth; CHECK-NEXT:      Stack Frame Layout Analysis
146dbfa4a0aSSheng; CHECK-NEXT:      M68k Assembly Printer
147dbfa4a0aSSheng; CHECK-NEXT:      Free MachineFunction
148