1*0408b131SAyke van Laethem; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2*0408b131SAyke van Laethem; RUN: llc < %s -mtriple=avr -mcpu=atmega328p | FileCheck %s 3*0408b131SAyke van Laethem 4*0408b131SAyke van Laethemdefine i32 @testmsws_builtin(float %x) { 5*0408b131SAyke van Laethem; CHECK-LABEL: testmsws_builtin: 6*0408b131SAyke van Laethem; CHECK: ; %bb.0: ; %entry 7*0408b131SAyke van Laethem; CHECK-NEXT: call lrintf 8*0408b131SAyke van Laethem; CHECK-NEXT: ret 9*0408b131SAyke van Laethementry: 10*0408b131SAyke van Laethem %0 = tail call i32 @llvm.lrint.i32.f32(float %x) 11*0408b131SAyke van Laethem ret i32 %0 12*0408b131SAyke van Laethem} 13*0408b131SAyke van Laethem 14*0408b131SAyke van Laethemdefine i32 @testmswd_builtin(double %x) { 15*0408b131SAyke van Laethem; CHECK-LABEL: testmswd_builtin: 16*0408b131SAyke van Laethem; CHECK: ; %bb.0: ; %entry 17*0408b131SAyke van Laethem; CHECK-NEXT: call lrint 18*0408b131SAyke van Laethem; CHECK-NEXT: ret 19*0408b131SAyke van Laethementry: 20*0408b131SAyke van Laethem %0 = tail call i32 @llvm.lrint.i32.f64(double %x) 21*0408b131SAyke van Laethem ret i32 %0 22*0408b131SAyke van Laethem} 23*0408b131SAyke van Laethem 24*0408b131SAyke van Laethemdeclare i32 @llvm.lrint.i32.f32(float) nounwind readnone 25*0408b131SAyke van Laethemdeclare i32 @llvm.lrint.i32.f64(double) nounwind readnone 26