xref: /llvm-project/llvm/test/CodeGen/ARM/print-memb-operand.ll (revision ee97475b2e01f4ec9b3a78d4f6ee502f0dab7da1)
1*ee97475bSAkira Hatanaka; RUN: llc -mtriple=armv7 %s -o - | FileCheck %s
2*ee97475bSAkira Hatanaka
3*ee97475bSAkira Hatanaka; CHECK: dmb ld
4*ee97475bSAkira Hatanaka
5*ee97475bSAkira Hatanakadefine void @test2() #0 {
6*ee97475bSAkira Hatanaka  call void @llvm.arm.dmb(i32 13)
7*ee97475bSAkira Hatanaka  ret void
8*ee97475bSAkira Hatanaka}
9*ee97475bSAkira Hatanaka
10*ee97475bSAkira Hatanakadeclare void @llvm.arm.dmb(i32)
11*ee97475bSAkira Hatanaka
12*ee97475bSAkira Hatanakaattributes #0 = { "target-cpu"="cyclone" }
13