1a7c18ee8STim Northover; RUN: llc -mtriple=thumbv7em-none-macho %s -o - -mcpu=cortex-m4 | FileCheck --check-prefix=CHECK-HARD %s 2a7c18ee8STim Northover; RUN: llc -mtriple=thumbv7m-none-macho %s -o - -mcpu=cortex-m4 | FileCheck --check-prefix=CHECK-SOFT %s 3a7c18ee8STim Northover; RUN: llc -mtriple=thumbv7em-linux-gnueabi %s -o - -mcpu=cortex-m4 | FileCheck --check-prefix=CHECK-SOFT %s 4a7c18ee8STim Northover 5a7c18ee8STim Northoverdefine float @test_default_cc(float %a, float %b) { 6a7c18ee8STim Northover; CHECK-HARD-LABEL: test_default_cc: 7a7c18ee8STim Northover; CHECK-HARD-NOT: vmov 8a7c18ee8STim Northover; CHECK-HARD: vadd.f32 s0, s0, s1 9a7c18ee8STim Northover; CHECK-HARD-NOT: vmov 10a7c18ee8STim Northover 11a7c18ee8STim Northover; CHECK-SOFT-LABEL: test_default_cc: 12a7c18ee8STim Northover; CHECK-SOFT-DAG: vmov [[A:s[0-9]+]], r0 13a7c18ee8STim Northover; CHECK-SOFT-DAG: vmov [[B:s[0-9]+]], r1 14a7c18ee8STim Northover; CHECK-SOFT: vadd.f32 [[RES:s[0-9]+]], [[A]], [[B]] 15*751c5fbfSDmitri Gribenko; CHECK-SOFT: vmov r0, [[RES]] 16a7c18ee8STim Northover 17a7c18ee8STim Northover %res = fadd float %a, %b 18a7c18ee8STim Northover ret float %res 19a7c18ee8STim Northover} 20a7c18ee8STim Northover 21a7c18ee8STim Northover 22a7c18ee8STim Northoverdefine arm_aapcs_vfpcc float @test_libcall(float %in) { 23a7c18ee8STim Northover; CHECK-HARD-LABEL: test_libcall: 24a7c18ee8STim Northover; CHECK-HARD-NOT: vmov 25a7c18ee8STim Northover; CHECK-HARD: b.w _sinf 26a7c18ee8STim Northover 27a7c18ee8STim Northover; CHECK-SOFT-LABEL: test_libcall: 28a7c18ee8STim Northover; CHECK-SOFT: vmov r0, s0 29a7c18ee8STim Northover; CHECK-SOFT: bl {{_?}}sinf 30a7c18ee8STim Northover; CHECK-SOFT: vmov s0, r0 31a7c18ee8STim Northover 32a7c18ee8STim Northover %res = call float @llvm.sin.f32(float %in) 33a7c18ee8STim Northover ret float %res 34a7c18ee8STim Northover} 35a7c18ee8STim Northover 36a7c18ee8STim Northover 37a7c18ee8STim Northoverdeclare float @llvm.sin.f32(float) 38