1*5c7b43aaSMomchil Velikov; RUN: llc --mtriple armv7-eabihf %s -o - | FileCheck %s 2*5c7b43aaSMomchil Velikov 3*5c7b43aaSMomchil Velikov%struct.S0 = type { [4 x float] } 4*5c7b43aaSMomchil Velikov%struct.S1 = type { [2 x float] } 5*5c7b43aaSMomchil Velikov%struct.S2 = type { [4 x float] } 6*5c7b43aaSMomchil Velikov%struct.D0 = type { [2 x double] } 7*5c7b43aaSMomchil Velikov%struct.D1 = type { [2 x double] } 8*5c7b43aaSMomchil Velikov%struct.D2 = type { [4 x double] } 9*5c7b43aaSMomchil Velikov 10*5c7b43aaSMomchil Velikov; pass in registers 11*5c7b43aaSMomchil Velikovdefine dso_local float @f0_0(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, %struct.S0 %s.coerce) local_unnamed_addr #0 { 12*5c7b43aaSMomchil Velikoventry: 13*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.S0 %s.coerce, 0, 0 14*5c7b43aaSMomchil Velikov ret float %s.coerce.fca.0.0.extract 15*5c7b43aaSMomchil Velikov} 16*5c7b43aaSMomchil Velikov; CHECK-LABEL: f0_0: 17*5c7b43aaSMomchil Velikov; CHECK: vmov.f32 s0, s12 18*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 19*5c7b43aaSMomchil Velikov 20*5c7b43aaSMomchil Velikov; pass in memory, no memory/regs split 21*5c7b43aaSMomchil Velikovdefine dso_local float @f0_1(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, float %x, %struct.S0 %s.coerce) local_unnamed_addr #0 { 22*5c7b43aaSMomchil Velikoventry: 23*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.S0 %s.coerce, 0, 0 24*5c7b43aaSMomchil Velikov ret float %s.coerce.fca.0.0.extract 25*5c7b43aaSMomchil Velikov} 26*5c7b43aaSMomchil Velikov; CHECK-LABEL: f0_1: 27*5c7b43aaSMomchil Velikov; CHECK: vldr s0, [sp] 28*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 29*5c7b43aaSMomchil Velikov 30*5c7b43aaSMomchil Velikov; pass in memory, alignment 4 31*5c7b43aaSMomchil Velikovdefine dso_local float @f0_2(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, float %x, %struct.S0 %s.coerce) local_unnamed_addr #0 { 32*5c7b43aaSMomchil Velikoventry: 33*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.S0 %s.coerce, 0, 0 34*5c7b43aaSMomchil Velikov ret float %s.coerce.fca.0.0.extract 35*5c7b43aaSMomchil Velikov} 36*5c7b43aaSMomchil Velikov; CHECK-LABEL: f0_2: 37*5c7b43aaSMomchil Velikov; CHECK: vldr s0, [sp, #4] 38*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 39*5c7b43aaSMomchil Velikov 40*5c7b43aaSMomchil Velikov; pass in registers 41*5c7b43aaSMomchil Velikovdefine dso_local float @f1_0(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, %struct.S1 alignstack(8) %s.coerce) local_unnamed_addr #0 { 42*5c7b43aaSMomchil Velikoventry: 43*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.S1 %s.coerce, 0, 0 44*5c7b43aaSMomchil Velikov ret float %s.coerce.fca.0.0.extract 45*5c7b43aaSMomchil Velikov} 46*5c7b43aaSMomchil Velikov; CHECK-LABEL: f1_0: 47*5c7b43aaSMomchil Velikov; CHECK: vmov.f32 s0, s14 48*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 49*5c7b43aaSMomchil Velikov 50*5c7b43aaSMomchil Velikov; pass in memory, no memory/regs split 51*5c7b43aaSMomchil Velikovdefine dso_local float @f1_1(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, float %x, %struct.S1 alignstack(8) %s.coerce) local_unnamed_addr #0 { 52*5c7b43aaSMomchil Velikoventry: 53*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.S1 %s.coerce, 0, 0 54*5c7b43aaSMomchil Velikov ret float %s.coerce.fca.0.0.extract 55*5c7b43aaSMomchil Velikov} 56*5c7b43aaSMomchil Velikov; CHECK-LABEL: f1_1: 57*5c7b43aaSMomchil Velikov; CHECK: vldr s0, [sp] 58*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 59*5c7b43aaSMomchil Velikov 60*5c7b43aaSMomchil Velikov; pass in memory, alignment 8 61*5c7b43aaSMomchil Velikovdefine dso_local float @f1_2(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, float %x, %struct.S1 alignstack(8) %s.coerce) local_unnamed_addr #0 { 62*5c7b43aaSMomchil Velikoventry: 63*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.S1 %s.coerce, 0, 0 64*5c7b43aaSMomchil Velikov ret float %s.coerce.fca.0.0.extract 65*5c7b43aaSMomchil Velikov} 66*5c7b43aaSMomchil Velikov; CHECK-LABEL: f1_2: 67*5c7b43aaSMomchil Velikov; CHECK: vldr s0, [sp, #8] 68*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 69*5c7b43aaSMomchil Velikov 70*5c7b43aaSMomchil Velikov; pass in registers 71*5c7b43aaSMomchil Velikovdefine dso_local float @f2_0(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, %struct.S2 alignstack(8) %s.coerce) local_unnamed_addr #0 { 72*5c7b43aaSMomchil Velikoventry: 73*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.S2 %s.coerce, 0, 0 74*5c7b43aaSMomchil Velikov ret float %s.coerce.fca.0.0.extract 75*5c7b43aaSMomchil Velikov} 76*5c7b43aaSMomchil Velikov; CHECK-LABEL: f2_0: 77*5c7b43aaSMomchil Velikov; CHECK: vmov.f32 s0, s12 78*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 79*5c7b43aaSMomchil Velikov 80*5c7b43aaSMomchil Velikov; pass in memory, no memory/regs split 81*5c7b43aaSMomchil Velikovdefine dso_local float @f2_1(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, float %x, %struct.S2 alignstack(8) %s.coerce) local_unnamed_addr #0 { 82*5c7b43aaSMomchil Velikoventry: 83*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.S2 %s.coerce, 0, 0 84*5c7b43aaSMomchil Velikov ret float %s.coerce.fca.0.0.extract 85*5c7b43aaSMomchil Velikov} 86*5c7b43aaSMomchil Velikov; CHECK-LABEL: f2_1: 87*5c7b43aaSMomchil Velikov; CHECK: vldr s0, [sp] 88*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 89*5c7b43aaSMomchil Velikov 90*5c7b43aaSMomchil Velikov; pass in memory, alignment 8 91*5c7b43aaSMomchil Velikovdefine dso_local float @f2_2(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, float %x, %struct.S2 alignstack(8) %s.coerce) local_unnamed_addr #0 { 92*5c7b43aaSMomchil Velikoventry: 93*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.S2 %s.coerce, 0, 0 94*5c7b43aaSMomchil Velikov ret float %s.coerce.fca.0.0.extract 95*5c7b43aaSMomchil Velikov} 96*5c7b43aaSMomchil Velikov; CHECK-LABEL: f2_2: 97*5c7b43aaSMomchil Velikov; CHECK: vldr s0, [sp, #8] 98*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 99*5c7b43aaSMomchil Velikov 100*5c7b43aaSMomchil Velikov; pass in registers 101*5c7b43aaSMomchil Velikovdefine dso_local double @g0_0(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, %struct.D0 %s.coerce) local_unnamed_addr #0 { 102*5c7b43aaSMomchil Velikoventry: 103*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.D0 %s.coerce, 0, 0 104*5c7b43aaSMomchil Velikov ret double %s.coerce.fca.0.0.extract 105*5c7b43aaSMomchil Velikov} 106*5c7b43aaSMomchil Velikov; CHECK-LABEL: g0_0: 107*5c7b43aaSMomchil Velikov; CHECK: vmov.f64 d0, d6 108*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 109*5c7b43aaSMomchil Velikov 110*5c7b43aaSMomchil Velikov; pass in memory, no memory/regs split 111*5c7b43aaSMomchil Velikovdefine dso_local double @g0_1(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, %struct.D0 %s.coerce) local_unnamed_addr #0 { 112*5c7b43aaSMomchil Velikoventry: 113*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.D0 %s.coerce, 0, 0 114*5c7b43aaSMomchil Velikov ret double %s.coerce.fca.0.0.extract 115*5c7b43aaSMomchil Velikov} 116*5c7b43aaSMomchil Velikov; CHECK-LABEL: g0_1: 117*5c7b43aaSMomchil Velikov; CHECK: vldr d0, [sp] 118*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 119*5c7b43aaSMomchil Velikov 120*5c7b43aaSMomchil Velikov; pass in memory, alignment 8 121*5c7b43aaSMomchil Velikovdefine dso_local double @g0_2(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, float %x, %struct.D0 %s.coerce) local_unnamed_addr #0 { 122*5c7b43aaSMomchil Velikoventry: 123*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.D0 %s.coerce, 0, 0 124*5c7b43aaSMomchil Velikov ret double %s.coerce.fca.0.0.extract 125*5c7b43aaSMomchil Velikov} 126*5c7b43aaSMomchil Velikov; CHECK-LABEL: g0_2: 127*5c7b43aaSMomchil Velikov; CHECK: vldr d0, [sp, #8] 128*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 129*5c7b43aaSMomchil Velikov 130*5c7b43aaSMomchil Velikov; pass in registers 131*5c7b43aaSMomchil Velikovdefine dso_local double @g1_0(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, %struct.D1 alignstack(8) %s.coerce) local_unnamed_addr #0 { 132*5c7b43aaSMomchil Velikoventry: 133*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.D1 %s.coerce, 0, 0 134*5c7b43aaSMomchil Velikov ret double %s.coerce.fca.0.0.extract 135*5c7b43aaSMomchil Velikov} 136*5c7b43aaSMomchil Velikov; CHECK-LABEL: g1_0: 137*5c7b43aaSMomchil Velikov; CHECK: vmov.f64 d0, d6 138*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 139*5c7b43aaSMomchil Velikov 140*5c7b43aaSMomchil Velikov; pass in memory, no memory/regs split 141*5c7b43aaSMomchil Velikovdefine dso_local double @g1_1(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, %struct.D1 alignstack(8) %s.coerce) local_unnamed_addr #0 { 142*5c7b43aaSMomchil Velikoventry: 143*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.D1 %s.coerce, 0, 0 144*5c7b43aaSMomchil Velikov ret double %s.coerce.fca.0.0.extract 145*5c7b43aaSMomchil Velikov} 146*5c7b43aaSMomchil Velikov; CHECK-LABEL: g1_1: 147*5c7b43aaSMomchil Velikov; CHECK: vldr d0, [sp] 148*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 149*5c7b43aaSMomchil Velikov 150*5c7b43aaSMomchil Velikov; pass in memory, alignment 8 151*5c7b43aaSMomchil Velikovdefine dso_local double @g1_2(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, float %x, %struct.D1 alignstack(8) %s.coerce) local_unnamed_addr #0 { 152*5c7b43aaSMomchil Velikoventry: 153*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.D1 %s.coerce, 0, 0 154*5c7b43aaSMomchil Velikov ret double %s.coerce.fca.0.0.extract 155*5c7b43aaSMomchil Velikov} 156*5c7b43aaSMomchil Velikov; CHECK-LABEL: g1_2: 157*5c7b43aaSMomchil Velikov; CHECK: vldr d0, [sp, #8] 158*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 159*5c7b43aaSMomchil Velikov 160*5c7b43aaSMomchil Velikov; pass in registers 161*5c7b43aaSMomchil Velikovdefine dso_local double @g2_0(double %d0, double %d1, double %d2, double %d3, %struct.D2 alignstack(8) %s.coerce) local_unnamed_addr #0 { 162*5c7b43aaSMomchil Velikoventry: 163*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.D2 %s.coerce, 0, 0 164*5c7b43aaSMomchil Velikov ret double %s.coerce.fca.0.0.extract 165*5c7b43aaSMomchil Velikov} 166*5c7b43aaSMomchil Velikov; CHECK-LABEL: g2_0: 167*5c7b43aaSMomchil Velikov; CHECK: vmov.f64 d0, d4 168*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 169*5c7b43aaSMomchil Velikov 170*5c7b43aaSMomchil Velikov; pass in memory, no memory/regs split 171*5c7b43aaSMomchil Velikovdefine dso_local double @g2_1(double %d0, double %d1, double %d2, double %d3, double %d4, %struct.D2 alignstack(8) %s.coerce) local_unnamed_addr #0 { 172*5c7b43aaSMomchil Velikoventry: 173*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.D2 %s.coerce, 0, 0 174*5c7b43aaSMomchil Velikov ret double %s.coerce.fca.0.0.extract 175*5c7b43aaSMomchil Velikov} 176*5c7b43aaSMomchil Velikov; CHECK-LABEL: g2_1: 177*5c7b43aaSMomchil Velikov; CHECK: vldr d0, [sp] 178*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 179*5c7b43aaSMomchil Velikov 180*5c7b43aaSMomchil Velikov; pass in memory, alignment 8 181*5c7b43aaSMomchil Velikovdefine dso_local double @g2_2(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, float %x, %struct.D2 alignstack(8) %s.coerce) local_unnamed_addr #0 { 182*5c7b43aaSMomchil Velikoventry: 183*5c7b43aaSMomchil Velikov %s.coerce.fca.0.0.extract = extractvalue %struct.D2 %s.coerce, 0, 0 184*5c7b43aaSMomchil Velikov ret double %s.coerce.fca.0.0.extract 185*5c7b43aaSMomchil Velikov} 186*5c7b43aaSMomchil Velikov; CHECK-LABEL: g2_2: 187*5c7b43aaSMomchil Velikov; CHECK: vldr d0, [sp, #8] 188*5c7b43aaSMomchil Velikov; CHECK-NEXT: bx lr 189*5c7b43aaSMomchil Velikov 190*5c7b43aaSMomchil Velikovattributes #0 = { "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+strict-align,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" } 191