xref: /llvm-project/llvm/test/CodeGen/ARM/ftrunc.ll (revision 3d453ad7118a4be0fe5089ae6b3d1985ad5d1860)
1*3d453ad7SSanjay Patel; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2*3d453ad7SSanjay Patel; RUN: llc -mtriple=armv7-eabi < %s | FileCheck %s
3*3d453ad7SSanjay Patel
4*3d453ad7SSanjay Pateldefine float @trunc_unsigned_f32(float %x) nounwind {
5*3d453ad7SSanjay Patel; CHECK-LABEL: trunc_unsigned_f32:
6*3d453ad7SSanjay Patel; CHECK:       @ %bb.0:
7*3d453ad7SSanjay Patel; CHECK-NEXT:    vmov s0, r0
8*3d453ad7SSanjay Patel; CHECK-NEXT:    vcvt.u32.f32 s0, s0
9*3d453ad7SSanjay Patel; CHECK-NEXT:    vcvt.f32.u32 s0, s0
10*3d453ad7SSanjay Patel; CHECK-NEXT:    vmov r0, s0
11*3d453ad7SSanjay Patel; CHECK-NEXT:    bx lr
12*3d453ad7SSanjay Patel  %i = fptoui float %x to i32
13*3d453ad7SSanjay Patel  %r = uitofp i32 %i to float
14*3d453ad7SSanjay Patel  ret float %r
15*3d453ad7SSanjay Patel}
16*3d453ad7SSanjay Patel
17*3d453ad7SSanjay Pateldefine double @trunc_unsigned_f64_i64(double %x) nounwind {
18*3d453ad7SSanjay Patel; CHECK-LABEL: trunc_unsigned_f64_i64:
19*3d453ad7SSanjay Patel; CHECK:       @ %bb.0:
20*3d453ad7SSanjay Patel; CHECK-NEXT:    .save {r11, lr}
21*3d453ad7SSanjay Patel; CHECK-NEXT:    push {r11, lr}
22*3d453ad7SSanjay Patel; CHECK-NEXT:    bl __aeabi_d2ulz
23*3d453ad7SSanjay Patel; CHECK-NEXT:    bl __aeabi_ul2d
24*3d453ad7SSanjay Patel; CHECK-NEXT:    pop {r11, pc}
25*3d453ad7SSanjay Patel  %i = fptoui double %x to i64
26*3d453ad7SSanjay Patel  %r = uitofp i64 %i to double
27*3d453ad7SSanjay Patel  ret double %r
28*3d453ad7SSanjay Patel}
29*3d453ad7SSanjay Patel
30*3d453ad7SSanjay Pateldefine double @trunc_unsigned_f64_i32(double %x) nounwind {
31*3d453ad7SSanjay Patel; CHECK-LABEL: trunc_unsigned_f64_i32:
32*3d453ad7SSanjay Patel; CHECK:       @ %bb.0:
33*3d453ad7SSanjay Patel; CHECK-NEXT:    vmov d16, r0, r1
34*3d453ad7SSanjay Patel; CHECK-NEXT:    vcvt.u32.f64 s0, d16
35*3d453ad7SSanjay Patel; CHECK-NEXT:    vcvt.f64.u32 d16, s0
36*3d453ad7SSanjay Patel; CHECK-NEXT:    vmov r0, r1, d16
37*3d453ad7SSanjay Patel; CHECK-NEXT:    bx lr
38*3d453ad7SSanjay Patel  %i = fptoui double %x to i32
39*3d453ad7SSanjay Patel  %r = uitofp i32 %i to double
40*3d453ad7SSanjay Patel  ret double %r
41*3d453ad7SSanjay Patel}
42*3d453ad7SSanjay Patel
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