xref: /llvm-project/llvm/test/CodeGen/ARM/fast-isel-ret.ll (revision 945a660cbc928a451b2a3114104c2b55e63c7bac)
1*945a660cSMehdi Amini; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s
2*945a660cSMehdi Amini; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s
3*945a660cSMehdi Amini; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s
4f3e73ad5SChad Rosier
5f3e73ad5SChad Rosier; Sign-extend of i1 currently not supported by fast-isel
6f3e73ad5SChad Rosier;define signext i1 @ret0(i1 signext %a) nounwind uwtable ssp {
7f3e73ad5SChad Rosier;entry:
8f3e73ad5SChad Rosier;  ret i1 %a
9f3e73ad5SChad Rosier;}
10f3e73ad5SChad Rosier
11f3e73ad5SChad Rosierdefine zeroext i1 @ret1(i1 signext %a) nounwind uwtable ssp {
12f3e73ad5SChad Rosierentry:
13f3e73ad5SChad Rosier; CHECK: ret1
14f3e73ad5SChad Rosier; CHECK: and r0, r0, #1
15f3e73ad5SChad Rosier; CHECK: bx lr
16f3e73ad5SChad Rosier  ret i1 %a
17f3e73ad5SChad Rosier}
18f3e73ad5SChad Rosier
19f3e73ad5SChad Rosierdefine signext i8 @ret2(i8 signext %a) nounwind uwtable ssp {
20f3e73ad5SChad Rosierentry:
21f3e73ad5SChad Rosier; CHECK: ret2
22f3e73ad5SChad Rosier; CHECK: sxtb r0, r0
23f3e73ad5SChad Rosier; CHECK: bx lr
24f3e73ad5SChad Rosier  ret i8 %a
25f3e73ad5SChad Rosier}
26f3e73ad5SChad Rosier
27f3e73ad5SChad Rosierdefine zeroext i8 @ret3(i8 signext %a) nounwind uwtable ssp {
28f3e73ad5SChad Rosierentry:
29f3e73ad5SChad Rosier; CHECK: ret3
3006ce03d1SJF Bastien; CHECK: and r0, r0, #255
31f3e73ad5SChad Rosier; CHECK: bx lr
32f3e73ad5SChad Rosier  ret i8 %a
33f3e73ad5SChad Rosier}
34f3e73ad5SChad Rosier
35f3e73ad5SChad Rosierdefine signext i16 @ret4(i16 signext %a) nounwind uwtable ssp {
36f3e73ad5SChad Rosierentry:
37f3e73ad5SChad Rosier; CHECK: ret4
38f3e73ad5SChad Rosier; CHECK: sxth r0, r0
39f3e73ad5SChad Rosier; CHECK: bx lr
40f3e73ad5SChad Rosier  ret i16 %a
41f3e73ad5SChad Rosier}
42f3e73ad5SChad Rosier
43f3e73ad5SChad Rosierdefine zeroext i16 @ret5(i16 signext %a) nounwind uwtable ssp {
44f3e73ad5SChad Rosierentry:
45f3e73ad5SChad Rosier; CHECK: ret5
46f3e73ad5SChad Rosier; CHECK: uxth r0, r0
47f3e73ad5SChad Rosier; CHECK: bx lr
48f3e73ad5SChad Rosier  ret i16 %a
49f3e73ad5SChad Rosier}
50fcd29ae3SChad Rosier
51fcd29ae3SChad Rosierdefine i16 @ret6(i16 %a) nounwind uwtable ssp {
52fcd29ae3SChad Rosierentry:
53fcd29ae3SChad Rosier; CHECK: ret6
54fcd29ae3SChad Rosier; CHECK-NOT: uxth
55fcd29ae3SChad Rosier; CHECK-NOT: sxth
56fcd29ae3SChad Rosier; CHECK: bx lr
57fcd29ae3SChad Rosier  ret i16 %a
58fcd29ae3SChad Rosier}
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