1*945a660cSMehdi Amini; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=v7 2*945a660cSMehdi Amini; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=v7 3*945a660cSMehdi Amini; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=v7 406ce03d1SJF Bastien 506ce03d1SJF Bastien; Can't test pre-ARMv6 Thumb because ARM FastISel currently only supports 606ce03d1SJF Bastien; Thumb2. The ARMFastISel::ARMEmitIntExt code should work for Thumb by always 706ce03d1SJF Bastien; using two shifts. 806ce03d1SJF Bastien 906ce03d1SJF Bastien; Note that lsl, asr and lsr in Thumb are all encoded as 16-bit instructions 1006ce03d1SJF Bastien; and therefore must set flags. {{s?}} below denotes this, instead of 1106ce03d1SJF Bastien; duplicating tests. 1206ce03d1SJF Bastien 1306ce03d1SJF Bastien; zext 1406ce03d1SJF Bastien 1506ce03d1SJF Bastiendefine i8 @zext_1_8(i1 %a) nounwind ssp { 16d24ab20eSStephen Lin; v7-LABEL: zext_1_8: 1706ce03d1SJF Bastien; v7: and r0, r0, #1 1806ce03d1SJF Bastien %r = zext i1 %a to i8 1906ce03d1SJF Bastien ret i8 %r 2006ce03d1SJF Bastien} 2106ce03d1SJF Bastien 2206ce03d1SJF Bastiendefine i16 @zext_1_16(i1 %a) nounwind ssp { 23d24ab20eSStephen Lin; v7-LABEL: zext_1_16: 2406ce03d1SJF Bastien; v7: and r0, r0, #1 2506ce03d1SJF Bastien %r = zext i1 %a to i16 2606ce03d1SJF Bastien ret i16 %r 2706ce03d1SJF Bastien} 2806ce03d1SJF Bastien 2906ce03d1SJF Bastiendefine i32 @zext_1_32(i1 %a) nounwind ssp { 30d24ab20eSStephen Lin; v7-LABEL: zext_1_32: 3106ce03d1SJF Bastien; v7: and r0, r0, #1 3206ce03d1SJF Bastien %r = zext i1 %a to i32 3306ce03d1SJF Bastien ret i32 %r 3406ce03d1SJF Bastien} 3506ce03d1SJF Bastien 3606ce03d1SJF Bastiendefine i16 @zext_8_16(i8 %a) nounwind ssp { 37d24ab20eSStephen Lin; v7-LABEL: zext_8_16: 3806ce03d1SJF Bastien; v7: and r0, r0, #255 3906ce03d1SJF Bastien %r = zext i8 %a to i16 4006ce03d1SJF Bastien ret i16 %r 4106ce03d1SJF Bastien} 4206ce03d1SJF Bastien 4306ce03d1SJF Bastiendefine i32 @zext_8_32(i8 %a) nounwind ssp { 44d24ab20eSStephen Lin; v7-LABEL: zext_8_32: 4506ce03d1SJF Bastien; v7: and r0, r0, #255 4606ce03d1SJF Bastien %r = zext i8 %a to i32 4706ce03d1SJF Bastien ret i32 %r 4806ce03d1SJF Bastien} 4906ce03d1SJF Bastien 5006ce03d1SJF Bastiendefine i32 @zext_16_32(i16 %a) nounwind ssp { 51d24ab20eSStephen Lin; v7-LABEL: zext_16_32: 5206ce03d1SJF Bastien; v7: uxth r0, r0 5306ce03d1SJF Bastien %r = zext i16 %a to i32 5406ce03d1SJF Bastien ret i32 %r 5506ce03d1SJF Bastien} 5606ce03d1SJF Bastien 5706ce03d1SJF Bastien; sext 5806ce03d1SJF Bastien 5906ce03d1SJF Bastiendefine i8 @sext_1_8(i1 %a) nounwind ssp { 60d24ab20eSStephen Lin; v7-LABEL: sext_1_8: 6106ce03d1SJF Bastien; v7: lsl{{s?}} r0, r0, #31 6206ce03d1SJF Bastien; v7: asr{{s?}} r0, r0, #31 6306ce03d1SJF Bastien %r = sext i1 %a to i8 6406ce03d1SJF Bastien ret i8 %r 6506ce03d1SJF Bastien} 6606ce03d1SJF Bastien 6706ce03d1SJF Bastiendefine i16 @sext_1_16(i1 %a) nounwind ssp { 68d24ab20eSStephen Lin; v7-LABEL: sext_1_16: 6906ce03d1SJF Bastien; v7: lsl{{s?}} r0, r0, #31 7006ce03d1SJF Bastien; v7: asr{{s?}} r0, r0, #31 7106ce03d1SJF Bastien %r = sext i1 %a to i16 7206ce03d1SJF Bastien ret i16 %r 7306ce03d1SJF Bastien} 7406ce03d1SJF Bastien 7506ce03d1SJF Bastiendefine i32 @sext_1_32(i1 %a) nounwind ssp { 76d24ab20eSStephen Lin; v7-LABEL: sext_1_32: 7706ce03d1SJF Bastien; v7: lsl{{s?}} r0, r0, #31 7806ce03d1SJF Bastien; v7: asr{{s?}} r0, r0, #31 7906ce03d1SJF Bastien %r = sext i1 %a to i32 8006ce03d1SJF Bastien ret i32 %r 8106ce03d1SJF Bastien} 8206ce03d1SJF Bastien 8306ce03d1SJF Bastiendefine i16 @sext_8_16(i8 %a) nounwind ssp { 84d24ab20eSStephen Lin; v7-LABEL: sext_8_16: 8506ce03d1SJF Bastien; v7: sxtb r0, r0 8606ce03d1SJF Bastien %r = sext i8 %a to i16 8706ce03d1SJF Bastien ret i16 %r 8806ce03d1SJF Bastien} 8906ce03d1SJF Bastien 9006ce03d1SJF Bastiendefine i32 @sext_8_32(i8 %a) nounwind ssp { 91d24ab20eSStephen Lin; v7-LABEL: sext_8_32: 9206ce03d1SJF Bastien; v7: sxtb r0, r0 9306ce03d1SJF Bastien %r = sext i8 %a to i32 9406ce03d1SJF Bastien ret i32 %r 9506ce03d1SJF Bastien} 9606ce03d1SJF Bastien 9706ce03d1SJF Bastiendefine i32 @sext_16_32(i16 %a) nounwind ssp { 98d24ab20eSStephen Lin; v7-LABEL: sext_16_32: 9906ce03d1SJF Bastien; v7: sxth r0, r0 10006ce03d1SJF Bastien %r = sext i16 %a to i32 10106ce03d1SJF Bastien ret i32 %r 10206ce03d1SJF Bastien} 103