1ccb209bbSSam Parker; RUN: llc -mtriple=armv7 %s -o - | FileCheck %s 2ccb209bbSSam Parker; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s --check-prefix=CHECK-T2 3ccb209bbSSam Parker 4ccb209bbSSam Parkerdefine i1 @f1(i32 %a, i32 %b) { 5ccb209bbSSam Parker; CHECK-LABEL: f1: 6d41059a9SRoger Ferrer Ibanez; CHECK: subs r0, r0, r1 7d41059a9SRoger Ferrer Ibanez; CHECK: movwne r0, #1 8d41059a9SRoger Ferrer Ibanez; CHECK-T2: subs r0, r0, r1 9d41059a9SRoger Ferrer Ibanez; CHECK-T2: it ne 10d41059a9SRoger Ferrer Ibanez; CHECK-T2: movne r0, #1 11ccb209bbSSam Parker %tmp = icmp ne i32 %a, %b 12ccb209bbSSam Parker ret i1 %tmp 13ccb209bbSSam Parker} 14ccb209bbSSam Parker 15ccb209bbSSam Parkerdefine i1 @f2(i32 %a, i32 %b) { 16ccb209bbSSam Parker; CHECK-LABEL: f2: 17d41059a9SRoger Ferrer Ibanez; CHECK: sub r0, r0, r1 18d41059a9SRoger Ferrer Ibanez; CHECK: clz r0, r0 19d41059a9SRoger Ferrer Ibanez; CHECK: lsr r0, r0, #5 20d41059a9SRoger Ferrer Ibanez; CHECK-T2: subs r0, r0, r1 21d41059a9SRoger Ferrer Ibanez; CHECK-T2: clz r0, r0 22d41059a9SRoger Ferrer Ibanez; CHECK-T2: lsrs r0, r0, #5 23ccb209bbSSam Parker %tmp = icmp eq i32 %a, %b 24ccb209bbSSam Parker ret i1 %tmp 25ccb209bbSSam Parker} 26ccb209bbSSam Parker 27ccb209bbSSam Parkerdefine i1 @f6(i32 %a, i32 %b) { 28ccb209bbSSam Parker; CHECK-LABEL: f6: 29d41059a9SRoger Ferrer Ibanez; CHECK: sub r0, r0, r1, lsl #5 30d41059a9SRoger Ferrer Ibanez; CHECK: clz r0, r0 31d41059a9SRoger Ferrer Ibanez; CHECK: lsr r0, r0, #5 32d41059a9SRoger Ferrer Ibanez; CHECK-T2: sub.w r0, r0, r1, lsl #5 33d41059a9SRoger Ferrer Ibanez; CHECK-T2: clz r0, r0 34d41059a9SRoger Ferrer Ibanez; CHECK-T2: lsrs r0, r0, #5 35ccb209bbSSam Parker %tmp = shl i32 %b, 5 36ccb209bbSSam Parker %tmp1 = icmp eq i32 %a, %tmp 37ccb209bbSSam Parker ret i1 %tmp1 38ccb209bbSSam Parker} 39ccb209bbSSam Parker 40ccb209bbSSam Parkerdefine i1 @f7(i32 %a, i32 %b) { 41ccb209bbSSam Parker; CHECK-LABEL: f7: 42*5745b6acSTim Northover; CHECK: subs r0, r0, r1, lsr #6 43*5745b6acSTim Northover; CHECK: movwne r0, #1 44*5745b6acSTim Northover; CHECK-T2: subs.w r0, r0, r1, lsr #6 45d41059a9SRoger Ferrer Ibanez; CHECK-T2: it ne 46*5745b6acSTim Northover; CHECK-T2: movne r0, #1 47ccb209bbSSam Parker %tmp = lshr i32 %b, 6 48ccb209bbSSam Parker %tmp1 = icmp ne i32 %a, %tmp 49ccb209bbSSam Parker ret i1 %tmp1 50ccb209bbSSam Parker} 51ccb209bbSSam Parker 52ccb209bbSSam Parkerdefine i1 @f8(i32 %a, i32 %b) { 53ccb209bbSSam Parker; CHECK-LABEL: f8: 54d41059a9SRoger Ferrer Ibanez; CHECK: sub r0, r0, r1, asr #7 55d41059a9SRoger Ferrer Ibanez; CHECK: clz r0, r0 56d41059a9SRoger Ferrer Ibanez; CHECK: lsr r0, r0, #5 57d41059a9SRoger Ferrer Ibanez; CHECK-T2: sub.w r0, r0, r1, asr #7 58d41059a9SRoger Ferrer Ibanez; CHECK-T2: clz r0, r0 59d41059a9SRoger Ferrer Ibanez; CHECK-T2: lsrs r0, r0, #5 60ccb209bbSSam Parker %tmp = ashr i32 %b, 7 61ccb209bbSSam Parker %tmp1 = icmp eq i32 %a, %tmp 62ccb209bbSSam Parker ret i1 %tmp1 63ccb209bbSSam Parker} 64ccb209bbSSam Parker 65ccb209bbSSam Parkerdefine i1 @f9(i32 %a) { 66ccb209bbSSam Parker; CHECK-LABEL: f9: 67*5745b6acSTim Northover; CHECK: subs r0, r0, r0, ror #8 68*5745b6acSTim Northover; CHECK: movwne r0, #1 69*5745b6acSTim Northover; CHECK-T2: subs.w r0, r0, r0, ror #8 70d41059a9SRoger Ferrer Ibanez; CHECK-T2: it ne 71*5745b6acSTim Northover; CHECK-T2: movne r0, #1 72ccb209bbSSam Parker %l8 = shl i32 %a, 24 73ccb209bbSSam Parker %r8 = lshr i32 %a, 8 74ccb209bbSSam Parker %tmp = or i32 %l8, %r8 75ccb209bbSSam Parker %tmp1 = icmp ne i32 %a, %tmp 76ccb209bbSSam Parker ret i1 %tmp1 77ccb209bbSSam Parker} 78ccb209bbSSam Parker 79ccb209bbSSam Parker; CHECK-LABEL: swap_cmp_shl 80ccb209bbSSam Parker; CHECK: mov r2, #0 81ccb209bbSSam Parker; CHECK: cmp r1, r0, lsl #11 82ccb209bbSSam Parker; CHECK: movwlt r2, #1 83ccb209bbSSam Parker; CHECK-T2: mov{{.*}} r2, #0 84ccb209bbSSam Parker; CHECK-T2: cmp.w r1, r0, lsl #11 85ccb209bbSSam Parker; CHECK-T2: movlt r2, #1 86ccb209bbSSam Parkerdefine arm_aapcscc i32 @swap_cmp_shl(i32 %a, i32 %b) { 87ccb209bbSSam Parkerentry: 88ccb209bbSSam Parker %shift = shl i32 %a, 11 89ccb209bbSSam Parker %cmp = icmp sgt i32 %shift, %b 90ccb209bbSSam Parker %conv = zext i1 %cmp to i32 91ccb209bbSSam Parker ret i32 %conv 92ccb209bbSSam Parker} 93ccb209bbSSam Parker 94ccb209bbSSam Parker; CHECK-LABEL: swap_cmp_lshr 95ccb209bbSSam Parker; CHECK: mov r2, #0 96ccb209bbSSam Parker; CHECK: cmp r1, r0, lsr #11 97ccb209bbSSam Parker; CHECK: movwhi r2, #1 98ccb209bbSSam Parker; CHECK-T2: mov{{.*}} r2, #0 99ccb209bbSSam Parker; CHECK-T2: cmp.w r1, r0, lsr #11 100ccb209bbSSam Parker; CHECK-T2: movhi r2, #1 101ccb209bbSSam Parkerdefine arm_aapcscc i32 @swap_cmp_lshr(i32 %a, i32 %b) { 102ccb209bbSSam Parkerentry: 103ccb209bbSSam Parker %shift = lshr i32 %a, 11 104ccb209bbSSam Parker %cmp = icmp ult i32 %shift, %b 105ccb209bbSSam Parker %conv = zext i1 %cmp to i32 106ccb209bbSSam Parker ret i32 %conv 107ccb209bbSSam Parker} 108ccb209bbSSam Parker 109ccb209bbSSam Parker; CHECK-LABEL: swap_cmp_ashr 110ccb209bbSSam Parker; CHECK: mov r2, #0 111ccb209bbSSam Parker; CHECK: cmp r1, r0, asr #11 112ccb209bbSSam Parker; CHECK: movwle r2, #1 113ccb209bbSSam Parker; CHECK-T2: mov{{.*}} r2, #0 114ccb209bbSSam Parker; CHECK-T2: cmp.w r1, r0, asr #11 115ccb209bbSSam Parker; CHECK-T2: movle r2, #1 116ccb209bbSSam Parkerdefine arm_aapcscc i32 @swap_cmp_ashr(i32 %a, i32 %b) { 117ccb209bbSSam Parkerentry: 118ccb209bbSSam Parker %shift = ashr i32 %a, 11 119ccb209bbSSam Parker %cmp = icmp sge i32 %shift, %b 120ccb209bbSSam Parker %conv = zext i1 %cmp to i32 121ccb209bbSSam Parker ret i32 %conv 122ccb209bbSSam Parker} 123ccb209bbSSam Parker 124ccb209bbSSam Parker; CHECK-LABEL: swap_cmp_rotr 125ccb209bbSSam Parker; CHECK: mov r2, #0 126ccb209bbSSam Parker; CHECK: cmp r1, r0, ror #11 127ccb209bbSSam Parker; CHECK: movwls r2, #1 128ccb209bbSSam Parker; CHECK-T2: mov{{.*}} r2, #0 129ccb209bbSSam Parker; CHECK-T2: cmp.w r1, r0, ror #11 130ccb209bbSSam Parker; CHECK-T2: movls r2, #1 131ccb209bbSSam Parkerdefine arm_aapcscc i32 @swap_cmp_rotr(i32 %a, i32 %b) { 132ccb209bbSSam Parkerentry: 133ccb209bbSSam Parker %lsr = lshr i32 %a, 11 134ccb209bbSSam Parker %lsl = shl i32 %a, 21 135ccb209bbSSam Parker %ror = or i32 %lsr, %lsl 136ccb209bbSSam Parker %cmp = icmp uge i32 %ror, %b 137ccb209bbSSam Parker %conv = zext i1 %cmp to i32 138ccb209bbSSam Parker ret i32 %conv 139ccb209bbSSam Parker} 140