1*f6e11a36Svhscampos; RUN: llc -mtriple=armv5 %s -o - | FileCheck %s 2*f6e11a36Svhscampos 3*f6e11a36Svhscampos; CHECK: eor [[T:r[0-9]+]], [[T]], [[T]], asr #31 4*f6e11a36Svhscampos; CHECK-NEXT: mov [[C1:r[0-9]+]], #1 5*f6e11a36Svhscampos; CHECK-NEXT: orr [[T]], [[C1]], [[T]], lsl #1 6*f6e11a36Svhscampos; CHECK-NEXT: clz [[T]], [[T]] 7*f6e11a36Svhscamposdefine i32 @cls(i32 %t) { 8*f6e11a36Svhscampos %cls.i = call i32 @llvm.arm.cls(i32 %t) 9*f6e11a36Svhscampos ret i32 %cls.i 10*f6e11a36Svhscampos} 11*f6e11a36Svhscampos 12*f6e11a36Svhscampos; CHECK: cmp r1, #0 13*f6e11a36Svhscampos; CHECK: mvnne [[ADJUSTEDLO:r[0-9]+]], r0 14*f6e11a36Svhscampos; CHECK: clz [[CLZLO:r[0-9]+]], [[ADJUSTEDLO]] 15*f6e11a36Svhscampos; CHECK: eor [[A:r[0-9]+]], r1, r1, asr #31 16*f6e11a36Svhscampos; CHECK: mov r1, #1 17*f6e11a36Svhscampos; CHECK: orr [[A]], r1, [[A]], lsl #1 18*f6e11a36Svhscampos; CHECK: clz [[CLSHI:r[0-9]+]], [[A]] 19*f6e11a36Svhscampos; CHECK: cmp [[CLSHI]], #31 20*f6e11a36Svhscampos; CHECK: addeq r0, [[CLZLO]], #31 21*f6e11a36Svhscamposdefine i32 @cls64(i64 %t) { 22*f6e11a36Svhscampos %cls.i = call i32 @llvm.arm.cls64(i64 %t) 23*f6e11a36Svhscampos ret i32 %cls.i 24*f6e11a36Svhscampos} 25*f6e11a36Svhscampos 26*f6e11a36Svhscamposdeclare i32 @llvm.arm.cls(i32) nounwind 27*f6e11a36Svhscamposdeclare i32 @llvm.arm.cls64(i64) nounwind 28