120f89069SBen Shi; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 220f89069SBen Shi; RUN: llc -mtriple=armv6-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-ARM,CHECK-ARMV6 320f89069SBen Shi; RUN: llc -mtriple=armv7a-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-ARM,CHECK-ARMV7 420f89069SBen Shi; RUN: llc -mtriple=thumbv6m-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-THUMB,CHECK-THUMBV6M 520f89069SBen Shi; RUN: llc -mtriple=thumbv7m-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-THUMB,CHECK-THUMBV7M 620f89069SBen Shi 720f89069SBen Shidefine i32 @fold_add19_mul11_i32(i32 %a) { 820f89069SBen Shi; CHECK-ARM-LABEL: fold_add19_mul11_i32: 920f89069SBen Shi; CHECK-ARM: @ %bb.0: 1020f89069SBen Shi; CHECK-ARM-NEXT: mov r1, #11 1120f89069SBen Shi; CHECK-ARM-NEXT: mul r0, r0, r1 1220f89069SBen Shi; CHECK-ARM-NEXT: add r0, r0, #209 1320f89069SBen Shi; CHECK-ARM-NEXT: bx lr 1420f89069SBen Shi; 1520f89069SBen Shi; CHECK-THUMB-LABEL: fold_add19_mul11_i32: 1620f89069SBen Shi; CHECK-THUMB: @ %bb.0: 1720f89069SBen Shi; CHECK-THUMB-NEXT: movs r1, #11 1820f89069SBen Shi; CHECK-THUMB-NEXT: muls r0, r1, r0 1920f89069SBen Shi; CHECK-THUMB-NEXT: adds r0, #209 2020f89069SBen Shi; CHECK-THUMB-NEXT: bx lr 2120f89069SBen Shi %b = add i32 %a, 19 2220f89069SBen Shi %c = mul i32 %b, 11 2320f89069SBen Shi ret i32 %c 2420f89069SBen Shi} 2520f89069SBen Shi 2620f89069SBen Shidefine i16 @fold_add19_mul11_i16(i16 %a) { 2720f89069SBen Shi; CHECK-ARM-LABEL: fold_add19_mul11_i16: 2820f89069SBen Shi; CHECK-ARM: @ %bb.0: 2920f89069SBen Shi; CHECK-ARM-NEXT: mov r1, #11 3020f89069SBen Shi; CHECK-ARM-NEXT: mul r0, r0, r1 3120f89069SBen Shi; CHECK-ARM-NEXT: add r0, r0, #209 3220f89069SBen Shi; CHECK-ARM-NEXT: bx lr 3320f89069SBen Shi; 3420f89069SBen Shi; CHECK-THUMB-LABEL: fold_add19_mul11_i16: 3520f89069SBen Shi; CHECK-THUMB: @ %bb.0: 3620f89069SBen Shi; CHECK-THUMB-NEXT: movs r1, #11 3720f89069SBen Shi; CHECK-THUMB-NEXT: muls r0, r1, r0 3820f89069SBen Shi; CHECK-THUMB-NEXT: adds r0, #209 3920f89069SBen Shi; CHECK-THUMB-NEXT: bx lr 4020f89069SBen Shi %b = add i16 %a, 19 4120f89069SBen Shi %c = mul i16 %b, 11 4220f89069SBen Shi ret i16 %c 4320f89069SBen Shi} 4420f89069SBen Shi 4520f89069SBen Shidefine i32 @fold_sub19_mul11_i32(i32 %a) { 4620f89069SBen Shi; CHECK-ARM-LABEL: fold_sub19_mul11_i32: 4720f89069SBen Shi; CHECK-ARM: @ %bb.0: 4820f89069SBen Shi; CHECK-ARM-NEXT: mov r1, #11 4920f89069SBen Shi; CHECK-ARM-NEXT: mul r0, r0, r1 5020f89069SBen Shi; CHECK-ARM-NEXT: sub r0, r0, #209 5120f89069SBen Shi; CHECK-ARM-NEXT: bx lr 5220f89069SBen Shi; 5320f89069SBen Shi; CHECK-THUMB-LABEL: fold_sub19_mul11_i32: 5420f89069SBen Shi; CHECK-THUMB: @ %bb.0: 5520f89069SBen Shi; CHECK-THUMB-NEXT: movs r1, #11 5620f89069SBen Shi; CHECK-THUMB-NEXT: muls r0, r1, r0 5720f89069SBen Shi; CHECK-THUMB-NEXT: subs r0, #209 5820f89069SBen Shi; CHECK-THUMB-NEXT: bx lr 5920f89069SBen Shi %b = add i32 %a, -19 6020f89069SBen Shi %c = mul i32 %b, 11 6120f89069SBen Shi ret i32 %c 6220f89069SBen Shi} 6320f89069SBen Shi 6420f89069SBen Shidefine i16 @fold_sub19_mul11_i16(i16 %a) { 6520f89069SBen Shi; CHECK-ARM-LABEL: fold_sub19_mul11_i16: 6620f89069SBen Shi; CHECK-ARM: @ %bb.0: 6720f89069SBen Shi; CHECK-ARM-NEXT: mov r1, #11 6820f89069SBen Shi; CHECK-ARM-NEXT: mul r0, r0, r1 6920f89069SBen Shi; CHECK-ARM-NEXT: sub r0, r0, #209 7020f89069SBen Shi; CHECK-ARM-NEXT: bx lr 7120f89069SBen Shi; 7220f89069SBen Shi; CHECK-THUMB-LABEL: fold_sub19_mul11_i16: 7320f89069SBen Shi; CHECK-THUMB: @ %bb.0: 7420f89069SBen Shi; CHECK-THUMB-NEXT: movs r1, #11 7520f89069SBen Shi; CHECK-THUMB-NEXT: muls r0, r1, r0 7620f89069SBen Shi; CHECK-THUMB-NEXT: subs r0, #209 7720f89069SBen Shi; CHECK-THUMB-NEXT: bx lr 7820f89069SBen Shi %b = add i16 %a, -19 7920f89069SBen Shi %c = mul i16 %b, 11 8020f89069SBen Shi ret i16 %c 8120f89069SBen Shi} 8220f89069SBen Shi 8320f89069SBen Shidefine i32 @fold_add301_mul19_i32(i32 %a) { 8420f89069SBen Shi; CHECK-ARMV6-LABEL: fold_add301_mul19_i32: 8520f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 8620f89069SBen Shi; CHECK-ARMV6-NEXT: mov r1, #87 8720f89069SBen Shi; CHECK-ARMV6-NEXT: mov r2, #19 8820f89069SBen Shi; CHECK-ARMV6-NEXT: orr r1, r1, #5632 8920f89069SBen Shi; CHECK-ARMV6-NEXT: mla r0, r0, r2, r1 9020f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 9120f89069SBen Shi; 9220f89069SBen Shi; CHECK-ARMV7-LABEL: fold_add301_mul19_i32: 9320f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 9420f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #5719 9520f89069SBen Shi; CHECK-ARMV7-NEXT: mov r2, #19 9620f89069SBen Shi; CHECK-ARMV7-NEXT: mla r0, r0, r2, r1 9720f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 9820f89069SBen Shi; 9920f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_add301_mul19_i32: 10020f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 10120f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #19 10220f89069SBen Shi; CHECK-THUMBV6M-NEXT: muls r1, r0, r1 10320f89069SBen Shi; CHECK-THUMBV6M-NEXT: ldr r0, .LCPI4_0 10420f89069SBen Shi; CHECK-THUMBV6M-NEXT: adds r0, r1, r0 10520f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 10620f89069SBen Shi; CHECK-THUMBV6M-NEXT: .p2align 2 10720f89069SBen Shi; CHECK-THUMBV6M-NEXT: @ %bb.1: 10820f89069SBen Shi; CHECK-THUMBV6M-NEXT: .LCPI4_0: 10920f89069SBen Shi; CHECK-THUMBV6M-NEXT: .long 5719 @ 0x1657 11020f89069SBen Shi; 11120f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_add301_mul19_i32: 11220f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 11320f89069SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #5719 11420f89069SBen Shi; CHECK-THUMBV7M-NEXT: movs r2, #19 11520f89069SBen Shi; CHECK-THUMBV7M-NEXT: mla r0, r0, r2, r1 11620f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 11720f89069SBen Shi %b = add i32 %a, 301 11820f89069SBen Shi %c = mul i32 %b, 19 11920f89069SBen Shi ret i32 %c 12020f89069SBen Shi} 12120f89069SBen Shi 12220f89069SBen Shidefine i16 @fold_add301_mul19_i16(i16 %a) { 12320f89069SBen Shi; CHECK-ARMV6-LABEL: fold_add301_mul19_i16: 12420f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 12520f89069SBen Shi; CHECK-ARMV6-NEXT: mov r1, #87 12620f89069SBen Shi; CHECK-ARMV6-NEXT: mov r2, #19 12720f89069SBen Shi; CHECK-ARMV6-NEXT: orr r1, r1, #5632 12820f89069SBen Shi; CHECK-ARMV6-NEXT: mla r0, r0, r2, r1 12920f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 13020f89069SBen Shi; 13120f89069SBen Shi; CHECK-ARMV7-LABEL: fold_add301_mul19_i16: 13220f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 13320f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #5719 13420f89069SBen Shi; CHECK-ARMV7-NEXT: mov r2, #19 13520f89069SBen Shi; CHECK-ARMV7-NEXT: mla r0, r0, r2, r1 13620f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 13720f89069SBen Shi; 13820f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_add301_mul19_i16: 13920f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 14020f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #19 14120f89069SBen Shi; CHECK-THUMBV6M-NEXT: muls r1, r0, r1 14220f89069SBen Shi; CHECK-THUMBV6M-NEXT: ldr r0, .LCPI5_0 14320f89069SBen Shi; CHECK-THUMBV6M-NEXT: adds r0, r1, r0 14420f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 14520f89069SBen Shi; CHECK-THUMBV6M-NEXT: .p2align 2 14620f89069SBen Shi; CHECK-THUMBV6M-NEXT: @ %bb.1: 14720f89069SBen Shi; CHECK-THUMBV6M-NEXT: .LCPI5_0: 14820f89069SBen Shi; CHECK-THUMBV6M-NEXT: .long 5719 @ 0x1657 14920f89069SBen Shi; 15020f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_add301_mul19_i16: 15120f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 15220f89069SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #5719 15320f89069SBen Shi; CHECK-THUMBV7M-NEXT: movs r2, #19 15420f89069SBen Shi; CHECK-THUMBV7M-NEXT: mla r0, r0, r2, r1 15520f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 15620f89069SBen Shi %b = add i16 %a, 301 15720f89069SBen Shi %c = mul i16 %b, 19 15820f89069SBen Shi ret i16 %c 15920f89069SBen Shi} 16020f89069SBen Shi 16120f89069SBen Shidefine i32 @fold_sub301_mul19_i32(i32 %a) { 16220f89069SBen Shi; CHECK-ARMV6-LABEL: fold_sub301_mul19_i32: 16320f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 16420f89069SBen Shi; CHECK-ARMV6-NEXT: mvn r1, #86 16520f89069SBen Shi; CHECK-ARMV6-NEXT: mov r2, #19 16620f89069SBen Shi; CHECK-ARMV6-NEXT: sub r1, r1, #5632 16720f89069SBen Shi; CHECK-ARMV6-NEXT: mla r0, r0, r2, r1 16820f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 16920f89069SBen Shi; 17020f89069SBen Shi; CHECK-ARMV7-LABEL: fold_sub301_mul19_i32: 17120f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 17220f89069SBen Shi; CHECK-ARMV7-NEXT: mov r1, #19 17320f89069SBen Shi; CHECK-ARMV7-NEXT: mul r0, r0, r1 17420f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #5719 17520f89069SBen Shi; CHECK-ARMV7-NEXT: sub r0, r0, r1 17620f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 17720f89069SBen Shi; 17820f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_sub301_mul19_i32: 17920f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 18020f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #19 18120f89069SBen Shi; CHECK-THUMBV6M-NEXT: muls r1, r0, r1 18220f89069SBen Shi; CHECK-THUMBV6M-NEXT: ldr r0, .LCPI6_0 18320f89069SBen Shi; CHECK-THUMBV6M-NEXT: adds r0, r1, r0 18420f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 18520f89069SBen Shi; CHECK-THUMBV6M-NEXT: .p2align 2 18620f89069SBen Shi; CHECK-THUMBV6M-NEXT: @ %bb.1: 18720f89069SBen Shi; CHECK-THUMBV6M-NEXT: .LCPI6_0: 18820f89069SBen Shi; CHECK-THUMBV6M-NEXT: .long 4294961577 @ 0xffffe9a9 18920f89069SBen Shi; 19020f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_sub301_mul19_i32: 19120f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 19220f89069SBen Shi; CHECK-THUMBV7M-NEXT: movs r1, #19 19320f89069SBen Shi; CHECK-THUMBV7M-NEXT: muls r0, r1, r0 19420f89069SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #5719 19520f89069SBen Shi; CHECK-THUMBV7M-NEXT: subs r0, r0, r1 19620f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 19720f89069SBen Shi %b = add i32 %a, -301 19820f89069SBen Shi %c = mul i32 %b, 19 19920f89069SBen Shi ret i32 %c 20020f89069SBen Shi} 20120f89069SBen Shi 20220f89069SBen Shidefine i16 @fold_sub301_mul19_i16(i16 %a) { 20320f89069SBen Shi; CHECK-ARMV6-LABEL: fold_sub301_mul19_i16: 20420f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 20520f89069SBen Shi; CHECK-ARMV6-NEXT: mvn r1, #86 20620f89069SBen Shi; CHECK-ARMV6-NEXT: mov r2, #19 20720f89069SBen Shi; CHECK-ARMV6-NEXT: sub r1, r1, #5632 20820f89069SBen Shi; CHECK-ARMV6-NEXT: mla r0, r0, r2, r1 20920f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 21020f89069SBen Shi; 21120f89069SBen Shi; CHECK-ARMV7-LABEL: fold_sub301_mul19_i16: 21220f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 21320f89069SBen Shi; CHECK-ARMV7-NEXT: mov r1, #19 21420f89069SBen Shi; CHECK-ARMV7-NEXT: mul r0, r0, r1 21520f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #5719 21620f89069SBen Shi; CHECK-ARMV7-NEXT: sub r0, r0, r1 21720f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 21820f89069SBen Shi; 21920f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_sub301_mul19_i16: 22020f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 22120f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #19 22220f89069SBen Shi; CHECK-THUMBV6M-NEXT: muls r1, r0, r1 22320f89069SBen Shi; CHECK-THUMBV6M-NEXT: ldr r0, .LCPI7_0 22420f89069SBen Shi; CHECK-THUMBV6M-NEXT: adds r0, r1, r0 22520f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 22620f89069SBen Shi; CHECK-THUMBV6M-NEXT: .p2align 2 22720f89069SBen Shi; CHECK-THUMBV6M-NEXT: @ %bb.1: 22820f89069SBen Shi; CHECK-THUMBV6M-NEXT: .LCPI7_0: 22920f89069SBen Shi; CHECK-THUMBV6M-NEXT: .long 4294961577 @ 0xffffe9a9 23020f89069SBen Shi; 23120f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_sub301_mul19_i16: 23220f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 23320f89069SBen Shi; CHECK-THUMBV7M-NEXT: movs r1, #19 23420f89069SBen Shi; CHECK-THUMBV7M-NEXT: muls r0, r1, r0 23520f89069SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #5719 23620f89069SBen Shi; CHECK-THUMBV7M-NEXT: subs r0, r0, r1 23720f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 23820f89069SBen Shi %b = add i16 %a, -301 23920f89069SBen Shi %c = mul i16 %b, 19 24020f89069SBen Shi ret i16 %c 24120f89069SBen Shi} 24220f89069SBen Shi 24320f89069SBen Shidefine i32 @fold_add251_mul253_i32(i32 %a) { 24420f89069SBen Shi; CHECK-ARMV6-LABEL: fold_add251_mul253_i32: 24520f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 246*63ca9371SBen Shi; CHECK-ARMV6-NEXT: add r0, r0, #251 247*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mov r1, #253 248*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mul r0, r0, r1 24920f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 25020f89069SBen Shi; 25120f89069SBen Shi; CHECK-ARMV7-LABEL: fold_add251_mul253_i32: 25220f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 25320f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #63503 25420f89069SBen Shi; CHECK-ARMV7-NEXT: mov r2, #253 25520f89069SBen Shi; CHECK-ARMV7-NEXT: mla r0, r0, r2, r1 25620f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 25720f89069SBen Shi; 25820f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_add251_mul253_i32: 25920f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 260*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: adds r0, #251 26120f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #253 262*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: muls r0, r1, r0 26320f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 26420f89069SBen Shi; 26520f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_add251_mul253_i32: 26620f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 26720f89069SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #63503 26820f89069SBen Shi; CHECK-THUMBV7M-NEXT: movs r2, #253 26920f89069SBen Shi; CHECK-THUMBV7M-NEXT: mla r0, r0, r2, r1 27020f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 27120f89069SBen Shi %b = add i32 %a, 251 27220f89069SBen Shi %c = mul i32 %b, 253 27320f89069SBen Shi ret i32 %c 27420f89069SBen Shi} 27520f89069SBen Shi 27620f89069SBen Shidefine i16 @fold_add251_mul253_i16(i16 %a) { 27720f89069SBen Shi; CHECK-ARMV6-LABEL: fold_add251_mul253_i16: 27820f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 279*63ca9371SBen Shi; CHECK-ARMV6-NEXT: add r0, r0, #251 280*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mov r1, #253 281*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mul r0, r0, r1 28220f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 28320f89069SBen Shi; 28420f89069SBen Shi; CHECK-ARMV7-LABEL: fold_add251_mul253_i16: 28520f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 28620f89069SBen Shi; CHECK-ARMV7-NEXT: mov r1, #253 28720f89069SBen Shi; CHECK-ARMV7-NEXT: mul r0, r0, r1 28820f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #2033 28920f89069SBen Shi; CHECK-ARMV7-NEXT: sub r0, r0, r1 29020f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 29120f89069SBen Shi; 29220f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_add251_mul253_i16: 29320f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 294*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: adds r0, #251 29520f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #253 296*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: muls r0, r1, r0 29720f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 29820f89069SBen Shi; 29920f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_add251_mul253_i16: 30020f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 30120f89069SBen Shi; CHECK-THUMBV7M-NEXT: movs r1, #253 30220f89069SBen Shi; CHECK-THUMBV7M-NEXT: muls r0, r1, r0 30320f89069SBen Shi; CHECK-THUMBV7M-NEXT: subw r0, r0, #2033 30420f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 30520f89069SBen Shi %b = add i16 %a, 251 30620f89069SBen Shi %c = mul i16 %b, 253 30720f89069SBen Shi ret i16 %c 30820f89069SBen Shi} 30920f89069SBen Shi 31020f89069SBen Shidefine i32 @fold_sub251_mul253_i32(i32 %a) { 311*63ca9371SBen Shi; CHECK-ARM-LABEL: fold_sub251_mul253_i32: 312*63ca9371SBen Shi; CHECK-ARM: @ %bb.0: 313*63ca9371SBen Shi; CHECK-ARM-NEXT: sub r0, r0, #251 314*63ca9371SBen Shi; CHECK-ARM-NEXT: mov r1, #253 315*63ca9371SBen Shi; CHECK-ARM-NEXT: mul r0, r0, r1 316*63ca9371SBen Shi; CHECK-ARM-NEXT: bx lr 31720f89069SBen Shi; 318*63ca9371SBen Shi; CHECK-THUMB-LABEL: fold_sub251_mul253_i32: 319*63ca9371SBen Shi; CHECK-THUMB: @ %bb.0: 320*63ca9371SBen Shi; CHECK-THUMB-NEXT: subs r0, #251 321*63ca9371SBen Shi; CHECK-THUMB-NEXT: movs r1, #253 322*63ca9371SBen Shi; CHECK-THUMB-NEXT: muls r0, r1, r0 323*63ca9371SBen Shi; CHECK-THUMB-NEXT: bx lr 32420f89069SBen Shi %b = add i32 %a, -251 32520f89069SBen Shi %c = mul i32 %b, 253 32620f89069SBen Shi ret i32 %c 32720f89069SBen Shi} 32820f89069SBen Shi 32920f89069SBen Shidefine i16 @fold_sub251_mul253_i16(i16 %a) { 33020f89069SBen Shi; CHECK-ARMV6-LABEL: fold_sub251_mul253_i16: 33120f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 332*63ca9371SBen Shi; CHECK-ARMV6-NEXT: sub r0, r0, #251 333*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mov r1, #253 334*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mul r0, r0, r1 33520f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 33620f89069SBen Shi; 33720f89069SBen Shi; CHECK-ARMV7-LABEL: fold_sub251_mul253_i16: 33820f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 33920f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #2033 34020f89069SBen Shi; CHECK-ARMV7-NEXT: mov r2, #253 34120f89069SBen Shi; CHECK-ARMV7-NEXT: mla r0, r0, r2, r1 34220f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 34320f89069SBen Shi; 34420f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_sub251_mul253_i16: 34520f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 346*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: subs r0, #251 34720f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #253 348*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: muls r0, r1, r0 34920f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 35020f89069SBen Shi; 35120f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_sub251_mul253_i16: 35220f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 35320f89069SBen Shi; CHECK-THUMBV7M-NEXT: movs r1, #253 35420f89069SBen Shi; CHECK-THUMBV7M-NEXT: muls r0, r1, r0 35520f89069SBen Shi; CHECK-THUMBV7M-NEXT: addw r0, r0, #2033 35620f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 35720f89069SBen Shi %b = add i16 %a, -251 35820f89069SBen Shi %c = mul i16 %b, 253 35920f89069SBen Shi ret i16 %c 36020f89069SBen Shi} 36120f89069SBen Shi 36220f89069SBen Shidefine i32 @fold_add251_mul353_i32(i32 %a) { 36320f89069SBen Shi; CHECK-ARMV6-LABEL: fold_add251_mul353_i32: 36420f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 365*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mov r1, #97 366*63ca9371SBen Shi; CHECK-ARMV6-NEXT: add r0, r0, #251 367*63ca9371SBen Shi; CHECK-ARMV6-NEXT: orr r1, r1, #256 368*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mul r0, r0, r1 36920f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 37020f89069SBen Shi; 37120f89069SBen Shi; CHECK-ARMV7-LABEL: fold_add251_mul353_i32: 37220f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 373*63ca9371SBen Shi; CHECK-ARMV7-NEXT: add r0, r0, #251 374*63ca9371SBen Shi; CHECK-ARMV7-NEXT: movw r1, #353 375*63ca9371SBen Shi; CHECK-ARMV7-NEXT: mul r0, r0, r1 37620f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 37720f89069SBen Shi; 37820f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_add251_mul353_i32: 37920f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 38020f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #255 38120f89069SBen Shi; CHECK-THUMBV6M-NEXT: adds r1, #98 382*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: adds r0, #251 383*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: muls r0, r1, r0 38420f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 38520f89069SBen Shi; 38620f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_add251_mul353_i32: 38720f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 388*63ca9371SBen Shi; CHECK-THUMBV7M-NEXT: adds r0, #251 389*63ca9371SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #353 390*63ca9371SBen Shi; CHECK-THUMBV7M-NEXT: muls r0, r1, r0 39120f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 39220f89069SBen Shi %b = add i32 %a, 251 39320f89069SBen Shi %c = mul i32 %b, 353 39420f89069SBen Shi ret i32 %c 39520f89069SBen Shi} 39620f89069SBen Shi 39720f89069SBen Shidefine i16 @fold_add251_mul353_i16(i16 %a) { 39820f89069SBen Shi; CHECK-ARMV6-LABEL: fold_add251_mul353_i16: 39920f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 400*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mov r1, #97 401*63ca9371SBen Shi; CHECK-ARMV6-NEXT: add r0, r0, #251 402*63ca9371SBen Shi; CHECK-ARMV6-NEXT: orr r1, r1, #256 403*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mul r0, r0, r1 40420f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 40520f89069SBen Shi; 40620f89069SBen Shi; CHECK-ARMV7-LABEL: fold_add251_mul353_i16: 40720f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 40820f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #23067 40920f89069SBen Shi; CHECK-ARMV7-NEXT: movw r2, #353 41020f89069SBen Shi; CHECK-ARMV7-NEXT: mla r0, r0, r2, r1 41120f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 41220f89069SBen Shi; 41320f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_add251_mul353_i16: 41420f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 41520f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #255 41620f89069SBen Shi; CHECK-THUMBV6M-NEXT: adds r1, #98 417*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: adds r0, #251 418*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: muls r0, r1, r0 41920f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 42020f89069SBen Shi; 42120f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_add251_mul353_i16: 42220f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 42320f89069SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #23067 42420f89069SBen Shi; CHECK-THUMBV7M-NEXT: movw r2, #353 42520f89069SBen Shi; CHECK-THUMBV7M-NEXT: mla r0, r0, r2, r1 42620f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 42720f89069SBen Shi %b = add i16 %a, 251 42820f89069SBen Shi %c = mul i16 %b, 353 42920f89069SBen Shi ret i16 %c 43020f89069SBen Shi} 43120f89069SBen Shi 43220f89069SBen Shidefine i32 @fold_sub251_mul353_i32(i32 %a) { 43320f89069SBen Shi; CHECK-ARMV6-LABEL: fold_sub251_mul353_i32: 43420f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 435*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mov r1, #97 436*63ca9371SBen Shi; CHECK-ARMV6-NEXT: sub r0, r0, #251 437*63ca9371SBen Shi; CHECK-ARMV6-NEXT: orr r1, r1, #256 438*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mul r0, r0, r1 43920f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 44020f89069SBen Shi; 44120f89069SBen Shi; CHECK-ARMV7-LABEL: fold_sub251_mul353_i32: 44220f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 443*63ca9371SBen Shi; CHECK-ARMV7-NEXT: sub r0, r0, #251 444*63ca9371SBen Shi; CHECK-ARMV7-NEXT: movw r1, #353 445*63ca9371SBen Shi; CHECK-ARMV7-NEXT: mul r0, r0, r1 44620f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 44720f89069SBen Shi; 44820f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_sub251_mul353_i32: 44920f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 45020f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #255 45120f89069SBen Shi; CHECK-THUMBV6M-NEXT: adds r1, #98 452*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: subs r0, #251 453*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: muls r0, r1, r0 45420f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 45520f89069SBen Shi; 45620f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_sub251_mul353_i32: 45720f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 458*63ca9371SBen Shi; CHECK-THUMBV7M-NEXT: subs r0, #251 459*63ca9371SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #353 460*63ca9371SBen Shi; CHECK-THUMBV7M-NEXT: muls r0, r1, r0 46120f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 46220f89069SBen Shi %b = add i32 %a, -251 46320f89069SBen Shi %c = mul i32 %b, 353 46420f89069SBen Shi ret i32 %c 46520f89069SBen Shi} 46620f89069SBen Shi 46720f89069SBen Shidefine i16 @fold_sub251_mul353_i16(i16 %a) { 46820f89069SBen Shi; CHECK-ARMV6-LABEL: fold_sub251_mul353_i16: 46920f89069SBen Shi; CHECK-ARMV6: @ %bb.0: 470*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mov r1, #97 471*63ca9371SBen Shi; CHECK-ARMV6-NEXT: sub r0, r0, #251 472*63ca9371SBen Shi; CHECK-ARMV6-NEXT: orr r1, r1, #256 473*63ca9371SBen Shi; CHECK-ARMV6-NEXT: mul r0, r0, r1 47420f89069SBen Shi; CHECK-ARMV6-NEXT: bx lr 47520f89069SBen Shi; 47620f89069SBen Shi; CHECK-ARMV7-LABEL: fold_sub251_mul353_i16: 47720f89069SBen Shi; CHECK-ARMV7: @ %bb.0: 47820f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #353 47920f89069SBen Shi; CHECK-ARMV7-NEXT: mul r0, r0, r1 48020f89069SBen Shi; CHECK-ARMV7-NEXT: movw r1, #23067 48120f89069SBen Shi; CHECK-ARMV7-NEXT: sub r0, r0, r1 48220f89069SBen Shi; CHECK-ARMV7-NEXT: bx lr 48320f89069SBen Shi; 48420f89069SBen Shi; CHECK-THUMBV6M-LABEL: fold_sub251_mul353_i16: 48520f89069SBen Shi; CHECK-THUMBV6M: @ %bb.0: 48620f89069SBen Shi; CHECK-THUMBV6M-NEXT: movs r1, #255 48720f89069SBen Shi; CHECK-THUMBV6M-NEXT: adds r1, #98 488*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: subs r0, #251 489*63ca9371SBen Shi; CHECK-THUMBV6M-NEXT: muls r0, r1, r0 49020f89069SBen Shi; CHECK-THUMBV6M-NEXT: bx lr 49120f89069SBen Shi; 49220f89069SBen Shi; CHECK-THUMBV7M-LABEL: fold_sub251_mul353_i16: 49320f89069SBen Shi; CHECK-THUMBV7M: @ %bb.0: 49420f89069SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #353 49520f89069SBen Shi; CHECK-THUMBV7M-NEXT: muls r0, r1, r0 49620f89069SBen Shi; CHECK-THUMBV7M-NEXT: movw r1, #23067 49720f89069SBen Shi; CHECK-THUMBV7M-NEXT: subs r0, r0, r1 49820f89069SBen Shi; CHECK-THUMBV7M-NEXT: bx lr 49920f89069SBen Shi %b = add i16 %a, -251 50020f89069SBen Shi %c = mul i16 %b, 353 50120f89069SBen Shi ret i16 %c 50220f89069SBen Shi} 503