1*44201679SMatt Arsenault; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5 2*44201679SMatt Arsenault; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -passes=amdgpu-attributor %s | FileCheck %s 3*44201679SMatt Arsenault 4*44201679SMatt Arsenault@buf_shared = internal addrspace(3) global [2080 x i8] poison, align 16 5*44201679SMatt Arsenault 6*44201679SMatt Arsenault; Constant expression element may not have a pointer type and the 7*44201679SMatt Arsenault; addrspacecast may not be the toplevel operation. 8*44201679SMatt Arsenault 9*44201679SMatt Arsenault 10*44201679SMatt Arsenault; This should infer "amdgpu-no-flat-scratch-init". It should not infer "amdgpu-no-queue-ptr" 11*44201679SMatt Arsenault;. 12*44201679SMatt Arsenault; CHECK: @buf_shared = internal addrspace(3) global [2080 x i8] poison, align 16 13*44201679SMatt Arsenault; CHECK: @buf_private = internal addrspace(5) global [2080 x i8] poison, align 16 14*44201679SMatt Arsenault;. 15*44201679SMatt Arsenaultdefine amdgpu_kernel void @issue120256(ptr addrspace(1) %out) { 16*44201679SMatt Arsenault; CHECK-LABEL: define amdgpu_kernel void @issue120256( 17*44201679SMatt Arsenault; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0:[0-9]+]] { 18*44201679SMatt Arsenault; CHECK-NEXT: [[CONV_I:%.*]] = and i32 trunc (i64 sub (i64 16, i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @buf_shared to ptr) to i64)) to i32), 15 19*44201679SMatt Arsenault; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(3) @buf_shared, i32 [[CONV_I]] 20*44201679SMatt Arsenault; CHECK-NEXT: [[LD:%.*]] = load i8, ptr addrspace(3) [[ADD_PTR]], align 1 21*44201679SMatt Arsenault; CHECK-NEXT: store i8 [[LD]], ptr addrspace(1) [[OUT]], align 1 22*44201679SMatt Arsenault; CHECK-NEXT: ret void 23*44201679SMatt Arsenault; 24*44201679SMatt Arsenault %conv.i = and i32 trunc (i64 sub (i64 16, i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @buf_shared to ptr) to i64)) to i32), 15 25*44201679SMatt Arsenault %add.ptr = getelementptr inbounds nuw i8, ptr addrspace(3) @buf_shared, i32 %conv.i 26*44201679SMatt Arsenault %ld = load i8, ptr addrspace(3) %add.ptr, align 1 27*44201679SMatt Arsenault store i8 %ld, ptr addrspace(1) %out, align 1 28*44201679SMatt Arsenault ret void 29*44201679SMatt Arsenault} 30*44201679SMatt Arsenault 31*44201679SMatt Arsenault@buf_private = internal addrspace(5) global [2080 x i8] poison, align 16 32*44201679SMatt Arsenault 33*44201679SMatt Arsenault; Constant expression element may not have a pointer type and the 34*44201679SMatt Arsenault; addrspacecast may not be the toplevel operation. 35*44201679SMatt Arsenault 36*44201679SMatt Arsenault; This should not infer "amdgpu-no-flat-scratch-init" nor "amdgpu-no-queue-ptr" 37*44201679SMatt Arsenaultdefine amdgpu_kernel void @issue120256_private(ptr addrspace(1) %out) { 38*44201679SMatt Arsenault; CHECK-LABEL: define amdgpu_kernel void @issue120256_private( 39*44201679SMatt Arsenault; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR1:[0-9]+]] { 40*44201679SMatt Arsenault; CHECK-NEXT: [[CONV_I:%.*]] = and i32 trunc (i64 sub (i64 16, i64 ptrtoint (ptr addrspacecast (ptr addrspace(5) @buf_private to ptr) to i64)) to i32), 15 41*44201679SMatt Arsenault; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(5) @buf_private, i32 [[CONV_I]] 42*44201679SMatt Arsenault; CHECK-NEXT: [[LD:%.*]] = load i8, ptr addrspace(5) [[ADD_PTR]], align 1 43*44201679SMatt Arsenault; CHECK-NEXT: store i8 [[LD]], ptr addrspace(1) [[OUT]], align 1 44*44201679SMatt Arsenault; CHECK-NEXT: ret void 45*44201679SMatt Arsenault; 46*44201679SMatt Arsenault %conv.i = and i32 trunc (i64 sub (i64 16, i64 ptrtoint (ptr addrspacecast (ptr addrspace(5) @buf_private to ptr) to i64)) to i32), 15 47*44201679SMatt Arsenault %add.ptr = getelementptr inbounds nuw i8, ptr addrspace(5) @buf_private, i32 %conv.i 48*44201679SMatt Arsenault %ld = load i8, ptr addrspace(5) %add.ptr, align 1 49*44201679SMatt Arsenault store i8 %ld, ptr addrspace(1) %out, align 1 50*44201679SMatt Arsenault ret void 51*44201679SMatt Arsenault} 52*44201679SMatt Arsenault 53*44201679SMatt Arsenault!llvm.module.flags = !{!0} 54*44201679SMatt Arsenault 55*44201679SMatt Arsenault; FIXME: Inference of amdgpu-no-queue-ptr should not depend on code object version. 56*44201679SMatt Arsenault!0 = !{i32 1, !"amdhsa_code_object_version", i32 400} 57*44201679SMatt Arsenault;. 58*44201679SMatt Arsenault; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx803" "uniform-work-group-size"="false" } 59*44201679SMatt Arsenault; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx803" "uniform-work-group-size"="false" } 60*44201679SMatt Arsenault;. 61*44201679SMatt Arsenault; CHECK: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 400} 62*44201679SMatt Arsenault;. 63