1*35ebd92dSJay Foad; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4 2*35ebd92dSJay Foad; RUN: llc -global-isel -mtriple=amdgcn -verify-machineinstrs -stop-after=irtranslator < %s | FileCheck %s 3*35ebd92dSJay Foad 4*35ebd92dSJay Foaddefine void @prefetch_read(ptr %ptr) { 5*35ebd92dSJay Foad ; CHECK-LABEL: name: prefetch_read 6*35ebd92dSJay Foad ; CHECK: bb.1 (%ir-block.0): 7*35ebd92dSJay Foad ; CHECK-NEXT: liveins: $vgpr0, $vgpr1 8*35ebd92dSJay Foad ; CHECK-NEXT: {{ $}} 9*35ebd92dSJay Foad ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 10*35ebd92dSJay Foad ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 11*35ebd92dSJay Foad ; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32) 12*35ebd92dSJay Foad ; CHECK-NEXT: G_PREFETCH [[MV]](p0), 0, 0, 0 :: (load unknown-size from %ir.ptr, align 1) 13*35ebd92dSJay Foad ; CHECK-NEXT: SI_RETURN 14*35ebd92dSJay Foad call void @llvm.prefetch.p0(ptr %ptr, i32 0, i32 0, i32 0) 15*35ebd92dSJay Foad ret void 16*35ebd92dSJay Foad} 17*35ebd92dSJay Foad 18*35ebd92dSJay Foaddefine void @prefetch_write(ptr %ptr) { 19*35ebd92dSJay Foad ; CHECK-LABEL: name: prefetch_write 20*35ebd92dSJay Foad ; CHECK: bb.1 (%ir-block.0): 21*35ebd92dSJay Foad ; CHECK-NEXT: liveins: $vgpr0, $vgpr1 22*35ebd92dSJay Foad ; CHECK-NEXT: {{ $}} 23*35ebd92dSJay Foad ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 24*35ebd92dSJay Foad ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 25*35ebd92dSJay Foad ; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32) 26*35ebd92dSJay Foad ; CHECK-NEXT: G_PREFETCH [[MV]](p0), 1, 1, 1 :: (store unknown-size into %ir.ptr, align 1) 27*35ebd92dSJay Foad ; CHECK-NEXT: SI_RETURN 28*35ebd92dSJay Foad call void @llvm.prefetch.p0(ptr %ptr, i32 1, i32 1, i32 1) 29*35ebd92dSJay Foad ret void 30*35ebd92dSJay Foad} 31*35ebd92dSJay Foad 32*35ebd92dSJay Foaddeclare void @llvm.prefetch.p0(ptr, i32, i32, i32) 33