xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll (revision e7900e695e7dfb36be8651d914a31f42a5d6c634) 
148968c47SPetar Avramovic; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
29e9907f1SFangrui Song; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx908 -verify-machineinstrs -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX908_GFX11 %s
39e9907f1SFangrui Song; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx90a -verify-machineinstrs -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX90A_GFX940 %s
49e9907f1SFangrui Song; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx940 -verify-machineinstrs -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX90A_GFX940 %s
59e9907f1SFangrui Song; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX908_GFX11 %s
69e9907f1SFangrui Song; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX12 %s
748968c47SPetar Avramovic
848968c47SPetar Avramovicdefine amdgpu_ps void @buffer_atomic_fadd_f32_offset_no_rtn(float %val, <4 x i32> inreg %rsrc, i32 inreg %soffset) {
948968c47SPetar Avramovic  ; GFX908_GFX11-LABEL: name: buffer_atomic_fadd_f32_offset_no_rtn
1048968c47SPetar Avramovic  ; GFX908_GFX11: bb.1 (%ir-block.0):
1148968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0
1248968c47SPetar Avramovic  ; GFX908_GFX11-NEXT: {{  $}}
1348968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
1448968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
1548968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
1648968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
1748968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
1848968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
1948968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr4
20f0415f2aSKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   BUFFER_ATOMIC_ADD_F32_OFFSET [[COPY]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
2148968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   S_ENDPGM 0
22*e7900e69SMatt Arsenault  ;
2348968c47SPetar Avramovic  ; GFX90A_GFX940-LABEL: name: buffer_atomic_fadd_f32_offset_no_rtn
2448968c47SPetar Avramovic  ; GFX90A_GFX940: bb.1 (%ir-block.0):
2548968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0
2648968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT: {{  $}}
2748968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
2848968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
2948968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
3048968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
3148968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
3248968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
3348968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr4
34f0415f2aSKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   BUFFER_ATOMIC_ADD_F32_OFFSET [[COPY]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
3548968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   S_ENDPGM 0
36*e7900e69SMatt Arsenault  ;
375879162fSMirko Brkušanin  ; GFX12-LABEL: name: buffer_atomic_fadd_f32_offset_no_rtn
385879162fSMirko Brkušanin  ; GFX12: bb.1 (%ir-block.0):
395879162fSMirko Brkušanin  ; GFX12-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0
405879162fSMirko Brkušanin  ; GFX12-NEXT: {{  $}}
415879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
425879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
435879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
445879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
455879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
465879162fSMirko Brkušanin  ; GFX12-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
475879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr4
485879162fSMirko Brkušanin  ; GFX12-NEXT:   BUFFER_ATOMIC_ADD_F32_VBUFFER_OFFSET [[COPY]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
495879162fSMirko Brkušanin  ; GFX12-NEXT:   S_ENDPGM 0
5048968c47SPetar Avramovic  %ret = call float @llvm.amdgcn.raw.buffer.atomic.fadd.f32(float %val, <4 x i32> %rsrc, i32 0, i32 %soffset, i32 0)
5148968c47SPetar Avramovic  ret void
5248968c47SPetar Avramovic}
5348968c47SPetar Avramovic
5448968c47SPetar Avramovicdefine amdgpu_ps void @buffer_atomic_fadd_f32_offen_no_rtn(float %val, <4 x i32> inreg %rsrc, i32 %voffset, i32 inreg %soffset) {
5548968c47SPetar Avramovic  ; GFX908_GFX11-LABEL: name: buffer_atomic_fadd_f32_offen_no_rtn
5648968c47SPetar Avramovic  ; GFX908_GFX11: bb.1 (%ir-block.0):
5748968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
5848968c47SPetar Avramovic  ; GFX908_GFX11-NEXT: {{  $}}
5948968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
6048968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
6148968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
6248968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
6348968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
6448968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
6548968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
6648968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
67f0415f2aSKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   BUFFER_ATOMIC_ADD_F32_OFFEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
6848968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   S_ENDPGM 0
69*e7900e69SMatt Arsenault  ;
7048968c47SPetar Avramovic  ; GFX90A_GFX940-LABEL: name: buffer_atomic_fadd_f32_offen_no_rtn
7148968c47SPetar Avramovic  ; GFX90A_GFX940: bb.1 (%ir-block.0):
7248968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
7348968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT: {{  $}}
7448968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
7548968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
7648968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
7748968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
7848968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
7948968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
8048968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
8148968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
82f0415f2aSKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   BUFFER_ATOMIC_ADD_F32_OFFEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
8348968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   S_ENDPGM 0
84*e7900e69SMatt Arsenault  ;
855879162fSMirko Brkušanin  ; GFX12-LABEL: name: buffer_atomic_fadd_f32_offen_no_rtn
865879162fSMirko Brkušanin  ; GFX12: bb.1 (%ir-block.0):
875879162fSMirko Brkušanin  ; GFX12-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
885879162fSMirko Brkušanin  ; GFX12-NEXT: {{  $}}
895879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
905879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
915879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
925879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
935879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
945879162fSMirko Brkušanin  ; GFX12-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
955879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
965879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
975879162fSMirko Brkušanin  ; GFX12-NEXT:   BUFFER_ATOMIC_ADD_F32_VBUFFER_OFFEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
985879162fSMirko Brkušanin  ; GFX12-NEXT:   S_ENDPGM 0
9948968c47SPetar Avramovic  %ret = call float @llvm.amdgcn.raw.buffer.atomic.fadd.f32(float %val, <4 x i32> %rsrc, i32 %voffset, i32 %soffset, i32 0)
10048968c47SPetar Avramovic  ret void
10148968c47SPetar Avramovic}
10248968c47SPetar Avramovic
10348968c47SPetar Avramovicdefine amdgpu_ps void @buffer_atomic_fadd_f32_idxen_no_rtn(float %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 inreg %soffset) {
10448968c47SPetar Avramovic  ; GFX908_GFX11-LABEL: name: buffer_atomic_fadd_f32_idxen_no_rtn
10548968c47SPetar Avramovic  ; GFX908_GFX11: bb.1 (%ir-block.0):
10648968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
10748968c47SPetar Avramovic  ; GFX908_GFX11-NEXT: {{  $}}
10848968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
10948968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
11048968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
11148968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
11248968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
11348968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
11448968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
11548968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
116f0415f2aSKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   BUFFER_ATOMIC_ADD_F32_IDXEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
11748968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   S_ENDPGM 0
118*e7900e69SMatt Arsenault  ;
11948968c47SPetar Avramovic  ; GFX90A_GFX940-LABEL: name: buffer_atomic_fadd_f32_idxen_no_rtn
12048968c47SPetar Avramovic  ; GFX90A_GFX940: bb.1 (%ir-block.0):
12148968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
12248968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT: {{  $}}
12348968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
12448968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
12548968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
12648968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
12748968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
12848968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
12948968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
13048968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
131f0415f2aSKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   BUFFER_ATOMIC_ADD_F32_IDXEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
13248968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   S_ENDPGM 0
133*e7900e69SMatt Arsenault  ;
1345879162fSMirko Brkušanin  ; GFX12-LABEL: name: buffer_atomic_fadd_f32_idxen_no_rtn
1355879162fSMirko Brkušanin  ; GFX12: bb.1 (%ir-block.0):
1365879162fSMirko Brkušanin  ; GFX12-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
1375879162fSMirko Brkušanin  ; GFX12-NEXT: {{  $}}
1385879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
1395879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
1405879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
1415879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
1425879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
1435879162fSMirko Brkušanin  ; GFX12-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
1445879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
1455879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
1465879162fSMirko Brkušanin  ; GFX12-NEXT:   BUFFER_ATOMIC_ADD_F32_VBUFFER_IDXEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
1475879162fSMirko Brkušanin  ; GFX12-NEXT:   S_ENDPGM 0
14848968c47SPetar Avramovic  %ret = call float @llvm.amdgcn.struct.buffer.atomic.fadd.f32(float %val, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 %soffset, i32 0)
14948968c47SPetar Avramovic  ret void
15048968c47SPetar Avramovic}
15148968c47SPetar Avramovic
15248968c47SPetar Avramovicdefine amdgpu_ps void @buffer_atomic_fadd_f32_bothen_no_rtn(float %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) {
15348968c47SPetar Avramovic  ; GFX908_GFX11-LABEL: name: buffer_atomic_fadd_f32_bothen_no_rtn
15448968c47SPetar Avramovic  ; GFX908_GFX11: bb.1 (%ir-block.0):
15548968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1, $vgpr2
15648968c47SPetar Avramovic  ; GFX908_GFX11-NEXT: {{  $}}
15748968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
15848968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
15948968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
16048968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
16148968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
16248968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
16348968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
16448968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY6:%[0-9]+]]:vgpr_32 = COPY $vgpr2
16548968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[COPY7:%[0-9]+]]:sreg_32 = COPY $sgpr4
16648968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY6]], %subreg.sub1
167f0415f2aSKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   BUFFER_ATOMIC_ADD_F32_BOTHEN [[COPY]], [[REG_SEQUENCE1]], [[REG_SEQUENCE]], [[COPY7]], 0, 2, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
16848968c47SPetar Avramovic  ; GFX908_GFX11-NEXT:   S_ENDPGM 0
169*e7900e69SMatt Arsenault  ;
17048968c47SPetar Avramovic  ; GFX90A_GFX940-LABEL: name: buffer_atomic_fadd_f32_bothen_no_rtn
17148968c47SPetar Avramovic  ; GFX90A_GFX940: bb.1 (%ir-block.0):
17248968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1, $vgpr2
17348968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT: {{  $}}
17448968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
17548968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
17648968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
17748968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
17848968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
17948968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
18048968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
18148968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY6:%[0-9]+]]:vgpr_32 = COPY $vgpr2
18248968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[COPY7:%[0-9]+]]:sreg_32 = COPY $sgpr4
18348968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY6]], %subreg.sub1
184f0415f2aSKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   BUFFER_ATOMIC_ADD_F32_BOTHEN [[COPY]], [[REG_SEQUENCE1]], [[REG_SEQUENCE]], [[COPY7]], 0, 2, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
18548968c47SPetar Avramovic  ; GFX90A_GFX940-NEXT:   S_ENDPGM 0
186*e7900e69SMatt Arsenault  ;
1875879162fSMirko Brkušanin  ; GFX12-LABEL: name: buffer_atomic_fadd_f32_bothen_no_rtn
1885879162fSMirko Brkušanin  ; GFX12: bb.1 (%ir-block.0):
1895879162fSMirko Brkušanin  ; GFX12-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1, $vgpr2
1905879162fSMirko Brkušanin  ; GFX12-NEXT: {{  $}}
1915879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
1925879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
1935879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
1945879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
1955879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
1965879162fSMirko Brkušanin  ; GFX12-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
1975879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
1985879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY6:%[0-9]+]]:vgpr_32 = COPY $vgpr2
1995879162fSMirko Brkušanin  ; GFX12-NEXT:   [[COPY7:%[0-9]+]]:sreg_32 = COPY $sgpr4
2005879162fSMirko Brkušanin  ; GFX12-NEXT:   [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY6]], %subreg.sub1
2015879162fSMirko Brkušanin  ; GFX12-NEXT:   BUFFER_ATOMIC_ADD_F32_VBUFFER_BOTHEN [[COPY]], [[REG_SEQUENCE1]], [[REG_SEQUENCE]], [[COPY7]], 0, 2, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
2025879162fSMirko Brkušanin  ; GFX12-NEXT:   S_ENDPGM 0
20348968c47SPetar Avramovic  %ret = call float @llvm.amdgcn.struct.buffer.atomic.fadd.f32(float %val, <4 x i32> %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 2)
20448968c47SPetar Avramovic  ret void
20548968c47SPetar Avramovic}
20648968c47SPetar Avramovic
207faa2c678SKrzysztof Drewniakdefine amdgpu_ps void @buffer_ptr_atomic_fadd_f32_offset_no_rtn(float %val, ptr addrspace(8) inreg %rsrc, i32 inreg %soffset) {
208faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-LABEL: name: buffer_ptr_atomic_fadd_f32_offset_no_rtn
209faa2c678SKrzysztof Drewniak  ; GFX908_GFX11: bb.1 (%ir-block.0):
210faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0
211faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT: {{  $}}
212faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
213faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
214faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
215faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
216faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
217faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr4
218faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
219ab379378SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   BUFFER_ATOMIC_ADD_F32_OFFSET [[COPY]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
220faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   S_ENDPGM 0
221*e7900e69SMatt Arsenault  ;
222faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-LABEL: name: buffer_ptr_atomic_fadd_f32_offset_no_rtn
223faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940: bb.1 (%ir-block.0):
224faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0
225faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT: {{  $}}
226faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
227faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
228faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
229faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
230faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
231faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr4
232faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
233ab379378SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   BUFFER_ATOMIC_ADD_F32_OFFSET [[COPY]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
234faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   S_ENDPGM 0
235*e7900e69SMatt Arsenault  ;
236*e7900e69SMatt Arsenault  ; GFX12-LABEL: name: buffer_ptr_atomic_fadd_f32_offset_no_rtn
237*e7900e69SMatt Arsenault  ; GFX12: bb.1 (%ir-block.0):
238*e7900e69SMatt Arsenault  ; GFX12-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0
239*e7900e69SMatt Arsenault  ; GFX12-NEXT: {{  $}}
240*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
241*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
242*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
243*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
244*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
245*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr4
246*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
247*e7900e69SMatt Arsenault  ; GFX12-NEXT:   BUFFER_ATOMIC_ADD_F32_VBUFFER_OFFSET [[COPY]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
248*e7900e69SMatt Arsenault  ; GFX12-NEXT:   S_ENDPGM 0
249faa2c678SKrzysztof Drewniak  %ret = call float @llvm.amdgcn.raw.ptr.buffer.atomic.fadd.f32(float %val, ptr addrspace(8) %rsrc, i32 0, i32 %soffset, i32 0)
250faa2c678SKrzysztof Drewniak  ret void
251faa2c678SKrzysztof Drewniak}
252faa2c678SKrzysztof Drewniak
253faa2c678SKrzysztof Drewniakdefine amdgpu_ps void @buffer_ptr_atomic_fadd_f32_offen_no_rtn(float %val, ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) {
254faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-LABEL: name: buffer_ptr_atomic_fadd_f32_offen_no_rtn
255faa2c678SKrzysztof Drewniak  ; GFX908_GFX11: bb.1 (%ir-block.0):
256faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
257faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT: {{  $}}
258faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
259faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
260faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
261faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
262faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
263faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
264faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
265faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
266ab379378SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   BUFFER_ATOMIC_ADD_F32_OFFEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
267faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   S_ENDPGM 0
268*e7900e69SMatt Arsenault  ;
269faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-LABEL: name: buffer_ptr_atomic_fadd_f32_offen_no_rtn
270faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940: bb.1 (%ir-block.0):
271faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
272faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT: {{  $}}
273faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
274faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
275faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
276faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
277faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
278faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
279faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
280faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
281ab379378SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   BUFFER_ATOMIC_ADD_F32_OFFEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
282faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   S_ENDPGM 0
283*e7900e69SMatt Arsenault  ;
284*e7900e69SMatt Arsenault  ; GFX12-LABEL: name: buffer_ptr_atomic_fadd_f32_offen_no_rtn
285*e7900e69SMatt Arsenault  ; GFX12: bb.1 (%ir-block.0):
286*e7900e69SMatt Arsenault  ; GFX12-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
287*e7900e69SMatt Arsenault  ; GFX12-NEXT: {{  $}}
288*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
289*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
290*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
291*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
292*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
293*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
294*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
295*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
296*e7900e69SMatt Arsenault  ; GFX12-NEXT:   BUFFER_ATOMIC_ADD_F32_VBUFFER_OFFEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
297*e7900e69SMatt Arsenault  ; GFX12-NEXT:   S_ENDPGM 0
298faa2c678SKrzysztof Drewniak  %ret = call float @llvm.amdgcn.raw.ptr.buffer.atomic.fadd.f32(float %val, ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0)
299faa2c678SKrzysztof Drewniak  ret void
300faa2c678SKrzysztof Drewniak}
301faa2c678SKrzysztof Drewniak
302faa2c678SKrzysztof Drewniakdefine amdgpu_ps void @buffer_ptr_atomic_fadd_f32_idxen_no_rtn(float %val, ptr addrspace(8) inreg %rsrc, i32 %vindex, i32 inreg %soffset) {
303faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-LABEL: name: buffer_ptr_atomic_fadd_f32_idxen_no_rtn
304faa2c678SKrzysztof Drewniak  ; GFX908_GFX11: bb.1 (%ir-block.0):
305faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
306faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT: {{  $}}
307faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
308faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
309faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
310faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
311faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
312faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
313faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
314faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
315ab379378SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   BUFFER_ATOMIC_ADD_F32_IDXEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
316faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   S_ENDPGM 0
317*e7900e69SMatt Arsenault  ;
318faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-LABEL: name: buffer_ptr_atomic_fadd_f32_idxen_no_rtn
319faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940: bb.1 (%ir-block.0):
320faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
321faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT: {{  $}}
322faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
323faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
324faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
325faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
326faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
327faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
328faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
329faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
330ab379378SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   BUFFER_ATOMIC_ADD_F32_IDXEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
331faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   S_ENDPGM 0
332*e7900e69SMatt Arsenault  ;
333*e7900e69SMatt Arsenault  ; GFX12-LABEL: name: buffer_ptr_atomic_fadd_f32_idxen_no_rtn
334*e7900e69SMatt Arsenault  ; GFX12: bb.1 (%ir-block.0):
335*e7900e69SMatt Arsenault  ; GFX12-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1
336*e7900e69SMatt Arsenault  ; GFX12-NEXT: {{  $}}
337*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
338*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
339*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
340*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
341*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
342*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
343*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY6:%[0-9]+]]:sreg_32 = COPY $sgpr4
344*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
345*e7900e69SMatt Arsenault  ; GFX12-NEXT:   BUFFER_ATOMIC_ADD_F32_VBUFFER_IDXEN [[COPY]], [[COPY5]], [[REG_SEQUENCE]], [[COPY6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
346*e7900e69SMatt Arsenault  ; GFX12-NEXT:   S_ENDPGM 0
347faa2c678SKrzysztof Drewniak  %ret = call float @llvm.amdgcn.struct.ptr.buffer.atomic.fadd.f32(float %val, ptr addrspace(8) %rsrc, i32 %vindex, i32 0, i32 %soffset, i32 0)
348faa2c678SKrzysztof Drewniak  ret void
349faa2c678SKrzysztof Drewniak}
350faa2c678SKrzysztof Drewniak
351faa2c678SKrzysztof Drewniakdefine amdgpu_ps void @buffer_ptr_atomic_fadd_f32_bothen_no_rtn(float %val, ptr addrspace(8) inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) {
352faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-LABEL: name: buffer_ptr_atomic_fadd_f32_bothen_no_rtn
353faa2c678SKrzysztof Drewniak  ; GFX908_GFX11: bb.1 (%ir-block.0):
354faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1, $vgpr2
355faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT: {{  $}}
356faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
357faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
358faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
359faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
360faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
361faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
362faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY6:%[0-9]+]]:vgpr_32 = COPY $vgpr2
363faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[COPY7:%[0-9]+]]:sreg_32 = COPY $sgpr4
364faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
365faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY6]], %subreg.sub1
366ab379378SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   BUFFER_ATOMIC_ADD_F32_BOTHEN [[COPY]], [[REG_SEQUENCE1]], [[REG_SEQUENCE]], [[COPY7]], 0, 2, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
367faa2c678SKrzysztof Drewniak  ; GFX908_GFX11-NEXT:   S_ENDPGM 0
368*e7900e69SMatt Arsenault  ;
369faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-LABEL: name: buffer_ptr_atomic_fadd_f32_bothen_no_rtn
370faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940: bb.1 (%ir-block.0):
371faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1, $vgpr2
372faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT: {{  $}}
373faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
374faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
375faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
376faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
377faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
378faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
379faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY6:%[0-9]+]]:vgpr_32 = COPY $vgpr2
380faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[COPY7:%[0-9]+]]:sreg_32 = COPY $sgpr4
381faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
382faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY6]], %subreg.sub1
383ab379378SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   BUFFER_ATOMIC_ADD_F32_BOTHEN [[COPY]], [[REG_SEQUENCE1]], [[REG_SEQUENCE]], [[COPY7]], 0, 2, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
384faa2c678SKrzysztof Drewniak  ; GFX90A_GFX940-NEXT:   S_ENDPGM 0
385*e7900e69SMatt Arsenault  ;
386*e7900e69SMatt Arsenault  ; GFX12-LABEL: name: buffer_ptr_atomic_fadd_f32_bothen_no_rtn
387*e7900e69SMatt Arsenault  ; GFX12: bb.1 (%ir-block.0):
388*e7900e69SMatt Arsenault  ; GFX12-NEXT:   liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $vgpr0, $vgpr1, $vgpr2
389*e7900e69SMatt Arsenault  ; GFX12-NEXT: {{  $}}
390*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
391*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
392*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1
393*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr2
394*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr3
395*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1
396*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY6:%[0-9]+]]:vgpr_32 = COPY $vgpr2
397*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[COPY7:%[0-9]+]]:sreg_32 = COPY $sgpr4
398*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY4]], %subreg.sub3
399*e7900e69SMatt Arsenault  ; GFX12-NEXT:   [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY6]], %subreg.sub1
400*e7900e69SMatt Arsenault  ; GFX12-NEXT:   BUFFER_ATOMIC_ADD_F32_VBUFFER_BOTHEN [[COPY]], [[REG_SEQUENCE1]], [[REG_SEQUENCE]], [[COPY7]], 0, 2, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.rsrc, align 1, addrspace 8)
401*e7900e69SMatt Arsenault  ; GFX12-NEXT:   S_ENDPGM 0
402faa2c678SKrzysztof Drewniak  %ret = call float @llvm.amdgcn.struct.ptr.buffer.atomic.fadd.f32(float %val, ptr addrspace(8) %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 2)
403faa2c678SKrzysztof Drewniak  ret void
404faa2c678SKrzysztof Drewniak}
405faa2c678SKrzysztof Drewniak
40648968c47SPetar Avramovicdeclare float @llvm.amdgcn.raw.buffer.atomic.fadd.f32(float, <4 x i32>, i32, i32, i32 immarg)
40748968c47SPetar Avramovicdeclare float @llvm.amdgcn.struct.buffer.atomic.fadd.f32(float, <4 x i32>, i32, i32, i32, i32 immarg)
408faa2c678SKrzysztof Drewniak
409faa2c678SKrzysztof Drewniakdeclare float @llvm.amdgcn.raw.ptr.buffer.atomic.fadd.f32(float, ptr addrspace(8), i32, i32, i32 immarg)
410faa2c678SKrzysztof Drewniakdeclare float @llvm.amdgcn.struct.ptr.buffer.atomic.fadd.f32(float, ptr addrspace(8), i32, i32, i32, i32 immarg)
411