1785eddd7Ssstipanovic; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2785eddd7Ssstipanovic; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GPRIDX %s 3785eddd7Ssstipanovic; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MOVREL %s 4785eddd7Ssstipanovic; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s 5785eddd7Ssstipanovic; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10PLUS,GFX11 %s 6785eddd7Ssstipanovicdefine void @main(<19 x i32> %arg) { 7785eddd7Ssstipanovic; GCN-LABEL: main: 8785eddd7Ssstipanovic; GCN: ; %bb.0: ; %bb 9785eddd7Ssstipanovic; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 10785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s4, 0 11785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s12, s4 12785eddd7Ssstipanovic; GCN-NEXT: v_cmp_eq_u16_e32 vcc, 0, v0 13785eddd7Ssstipanovic; GCN-NEXT: v_mov_b32_e32 v1, 0 14785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s13, s4 15785eddd7Ssstipanovic; GCN-NEXT: v_mov_b32_e32 v4, s12 16785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s5, s4 17785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s6, s4 18785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s7, s4 19785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s8, s4 20785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s9, s4 21785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s10, s4 22785eddd7Ssstipanovic; GCN-NEXT: s_mov_b32 s11, s4 23785eddd7Ssstipanovic; GCN-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc 24785eddd7Ssstipanovic; GCN-NEXT: v_mov_b32_e32 v2, v1 25785eddd7Ssstipanovic; GCN-NEXT: v_mov_b32_e32 v3, v1 26785eddd7Ssstipanovic; GCN-NEXT: v_mov_b32_e32 v5, s13 27785eddd7Ssstipanovic; GCN-NEXT: image_store v[0:3], v[4:5], s[4:11] unorm 28785eddd7Ssstipanovic; GCN-NEXT: s_waitcnt vmcnt(0) 29785eddd7Ssstipanovic; GCN-NEXT: s_setpc_b64 s[30:31] 30785eddd7Ssstipanovic; 31785eddd7Ssstipanovic; GFX10-LABEL: main: 32785eddd7Ssstipanovic; GFX10: ; %bb.0: ; %bb 33785eddd7Ssstipanovic; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 34785eddd7Ssstipanovic; GFX10-NEXT: v_mov_b32_e32 v1, 0 35785eddd7Ssstipanovic; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v0 36*b3995aa3SJay Foad; GFX10-NEXT: s_mov_b32 s4, 0 37*b3995aa3SJay Foad; GFX10-NEXT: s_mov_b32 s5, s4 38785eddd7Ssstipanovic; GFX10-NEXT: v_mov_b32_e32 v2, v1 39785eddd7Ssstipanovic; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo 40785eddd7Ssstipanovic; GFX10-NEXT: v_mov_b32_e32 v3, v1 41785eddd7Ssstipanovic; GFX10-NEXT: s_mov_b32 s6, s4 42785eddd7Ssstipanovic; GFX10-NEXT: s_mov_b32 s7, s4 43785eddd7Ssstipanovic; GFX10-NEXT: s_mov_b32 s8, s4 44785eddd7Ssstipanovic; GFX10-NEXT: s_mov_b32 s9, s4 45*b3995aa3SJay Foad; GFX10-NEXT: s_mov_b32 s10, s4 46*b3995aa3SJay Foad; GFX10-NEXT: s_mov_b32 s11, s4 47*b3995aa3SJay Foad; GFX10-NEXT: image_store v[0:3], [v1, v1], s[4:11] dim:SQ_RSRC_IMG_2D unorm 48785eddd7Ssstipanovic; GFX10-NEXT: s_setpc_b64 s[30:31] 49785eddd7Ssstipanovic; 50785eddd7Ssstipanovic; GFX11-LABEL: main: 51785eddd7Ssstipanovic; GFX11: ; %bb.0: ; %bb 52785eddd7Ssstipanovic; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 53*b3995aa3SJay Foad; GFX11-NEXT: v_mov_b32_e32 v1, 0 54785eddd7Ssstipanovic; GFX11-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v0 55*b3995aa3SJay Foad; GFX11-NEXT: s_mov_b32 s0, 0 56785eddd7Ssstipanovic; GFX11-NEXT: s_mov_b32 s1, s0 57785eddd7Ssstipanovic; GFX11-NEXT: v_mov_b32_e32 v2, v1 58*b3995aa3SJay Foad; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo 59785eddd7Ssstipanovic; GFX11-NEXT: v_mov_b32_e32 v3, v1 60785eddd7Ssstipanovic; GFX11-NEXT: s_mov_b32 s2, s0 61785eddd7Ssstipanovic; GFX11-NEXT: s_mov_b32 s3, s0 62785eddd7Ssstipanovic; GFX11-NEXT: s_mov_b32 s4, s0 63785eddd7Ssstipanovic; GFX11-NEXT: s_mov_b32 s5, s0 64*b3995aa3SJay Foad; GFX11-NEXT: s_mov_b32 s6, s0 65*b3995aa3SJay Foad; GFX11-NEXT: s_mov_b32 s7, s0 66*b3995aa3SJay Foad; GFX11-NEXT: image_store v[0:3], [v1, v1], s[0:7] dim:SQ_RSRC_IMG_2D unorm 67785eddd7Ssstipanovic; GFX11-NEXT: s_setpc_b64 s[30:31] 68785eddd7Ssstipanovicbb: 69785eddd7Ssstipanovic %i = bitcast <19 x i32> %arg to <38 x i16> 70785eddd7Ssstipanovic %i1 = extractelement <38 x i16> %i, i64 0 71785eddd7Ssstipanovic %i2 = icmp eq i16 %i1, 0 72785eddd7Ssstipanovic %i3 = zext i1 %i2 to i32 73785eddd7Ssstipanovic %i4 = bitcast i32 %i3 to float 74785eddd7Ssstipanovic %i5 = insertelement <4 x float> zeroinitializer, float %i4, i64 0 75785eddd7Ssstipanovic call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %i5, i32 0, i32 0, i32 0, <8 x i32> zeroinitializer, i32 0, i32 0) 76785eddd7Ssstipanovic ret void 77785eddd7Ssstipanovic} 78785eddd7Ssstipanovicdeclare void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float>, i32 immarg, i32, i32, <8 x i32>, i32 immarg, i32 immarg) 79785eddd7Ssstipanovic;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 80785eddd7Ssstipanovic; GFX10PLUS: {{.*}} 81785eddd7Ssstipanovic; GPRIDX: {{.*}} 82785eddd7Ssstipanovic; MOVREL: {{.*}} 83