xref: /llvm-project/llvm/test/CodeGen/AArch64/sext.ll (revision 61510b51c33464a6bc15e4cf5b1ee07e2e0ec1c9) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
4
5define i16 @sext_i8_to_i16(i8 %a) {
6; CHECK-LABEL: sext_i8_to_i16:
7; CHECK:       // %bb.0: // %entry
8; CHECK-NEXT:    sxtb w0, w0
9; CHECK-NEXT:    ret
10entry:
11  %c = sext i8 %a to i16
12  ret i16 %c
13}
14
15define i32 @sext_i8_to_i32(i8 %a) {
16; CHECK-LABEL: sext_i8_to_i32:
17; CHECK:       // %bb.0: // %entry
18; CHECK-NEXT:    sxtb w0, w0
19; CHECK-NEXT:    ret
20entry:
21  %c = sext i8 %a to i32
22  ret i32 %c
23}
24
25define i64 @sext_i8_to_i64(i8 %a) {
26; CHECK-LABEL: sext_i8_to_i64:
27; CHECK:       // %bb.0: // %entry
28; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x0
29; CHECK-NEXT:    sxtb x0, w0
30; CHECK-NEXT:    ret
31entry:
32  %c = sext i8 %a to i64
33  ret i64 %c
34}
35
36define i10 @sext_i8_to_i10(i8 %a) {
37; CHECK-LABEL: sext_i8_to_i10:
38; CHECK:       // %bb.0: // %entry
39; CHECK-NEXT:    sxtb w0, w0
40; CHECK-NEXT:    ret
41entry:
42  %c = sext i8 %a to i10
43  ret i10 %c
44}
45
46define i32 @sext_i16_to_i32(i16 %a) {
47; CHECK-LABEL: sext_i16_to_i32:
48; CHECK:       // %bb.0: // %entry
49; CHECK-NEXT:    sxth w0, w0
50; CHECK-NEXT:    ret
51entry:
52  %c = sext i16 %a to i32
53  ret i32 %c
54}
55
56define i64 @sext_i16_to_i64(i16 %a) {
57; CHECK-LABEL: sext_i16_to_i64:
58; CHECK:       // %bb.0: // %entry
59; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x0
60; CHECK-NEXT:    sxth x0, w0
61; CHECK-NEXT:    ret
62entry:
63  %c = sext i16 %a to i64
64  ret i64 %c
65}
66
67define i64 @sext_i32_to_i64(i32 %a) {
68; CHECK-LABEL: sext_i32_to_i64:
69; CHECK:       // %bb.0: // %entry
70; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x0
71; CHECK-NEXT:    sxtw x0, w0
72; CHECK-NEXT:    ret
73entry:
74  %c = sext i32 %a to i64
75  ret i64 %c
76}
77
78define i16 @sext_i10_to_i16(i10 %a) {
79; CHECK-LABEL: sext_i10_to_i16:
80; CHECK:       // %bb.0: // %entry
81; CHECK-NEXT:    sbfx w0, w0, #0, #10
82; CHECK-NEXT:    ret
83entry:
84  %c = sext i10 %a to i16
85  ret i16 %c
86}
87
88define i32 @sext_i10_to_i32(i10 %a) {
89; CHECK-LABEL: sext_i10_to_i32:
90; CHECK:       // %bb.0: // %entry
91; CHECK-NEXT:    sbfx w0, w0, #0, #10
92; CHECK-NEXT:    ret
93entry:
94  %c = sext i10 %a to i32
95  ret i32 %c
96}
97
98define i64 @sext_i10_to_i64(i10 %a) {
99; CHECK-LABEL: sext_i10_to_i64:
100; CHECK:       // %bb.0: // %entry
101; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x0
102; CHECK-NEXT:    sbfx x0, x0, #0, #10
103; CHECK-NEXT:    ret
104entry:
105  %c = sext i10 %a to i64
106  ret i64 %c
107}
108
109define <2 x i16> @sext_v2i8_v2i16(<2 x i8> %a) {
110; CHECK-LABEL: sext_v2i8_v2i16:
111; CHECK:       // %bb.0: // %entry
112; CHECK-NEXT:    shl v0.2s, v0.2s, #24
113; CHECK-NEXT:    sshr v0.2s, v0.2s, #24
114; CHECK-NEXT:    ret
115entry:
116  %c = sext <2 x i8> %a to <2 x i16>
117  ret <2 x i16> %c
118}
119
120define <2 x i32> @sext_v2i8_v2i32(<2 x i8> %a) {
121; CHECK-LABEL: sext_v2i8_v2i32:
122; CHECK:       // %bb.0: // %entry
123; CHECK-NEXT:    shl v0.2s, v0.2s, #24
124; CHECK-NEXT:    sshr v0.2s, v0.2s, #24
125; CHECK-NEXT:    ret
126entry:
127  %c = sext <2 x i8> %a to <2 x i32>
128  ret <2 x i32> %c
129}
130
131define <2 x i64> @sext_v2i8_v2i64(<2 x i8> %a) {
132; CHECK-LABEL: sext_v2i8_v2i64:
133; CHECK:       // %bb.0: // %entry
134; CHECK-NEXT:    ushll v0.2d, v0.2s, #0
135; CHECK-NEXT:    shl v0.2d, v0.2d, #56
136; CHECK-NEXT:    sshr v0.2d, v0.2d, #56
137; CHECK-NEXT:    ret
138entry:
139  %c = sext <2 x i8> %a to <2 x i64>
140  ret <2 x i64> %c
141}
142
143define <2 x i32> @sext_v2i16_v2i32(<2 x i16> %a) {
144; CHECK-LABEL: sext_v2i16_v2i32:
145; CHECK:       // %bb.0: // %entry
146; CHECK-NEXT:    shl v0.2s, v0.2s, #16
147; CHECK-NEXT:    sshr v0.2s, v0.2s, #16
148; CHECK-NEXT:    ret
149entry:
150  %c = sext <2 x i16> %a to <2 x i32>
151  ret <2 x i32> %c
152}
153
154define <2 x i64> @sext_v2i16_v2i64(<2 x i16> %a) {
155; CHECK-LABEL: sext_v2i16_v2i64:
156; CHECK:       // %bb.0: // %entry
157; CHECK-NEXT:    ushll v0.2d, v0.2s, #0
158; CHECK-NEXT:    shl v0.2d, v0.2d, #48
159; CHECK-NEXT:    sshr v0.2d, v0.2d, #48
160; CHECK-NEXT:    ret
161entry:
162  %c = sext <2 x i16> %a to <2 x i64>
163  ret <2 x i64> %c
164}
165
166define <2 x i64> @sext_v2i32_v2i64(<2 x i32> %a) {
167; CHECK-LABEL: sext_v2i32_v2i64:
168; CHECK:       // %bb.0: // %entry
169; CHECK-NEXT:    sshll v0.2d, v0.2s, #0
170; CHECK-NEXT:    ret
171entry:
172  %c = sext <2 x i32> %a to <2 x i64>
173  ret <2 x i64> %c
174}
175
176define <2 x i16> @sext_v2i10_v2i16(<2 x i10> %a) {
177; CHECK-LABEL: sext_v2i10_v2i16:
178; CHECK:       // %bb.0: // %entry
179; CHECK-NEXT:    shl v0.2s, v0.2s, #22
180; CHECK-NEXT:    sshr v0.2s, v0.2s, #22
181; CHECK-NEXT:    ret
182entry:
183  %c = sext <2 x i10> %a to <2 x i16>
184  ret <2 x i16> %c
185}
186
187define <2 x i32> @sext_v2i10_v2i32(<2 x i10> %a) {
188; CHECK-LABEL: sext_v2i10_v2i32:
189; CHECK:       // %bb.0: // %entry
190; CHECK-NEXT:    shl v0.2s, v0.2s, #22
191; CHECK-NEXT:    sshr v0.2s, v0.2s, #22
192; CHECK-NEXT:    ret
193entry:
194  %c = sext <2 x i10> %a to <2 x i32>
195  ret <2 x i32> %c
196}
197
198define <2 x i64> @sext_v2i10_v2i64(<2 x i10> %a) {
199; CHECK-LABEL: sext_v2i10_v2i64:
200; CHECK:       // %bb.0: // %entry
201; CHECK-NEXT:    ushll v0.2d, v0.2s, #0
202; CHECK-NEXT:    shl v0.2d, v0.2d, #54
203; CHECK-NEXT:    sshr v0.2d, v0.2d, #54
204; CHECK-NEXT:    ret
205entry:
206  %c = sext <2 x i10> %a to <2 x i64>
207  ret <2 x i64> %c
208}
209
210define <3 x i16> @sext_v3i8_v3i16(<3 x i8> %a) {
211; CHECK-SD-LABEL: sext_v3i8_v3i16:
212; CHECK-SD:       // %bb.0: // %entry
213; CHECK-SD-NEXT:    fmov s0, w0
214; CHECK-SD-NEXT:    mov v0.h[1], w1
215; CHECK-SD-NEXT:    mov v0.h[2], w2
216; CHECK-SD-NEXT:    shl v0.4h, v0.4h, #8
217; CHECK-SD-NEXT:    sshr v0.4h, v0.4h, #8
218; CHECK-SD-NEXT:    ret
219;
220; CHECK-GI-LABEL: sext_v3i8_v3i16:
221; CHECK-GI:       // %bb.0: // %entry
222; CHECK-GI-NEXT:    lsl w8, w0, #8
223; CHECK-GI-NEXT:    lsl w9, w1, #8
224; CHECK-GI-NEXT:    sbfx w8, w8, #8, #8
225; CHECK-GI-NEXT:    sbfx w9, w9, #8, #8
226; CHECK-GI-NEXT:    fmov s0, w8
227; CHECK-GI-NEXT:    lsl w8, w2, #8
228; CHECK-GI-NEXT:    sbfx w8, w8, #8, #8
229; CHECK-GI-NEXT:    mov v0.h[1], w9
230; CHECK-GI-NEXT:    mov v0.h[2], w8
231; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
232; CHECK-GI-NEXT:    ret
233entry:
234  %c = sext <3 x i8> %a to <3 x i16>
235  ret <3 x i16> %c
236}
237
238define <3 x i32> @sext_v3i8_v3i32(<3 x i8> %a) {
239; CHECK-SD-LABEL: sext_v3i8_v3i32:
240; CHECK-SD:       // %bb.0: // %entry
241; CHECK-SD-NEXT:    fmov s0, w0
242; CHECK-SD-NEXT:    mov v0.h[1], w1
243; CHECK-SD-NEXT:    mov v0.h[2], w2
244; CHECK-SD-NEXT:    ushll v0.4s, v0.4h, #0
245; CHECK-SD-NEXT:    shl v0.4s, v0.4s, #24
246; CHECK-SD-NEXT:    sshr v0.4s, v0.4s, #24
247; CHECK-SD-NEXT:    ret
248;
249; CHECK-GI-LABEL: sext_v3i8_v3i32:
250; CHECK-GI:       // %bb.0: // %entry
251; CHECK-GI-NEXT:    sxtb w8, w0
252; CHECK-GI-NEXT:    mov v0.s[0], w8
253; CHECK-GI-NEXT:    sxtb w8, w1
254; CHECK-GI-NEXT:    mov v0.s[1], w8
255; CHECK-GI-NEXT:    sxtb w8, w2
256; CHECK-GI-NEXT:    mov v0.s[2], w8
257; CHECK-GI-NEXT:    ret
258entry:
259  %c = sext <3 x i8> %a to <3 x i32>
260  ret <3 x i32> %c
261}
262
263define <3 x i64> @sext_v3i8_v3i64(<3 x i8> %a) {
264; CHECK-SD-LABEL: sext_v3i8_v3i64:
265; CHECK-SD:       // %bb.0: // %entry
266; CHECK-SD-NEXT:    fmov s0, w0
267; CHECK-SD-NEXT:    fmov s1, w2
268; CHECK-SD-NEXT:    mov v0.s[1], w1
269; CHECK-SD-NEXT:    ushll v1.2d, v1.2s, #0
270; CHECK-SD-NEXT:    shl v2.2d, v1.2d, #56
271; CHECK-SD-NEXT:    ushll v0.2d, v0.2s, #0
272; CHECK-SD-NEXT:    sshr v2.2d, v2.2d, #56
273; CHECK-SD-NEXT:    shl v0.2d, v0.2d, #56
274; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
275; CHECK-SD-NEXT:    sshr v0.2d, v0.2d, #56
276; CHECK-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
277; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
278; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
279; CHECK-SD-NEXT:    ret
280;
281; CHECK-GI-LABEL: sext_v3i8_v3i64:
282; CHECK-GI:       // %bb.0: // %entry
283; CHECK-GI-NEXT:    // kill: def $w0 killed $w0 def $x0
284; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1
285; CHECK-GI-NEXT:    // kill: def $w2 killed $w2 def $x2
286; CHECK-GI-NEXT:    sxtb x8, w0
287; CHECK-GI-NEXT:    sxtb x9, w1
288; CHECK-GI-NEXT:    sxtb x10, w2
289; CHECK-GI-NEXT:    fmov d0, x8
290; CHECK-GI-NEXT:    fmov d1, x9
291; CHECK-GI-NEXT:    fmov d2, x10
292; CHECK-GI-NEXT:    ret
293entry:
294  %c = sext <3 x i8> %a to <3 x i64>
295  ret <3 x i64> %c
296}
297
298define <3 x i32> @sext_v3i16_v3i32(<3 x i16> %a) {
299; CHECK-SD-LABEL: sext_v3i16_v3i32:
300; CHECK-SD:       // %bb.0: // %entry
301; CHECK-SD-NEXT:    sshll v0.4s, v0.4h, #0
302; CHECK-SD-NEXT:    ret
303;
304; CHECK-GI-LABEL: sext_v3i16_v3i32:
305; CHECK-GI:       // %bb.0: // %entry
306; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
307; CHECK-GI-NEXT:    smov w8, v0.h[0]
308; CHECK-GI-NEXT:    smov w9, v0.h[1]
309; CHECK-GI-NEXT:    mov v1.s[0], w8
310; CHECK-GI-NEXT:    smov w8, v0.h[2]
311; CHECK-GI-NEXT:    mov v1.s[1], w9
312; CHECK-GI-NEXT:    mov v1.s[2], w8
313; CHECK-GI-NEXT:    mov v0.16b, v1.16b
314; CHECK-GI-NEXT:    ret
315entry:
316  %c = sext <3 x i16> %a to <3 x i32>
317  ret <3 x i32> %c
318}
319
320define <3 x i64> @sext_v3i16_v3i64(<3 x i16> %a) {
321; CHECK-SD-LABEL: sext_v3i16_v3i64:
322; CHECK-SD:       // %bb.0: // %entry
323; CHECK-SD-NEXT:    sshll v2.4s, v0.4h, #0
324; CHECK-SD-NEXT:    sshll v0.2d, v2.2s, #0
325; CHECK-SD-NEXT:    sshll2 v2.2d, v2.4s, #0
326; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
327; CHECK-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
328; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
329; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
330; CHECK-SD-NEXT:    ret
331;
332; CHECK-GI-LABEL: sext_v3i16_v3i64:
333; CHECK-GI:       // %bb.0: // %entry
334; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
335; CHECK-GI-NEXT:    smov x8, v0.h[0]
336; CHECK-GI-NEXT:    smov x9, v0.h[1]
337; CHECK-GI-NEXT:    smov x10, v0.h[2]
338; CHECK-GI-NEXT:    fmov d0, x8
339; CHECK-GI-NEXT:    fmov d1, x9
340; CHECK-GI-NEXT:    fmov d2, x10
341; CHECK-GI-NEXT:    ret
342entry:
343  %c = sext <3 x i16> %a to <3 x i64>
344  ret <3 x i64> %c
345}
346
347define <3 x i64> @sext_v3i32_v3i64(<3 x i32> %a) {
348; CHECK-SD-LABEL: sext_v3i32_v3i64:
349; CHECK-SD:       // %bb.0: // %entry
350; CHECK-SD-NEXT:    sshll v3.2d, v0.2s, #0
351; CHECK-SD-NEXT:    sshll2 v2.2d, v0.4s, #0
352; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
353; CHECK-SD-NEXT:    fmov d0, d3
354; CHECK-SD-NEXT:    ext v1.16b, v3.16b, v3.16b, #8
355; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
356; CHECK-SD-NEXT:    ret
357;
358; CHECK-GI-LABEL: sext_v3i32_v3i64:
359; CHECK-GI:       // %bb.0: // %entry
360; CHECK-GI-NEXT:    smov x8, v0.s[0]
361; CHECK-GI-NEXT:    smov x9, v0.s[1]
362; CHECK-GI-NEXT:    smov x10, v0.s[2]
363; CHECK-GI-NEXT:    fmov d0, x8
364; CHECK-GI-NEXT:    fmov d1, x9
365; CHECK-GI-NEXT:    fmov d2, x10
366; CHECK-GI-NEXT:    ret
367entry:
368  %c = sext <3 x i32> %a to <3 x i64>
369  ret <3 x i64> %c
370}
371
372define <3 x i16> @sext_v3i10_v3i16(<3 x i10> %a) {
373; CHECK-SD-LABEL: sext_v3i10_v3i16:
374; CHECK-SD:       // %bb.0: // %entry
375; CHECK-SD-NEXT:    fmov s0, w0
376; CHECK-SD-NEXT:    mov v0.h[1], w1
377; CHECK-SD-NEXT:    mov v0.h[2], w2
378; CHECK-SD-NEXT:    shl v0.4h, v0.4h, #6
379; CHECK-SD-NEXT:    sshr v0.4h, v0.4h, #6
380; CHECK-SD-NEXT:    ret
381;
382; CHECK-GI-LABEL: sext_v3i10_v3i16:
383; CHECK-GI:       // %bb.0: // %entry
384; CHECK-GI-NEXT:    lsl w8, w0, #6
385; CHECK-GI-NEXT:    lsl w9, w1, #6
386; CHECK-GI-NEXT:    sbfx w8, w8, #6, #10
387; CHECK-GI-NEXT:    sbfx w9, w9, #6, #10
388; CHECK-GI-NEXT:    fmov s0, w8
389; CHECK-GI-NEXT:    lsl w8, w2, #6
390; CHECK-GI-NEXT:    sbfx w8, w8, #6, #10
391; CHECK-GI-NEXT:    mov v0.h[1], w9
392; CHECK-GI-NEXT:    mov v0.h[2], w8
393; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
394; CHECK-GI-NEXT:    ret
395entry:
396  %c = sext <3 x i10> %a to <3 x i16>
397  ret <3 x i16> %c
398}
399
400define <3 x i32> @sext_v3i10_v3i32(<3 x i10> %a) {
401; CHECK-SD-LABEL: sext_v3i10_v3i32:
402; CHECK-SD:       // %bb.0: // %entry
403; CHECK-SD-NEXT:    fmov s0, w0
404; CHECK-SD-NEXT:    mov v0.h[1], w1
405; CHECK-SD-NEXT:    mov v0.h[2], w2
406; CHECK-SD-NEXT:    ushll v0.4s, v0.4h, #0
407; CHECK-SD-NEXT:    shl v0.4s, v0.4s, #22
408; CHECK-SD-NEXT:    sshr v0.4s, v0.4s, #22
409; CHECK-SD-NEXT:    ret
410;
411; CHECK-GI-LABEL: sext_v3i10_v3i32:
412; CHECK-GI:       // %bb.0: // %entry
413; CHECK-GI-NEXT:    sbfx w8, w0, #0, #10
414; CHECK-GI-NEXT:    mov v0.s[0], w8
415; CHECK-GI-NEXT:    sbfx w8, w1, #0, #10
416; CHECK-GI-NEXT:    mov v0.s[1], w8
417; CHECK-GI-NEXT:    sbfx w8, w2, #0, #10
418; CHECK-GI-NEXT:    mov v0.s[2], w8
419; CHECK-GI-NEXT:    ret
420entry:
421  %c = sext <3 x i10> %a to <3 x i32>
422  ret <3 x i32> %c
423}
424
425define <3 x i64> @sext_v3i10_v3i64(<3 x i10> %a) {
426; CHECK-SD-LABEL: sext_v3i10_v3i64:
427; CHECK-SD:       // %bb.0: // %entry
428; CHECK-SD-NEXT:    fmov s0, w0
429; CHECK-SD-NEXT:    fmov s1, w2
430; CHECK-SD-NEXT:    mov v0.s[1], w1
431; CHECK-SD-NEXT:    ushll v1.2d, v1.2s, #0
432; CHECK-SD-NEXT:    shl v2.2d, v1.2d, #54
433; CHECK-SD-NEXT:    ushll v0.2d, v0.2s, #0
434; CHECK-SD-NEXT:    sshr v2.2d, v2.2d, #54
435; CHECK-SD-NEXT:    shl v0.2d, v0.2d, #54
436; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
437; CHECK-SD-NEXT:    sshr v0.2d, v0.2d, #54
438; CHECK-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
439; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
440; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
441; CHECK-SD-NEXT:    ret
442;
443; CHECK-GI-LABEL: sext_v3i10_v3i64:
444; CHECK-GI:       // %bb.0: // %entry
445; CHECK-GI-NEXT:    // kill: def $w0 killed $w0 def $x0
446; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1
447; CHECK-GI-NEXT:    // kill: def $w2 killed $w2 def $x2
448; CHECK-GI-NEXT:    sbfx x8, x0, #0, #10
449; CHECK-GI-NEXT:    sbfx x9, x1, #0, #10
450; CHECK-GI-NEXT:    sbfx x10, x2, #0, #10
451; CHECK-GI-NEXT:    fmov d0, x8
452; CHECK-GI-NEXT:    fmov d1, x9
453; CHECK-GI-NEXT:    fmov d2, x10
454; CHECK-GI-NEXT:    ret
455entry:
456  %c = sext <3 x i10> %a to <3 x i64>
457  ret <3 x i64> %c
458}
459
460define <4 x i16> @sext_v4i8_v4i16(<4 x i8> %a) {
461; CHECK-LABEL: sext_v4i8_v4i16:
462; CHECK:       // %bb.0: // %entry
463; CHECK-NEXT:    shl v0.4h, v0.4h, #8
464; CHECK-NEXT:    sshr v0.4h, v0.4h, #8
465; CHECK-NEXT:    ret
466entry:
467  %c = sext <4 x i8> %a to <4 x i16>
468  ret <4 x i16> %c
469}
470
471define <4 x i32> @sext_v4i8_v4i32(<4 x i8> %a) {
472; CHECK-LABEL: sext_v4i8_v4i32:
473; CHECK:       // %bb.0: // %entry
474; CHECK-NEXT:    ushll v0.4s, v0.4h, #0
475; CHECK-NEXT:    shl v0.4s, v0.4s, #24
476; CHECK-NEXT:    sshr v0.4s, v0.4s, #24
477; CHECK-NEXT:    ret
478entry:
479  %c = sext <4 x i8> %a to <4 x i32>
480  ret <4 x i32> %c
481}
482
483define <4 x i64> @sext_v4i8_v4i64(<4 x i8> %a) {
484; CHECK-SD-LABEL: sext_v4i8_v4i64:
485; CHECK-SD:       // %bb.0: // %entry
486; CHECK-SD-NEXT:    ushll v0.4s, v0.4h, #0
487; CHECK-SD-NEXT:    ushll v1.2d, v0.2s, #0
488; CHECK-SD-NEXT:    ushll2 v0.2d, v0.4s, #0
489; CHECK-SD-NEXT:    shl v0.2d, v0.2d, #56
490; CHECK-SD-NEXT:    shl v2.2d, v1.2d, #56
491; CHECK-SD-NEXT:    sshr v1.2d, v0.2d, #56
492; CHECK-SD-NEXT:    sshr v0.2d, v2.2d, #56
493; CHECK-SD-NEXT:    ret
494;
495; CHECK-GI-LABEL: sext_v4i8_v4i64:
496; CHECK-GI:       // %bb.0: // %entry
497; CHECK-GI-NEXT:    ushll v0.4s, v0.4h, #0
498; CHECK-GI-NEXT:    ushll v1.2d, v0.2s, #0
499; CHECK-GI-NEXT:    ushll2 v0.2d, v0.4s, #0
500; CHECK-GI-NEXT:    shl v1.2d, v1.2d, #56
501; CHECK-GI-NEXT:    shl v2.2d, v0.2d, #56
502; CHECK-GI-NEXT:    sshr v0.2d, v1.2d, #56
503; CHECK-GI-NEXT:    sshr v1.2d, v2.2d, #56
504; CHECK-GI-NEXT:    ret
505entry:
506  %c = sext <4 x i8> %a to <4 x i64>
507  ret <4 x i64> %c
508}
509
510define <4 x i32> @sext_v4i16_v4i32(<4 x i16> %a) {
511; CHECK-LABEL: sext_v4i16_v4i32:
512; CHECK:       // %bb.0: // %entry
513; CHECK-NEXT:    sshll v0.4s, v0.4h, #0
514; CHECK-NEXT:    ret
515entry:
516  %c = sext <4 x i16> %a to <4 x i32>
517  ret <4 x i32> %c
518}
519
520define <4 x i64> @sext_v4i16_v4i64(<4 x i16> %a) {
521; CHECK-SD-LABEL: sext_v4i16_v4i64:
522; CHECK-SD:       // %bb.0: // %entry
523; CHECK-SD-NEXT:    sshll v0.4s, v0.4h, #0
524; CHECK-SD-NEXT:    sshll2 v1.2d, v0.4s, #0
525; CHECK-SD-NEXT:    sshll v0.2d, v0.2s, #0
526; CHECK-SD-NEXT:    ret
527;
528; CHECK-GI-LABEL: sext_v4i16_v4i64:
529; CHECK-GI:       // %bb.0: // %entry
530; CHECK-GI-NEXT:    sshll v1.4s, v0.4h, #0
531; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0
532; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0
533; CHECK-GI-NEXT:    ret
534entry:
535  %c = sext <4 x i16> %a to <4 x i64>
536  ret <4 x i64> %c
537}
538
539define <4 x i64> @sext_v4i32_v4i64(<4 x i32> %a) {
540; CHECK-SD-LABEL: sext_v4i32_v4i64:
541; CHECK-SD:       // %bb.0: // %entry
542; CHECK-SD-NEXT:    sshll2 v1.2d, v0.4s, #0
543; CHECK-SD-NEXT:    sshll v0.2d, v0.2s, #0
544; CHECK-SD-NEXT:    ret
545;
546; CHECK-GI-LABEL: sext_v4i32_v4i64:
547; CHECK-GI:       // %bb.0: // %entry
548; CHECK-GI-NEXT:    sshll v2.2d, v0.2s, #0
549; CHECK-GI-NEXT:    sshll2 v1.2d, v0.4s, #0
550; CHECK-GI-NEXT:    mov v0.16b, v2.16b
551; CHECK-GI-NEXT:    ret
552entry:
553  %c = sext <4 x i32> %a to <4 x i64>
554  ret <4 x i64> %c
555}
556
557define <4 x i16> @sext_v4i10_v4i16(<4 x i10> %a) {
558; CHECK-LABEL: sext_v4i10_v4i16:
559; CHECK:       // %bb.0: // %entry
560; CHECK-NEXT:    shl v0.4h, v0.4h, #6
561; CHECK-NEXT:    sshr v0.4h, v0.4h, #6
562; CHECK-NEXT:    ret
563entry:
564  %c = sext <4 x i10> %a to <4 x i16>
565  ret <4 x i16> %c
566}
567
568define <4 x i32> @sext_v4i10_v4i32(<4 x i10> %a) {
569; CHECK-LABEL: sext_v4i10_v4i32:
570; CHECK:       // %bb.0: // %entry
571; CHECK-NEXT:    ushll v0.4s, v0.4h, #0
572; CHECK-NEXT:    shl v0.4s, v0.4s, #22
573; CHECK-NEXT:    sshr v0.4s, v0.4s, #22
574; CHECK-NEXT:    ret
575entry:
576  %c = sext <4 x i10> %a to <4 x i32>
577  ret <4 x i32> %c
578}
579
580define <4 x i64> @sext_v4i10_v4i64(<4 x i10> %a) {
581; CHECK-SD-LABEL: sext_v4i10_v4i64:
582; CHECK-SD:       // %bb.0: // %entry
583; CHECK-SD-NEXT:    ushll v0.4s, v0.4h, #0
584; CHECK-SD-NEXT:    ushll v1.2d, v0.2s, #0
585; CHECK-SD-NEXT:    ushll2 v0.2d, v0.4s, #0
586; CHECK-SD-NEXT:    shl v0.2d, v0.2d, #54
587; CHECK-SD-NEXT:    shl v2.2d, v1.2d, #54
588; CHECK-SD-NEXT:    sshr v1.2d, v0.2d, #54
589; CHECK-SD-NEXT:    sshr v0.2d, v2.2d, #54
590; CHECK-SD-NEXT:    ret
591;
592; CHECK-GI-LABEL: sext_v4i10_v4i64:
593; CHECK-GI:       // %bb.0: // %entry
594; CHECK-GI-NEXT:    ushll v0.4s, v0.4h, #0
595; CHECK-GI-NEXT:    ushll v1.2d, v0.2s, #0
596; CHECK-GI-NEXT:    ushll2 v0.2d, v0.4s, #0
597; CHECK-GI-NEXT:    shl v1.2d, v1.2d, #54
598; CHECK-GI-NEXT:    shl v2.2d, v0.2d, #54
599; CHECK-GI-NEXT:    sshr v0.2d, v1.2d, #54
600; CHECK-GI-NEXT:    sshr v1.2d, v2.2d, #54
601; CHECK-GI-NEXT:    ret
602entry:
603  %c = sext <4 x i10> %a to <4 x i64>
604  ret <4 x i64> %c
605}
606
607define <8 x i16> @sext_v8i8_v8i16(<8 x i8> %a) {
608; CHECK-LABEL: sext_v8i8_v8i16:
609; CHECK:       // %bb.0: // %entry
610; CHECK-NEXT:    sshll v0.8h, v0.8b, #0
611; CHECK-NEXT:    ret
612entry:
613  %c = sext <8 x i8> %a to <8 x i16>
614  ret <8 x i16> %c
615}
616
617define <8 x i32> @sext_v8i8_v8i32(<8 x i8> %a) {
618; CHECK-SD-LABEL: sext_v8i8_v8i32:
619; CHECK-SD:       // %bb.0: // %entry
620; CHECK-SD-NEXT:    sshll v0.8h, v0.8b, #0
621; CHECK-SD-NEXT:    sshll2 v1.4s, v0.8h, #0
622; CHECK-SD-NEXT:    sshll v0.4s, v0.4h, #0
623; CHECK-SD-NEXT:    ret
624;
625; CHECK-GI-LABEL: sext_v8i8_v8i32:
626; CHECK-GI:       // %bb.0: // %entry
627; CHECK-GI-NEXT:    sshll v1.8h, v0.8b, #0
628; CHECK-GI-NEXT:    sshll v0.4s, v1.4h, #0
629; CHECK-GI-NEXT:    sshll2 v1.4s, v1.8h, #0
630; CHECK-GI-NEXT:    ret
631entry:
632  %c = sext <8 x i8> %a to <8 x i32>
633  ret <8 x i32> %c
634}
635
636define <8 x i64> @sext_v8i8_v8i64(<8 x i8> %a) {
637; CHECK-SD-LABEL: sext_v8i8_v8i64:
638; CHECK-SD:       // %bb.0: // %entry
639; CHECK-SD-NEXT:    sshll v0.8h, v0.8b, #0
640; CHECK-SD-NEXT:    sshll v1.4s, v0.4h, #0
641; CHECK-SD-NEXT:    sshll2 v2.4s, v0.8h, #0
642; CHECK-SD-NEXT:    sshll v0.2d, v1.2s, #0
643; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0
644; CHECK-SD-NEXT:    sshll2 v1.2d, v1.4s, #0
645; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0
646; CHECK-SD-NEXT:    ret
647;
648; CHECK-GI-LABEL: sext_v8i8_v8i64:
649; CHECK-GI:       // %bb.0: // %entry
650; CHECK-GI-NEXT:    sshll v0.8h, v0.8b, #0
651; CHECK-GI-NEXT:    sshll v1.4s, v0.4h, #0
652; CHECK-GI-NEXT:    sshll2 v3.4s, v0.8h, #0
653; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0
654; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0
655; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0
656; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0
657; CHECK-GI-NEXT:    ret
658entry:
659  %c = sext <8 x i8> %a to <8 x i64>
660  ret <8 x i64> %c
661}
662
663define <8 x i32> @sext_v8i16_v8i32(<8 x i16> %a) {
664; CHECK-SD-LABEL: sext_v8i16_v8i32:
665; CHECK-SD:       // %bb.0: // %entry
666; CHECK-SD-NEXT:    sshll2 v1.4s, v0.8h, #0
667; CHECK-SD-NEXT:    sshll v0.4s, v0.4h, #0
668; CHECK-SD-NEXT:    ret
669;
670; CHECK-GI-LABEL: sext_v8i16_v8i32:
671; CHECK-GI:       // %bb.0: // %entry
672; CHECK-GI-NEXT:    sshll v2.4s, v0.4h, #0
673; CHECK-GI-NEXT:    sshll2 v1.4s, v0.8h, #0
674; CHECK-GI-NEXT:    mov v0.16b, v2.16b
675; CHECK-GI-NEXT:    ret
676entry:
677  %c = sext <8 x i16> %a to <8 x i32>
678  ret <8 x i32> %c
679}
680
681define <8 x i64> @sext_v8i16_v8i64(<8 x i16> %a) {
682; CHECK-SD-LABEL: sext_v8i16_v8i64:
683; CHECK-SD:       // %bb.0: // %entry
684; CHECK-SD-NEXT:    sshll v1.4s, v0.4h, #0
685; CHECK-SD-NEXT:    sshll2 v2.4s, v0.8h, #0
686; CHECK-SD-NEXT:    sshll v0.2d, v1.2s, #0
687; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0
688; CHECK-SD-NEXT:    sshll2 v1.2d, v1.4s, #0
689; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0
690; CHECK-SD-NEXT:    ret
691;
692; CHECK-GI-LABEL: sext_v8i16_v8i64:
693; CHECK-GI:       // %bb.0: // %entry
694; CHECK-GI-NEXT:    sshll v1.4s, v0.4h, #0
695; CHECK-GI-NEXT:    sshll2 v3.4s, v0.8h, #0
696; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0
697; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0
698; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0
699; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0
700; CHECK-GI-NEXT:    ret
701entry:
702  %c = sext <8 x i16> %a to <8 x i64>
703  ret <8 x i64> %c
704}
705
706define <8 x i64> @sext_v8i32_v8i64(<8 x i32> %a) {
707; CHECK-SD-LABEL: sext_v8i32_v8i64:
708; CHECK-SD:       // %bb.0: // %entry
709; CHECK-SD-NEXT:    sshll v5.2d, v0.2s, #0
710; CHECK-SD-NEXT:    sshll2 v4.2d, v0.4s, #0
711; CHECK-SD-NEXT:    sshll2 v3.2d, v1.4s, #0
712; CHECK-SD-NEXT:    sshll v2.2d, v1.2s, #0
713; CHECK-SD-NEXT:    mov v0.16b, v5.16b
714; CHECK-SD-NEXT:    mov v1.16b, v4.16b
715; CHECK-SD-NEXT:    ret
716;
717; CHECK-GI-LABEL: sext_v8i32_v8i64:
718; CHECK-GI:       // %bb.0: // %entry
719; CHECK-GI-NEXT:    sshll v4.2d, v0.2s, #0
720; CHECK-GI-NEXT:    sshll2 v5.2d, v0.4s, #0
721; CHECK-GI-NEXT:    sshll v2.2d, v1.2s, #0
722; CHECK-GI-NEXT:    sshll2 v3.2d, v1.4s, #0
723; CHECK-GI-NEXT:    mov v0.16b, v4.16b
724; CHECK-GI-NEXT:    mov v1.16b, v5.16b
725; CHECK-GI-NEXT:    ret
726entry:
727  %c = sext <8 x i32> %a to <8 x i64>
728  ret <8 x i64> %c
729}
730
731define <8 x i16> @sext_v8i10_v8i16(<8 x i10> %a) {
732; CHECK-LABEL: sext_v8i10_v8i16:
733; CHECK:       // %bb.0: // %entry
734; CHECK-NEXT:    shl v0.8h, v0.8h, #6
735; CHECK-NEXT:    sshr v0.8h, v0.8h, #6
736; CHECK-NEXT:    ret
737entry:
738  %c = sext <8 x i10> %a to <8 x i16>
739  ret <8 x i16> %c
740}
741
742define <8 x i32> @sext_v8i10_v8i32(<8 x i10> %a) {
743; CHECK-SD-LABEL: sext_v8i10_v8i32:
744; CHECK-SD:       // %bb.0: // %entry
745; CHECK-SD-NEXT:    ushll v1.4s, v0.4h, #0
746; CHECK-SD-NEXT:    ushll2 v0.4s, v0.8h, #0
747; CHECK-SD-NEXT:    shl v0.4s, v0.4s, #22
748; CHECK-SD-NEXT:    shl v2.4s, v1.4s, #22
749; CHECK-SD-NEXT:    sshr v1.4s, v0.4s, #22
750; CHECK-SD-NEXT:    sshr v0.4s, v2.4s, #22
751; CHECK-SD-NEXT:    ret
752;
753; CHECK-GI-LABEL: sext_v8i10_v8i32:
754; CHECK-GI:       // %bb.0: // %entry
755; CHECK-GI-NEXT:    ushll v1.4s, v0.4h, #0
756; CHECK-GI-NEXT:    ushll2 v0.4s, v0.8h, #0
757; CHECK-GI-NEXT:    shl v1.4s, v1.4s, #22
758; CHECK-GI-NEXT:    shl v2.4s, v0.4s, #22
759; CHECK-GI-NEXT:    sshr v0.4s, v1.4s, #22
760; CHECK-GI-NEXT:    sshr v1.4s, v2.4s, #22
761; CHECK-GI-NEXT:    ret
762entry:
763  %c = sext <8 x i10> %a to <8 x i32>
764  ret <8 x i32> %c
765}
766
767define <8 x i64> @sext_v8i10_v8i64(<8 x i10> %a) {
768; CHECK-SD-LABEL: sext_v8i10_v8i64:
769; CHECK-SD:       // %bb.0: // %entry
770; CHECK-SD-NEXT:    ushll v1.4s, v0.4h, #0
771; CHECK-SD-NEXT:    ushll2 v0.4s, v0.8h, #0
772; CHECK-SD-NEXT:    ushll v2.2d, v1.2s, #0
773; CHECK-SD-NEXT:    ushll v3.2d, v0.2s, #0
774; CHECK-SD-NEXT:    ushll2 v1.2d, v1.4s, #0
775; CHECK-SD-NEXT:    ushll2 v0.2d, v0.4s, #0
776; CHECK-SD-NEXT:    shl v2.2d, v2.2d, #54
777; CHECK-SD-NEXT:    shl v1.2d, v1.2d, #54
778; CHECK-SD-NEXT:    shl v5.2d, v3.2d, #54
779; CHECK-SD-NEXT:    shl v4.2d, v0.2d, #54
780; CHECK-SD-NEXT:    sshr v0.2d, v2.2d, #54
781; CHECK-SD-NEXT:    sshr v1.2d, v1.2d, #54
782; CHECK-SD-NEXT:    sshr v2.2d, v5.2d, #54
783; CHECK-SD-NEXT:    sshr v3.2d, v4.2d, #54
784; CHECK-SD-NEXT:    ret
785;
786; CHECK-GI-LABEL: sext_v8i10_v8i64:
787; CHECK-GI:       // %bb.0: // %entry
788; CHECK-GI-NEXT:    ushll v1.4s, v0.4h, #0
789; CHECK-GI-NEXT:    ushll2 v0.4s, v0.8h, #0
790; CHECK-GI-NEXT:    ushll v2.2d, v1.2s, #0
791; CHECK-GI-NEXT:    ushll2 v1.2d, v1.4s, #0
792; CHECK-GI-NEXT:    ushll v3.2d, v0.2s, #0
793; CHECK-GI-NEXT:    ushll2 v0.2d, v0.4s, #0
794; CHECK-GI-NEXT:    shl v2.2d, v2.2d, #54
795; CHECK-GI-NEXT:    shl v1.2d, v1.2d, #54
796; CHECK-GI-NEXT:    shl v3.2d, v3.2d, #54
797; CHECK-GI-NEXT:    shl v4.2d, v0.2d, #54
798; CHECK-GI-NEXT:    sshr v0.2d, v2.2d, #54
799; CHECK-GI-NEXT:    sshr v1.2d, v1.2d, #54
800; CHECK-GI-NEXT:    sshr v2.2d, v3.2d, #54
801; CHECK-GI-NEXT:    sshr v3.2d, v4.2d, #54
802; CHECK-GI-NEXT:    ret
803entry:
804  %c = sext <8 x i10> %a to <8 x i64>
805  ret <8 x i64> %c
806}
807
808define <16 x i16> @sext_v16i8_v16i16(<16 x i8> %a) {
809; CHECK-SD-LABEL: sext_v16i8_v16i16:
810; CHECK-SD:       // %bb.0: // %entry
811; CHECK-SD-NEXT:    sshll2 v1.8h, v0.16b, #0
812; CHECK-SD-NEXT:    sshll v0.8h, v0.8b, #0
813; CHECK-SD-NEXT:    ret
814;
815; CHECK-GI-LABEL: sext_v16i8_v16i16:
816; CHECK-GI:       // %bb.0: // %entry
817; CHECK-GI-NEXT:    sshll v2.8h, v0.8b, #0
818; CHECK-GI-NEXT:    sshll2 v1.8h, v0.16b, #0
819; CHECK-GI-NEXT:    mov v0.16b, v2.16b
820; CHECK-GI-NEXT:    ret
821entry:
822  %c = sext <16 x i8> %a to <16 x i16>
823  ret <16 x i16> %c
824}
825
826define <16 x i32> @sext_v16i8_v16i32(<16 x i8> %a) {
827; CHECK-SD-LABEL: sext_v16i8_v16i32:
828; CHECK-SD:       // %bb.0: // %entry
829; CHECK-SD-NEXT:    sshll v1.8h, v0.8b, #0
830; CHECK-SD-NEXT:    sshll2 v2.8h, v0.16b, #0
831; CHECK-SD-NEXT:    sshll v0.4s, v1.4h, #0
832; CHECK-SD-NEXT:    sshll2 v3.4s, v2.8h, #0
833; CHECK-SD-NEXT:    sshll2 v1.4s, v1.8h, #0
834; CHECK-SD-NEXT:    sshll v2.4s, v2.4h, #0
835; CHECK-SD-NEXT:    ret
836;
837; CHECK-GI-LABEL: sext_v16i8_v16i32:
838; CHECK-GI:       // %bb.0: // %entry
839; CHECK-GI-NEXT:    sshll v1.8h, v0.8b, #0
840; CHECK-GI-NEXT:    sshll2 v3.8h, v0.16b, #0
841; CHECK-GI-NEXT:    sshll v0.4s, v1.4h, #0
842; CHECK-GI-NEXT:    sshll2 v1.4s, v1.8h, #0
843; CHECK-GI-NEXT:    sshll v2.4s, v3.4h, #0
844; CHECK-GI-NEXT:    sshll2 v3.4s, v3.8h, #0
845; CHECK-GI-NEXT:    ret
846entry:
847  %c = sext <16 x i8> %a to <16 x i32>
848  ret <16 x i32> %c
849}
850
851define <16 x i64> @sext_v16i8_v16i64(<16 x i8> %a) {
852; CHECK-SD-LABEL: sext_v16i8_v16i64:
853; CHECK-SD:       // %bb.0: // %entry
854; CHECK-SD-NEXT:    sshll v1.8h, v0.8b, #0
855; CHECK-SD-NEXT:    sshll2 v0.8h, v0.16b, #0
856; CHECK-SD-NEXT:    sshll v2.4s, v1.4h, #0
857; CHECK-SD-NEXT:    sshll2 v4.4s, v1.8h, #0
858; CHECK-SD-NEXT:    sshll v5.4s, v0.4h, #0
859; CHECK-SD-NEXT:    sshll2 v6.4s, v0.8h, #0
860; CHECK-SD-NEXT:    sshll2 v1.2d, v2.4s, #0
861; CHECK-SD-NEXT:    sshll v0.2d, v2.2s, #0
862; CHECK-SD-NEXT:    sshll2 v3.2d, v4.4s, #0
863; CHECK-SD-NEXT:    sshll v2.2d, v4.2s, #0
864; CHECK-SD-NEXT:    sshll v4.2d, v5.2s, #0
865; CHECK-SD-NEXT:    sshll2 v7.2d, v6.4s, #0
866; CHECK-SD-NEXT:    sshll2 v5.2d, v5.4s, #0
867; CHECK-SD-NEXT:    sshll v6.2d, v6.2s, #0
868; CHECK-SD-NEXT:    ret
869;
870; CHECK-GI-LABEL: sext_v16i8_v16i64:
871; CHECK-GI:       // %bb.0: // %entry
872; CHECK-GI-NEXT:    sshll v1.8h, v0.8b, #0
873; CHECK-GI-NEXT:    sshll2 v0.8h, v0.16b, #0
874; CHECK-GI-NEXT:    sshll v2.4s, v1.4h, #0
875; CHECK-GI-NEXT:    sshll2 v3.4s, v1.8h, #0
876; CHECK-GI-NEXT:    sshll v5.4s, v0.4h, #0
877; CHECK-GI-NEXT:    sshll2 v7.4s, v0.8h, #0
878; CHECK-GI-NEXT:    sshll v0.2d, v2.2s, #0
879; CHECK-GI-NEXT:    sshll2 v1.2d, v2.4s, #0
880; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0
881; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0
882; CHECK-GI-NEXT:    sshll v4.2d, v5.2s, #0
883; CHECK-GI-NEXT:    sshll2 v5.2d, v5.4s, #0
884; CHECK-GI-NEXT:    sshll v6.2d, v7.2s, #0
885; CHECK-GI-NEXT:    sshll2 v7.2d, v7.4s, #0
886; CHECK-GI-NEXT:    ret
887entry:
888  %c = sext <16 x i8> %a to <16 x i64>
889  ret <16 x i64> %c
890}
891
892define <16 x i32> @sext_v16i16_v16i32(<16 x i16> %a) {
893; CHECK-SD-LABEL: sext_v16i16_v16i32:
894; CHECK-SD:       // %bb.0: // %entry
895; CHECK-SD-NEXT:    sshll v5.4s, v0.4h, #0
896; CHECK-SD-NEXT:    sshll2 v4.4s, v0.8h, #0
897; CHECK-SD-NEXT:    sshll2 v3.4s, v1.8h, #0
898; CHECK-SD-NEXT:    sshll v2.4s, v1.4h, #0
899; CHECK-SD-NEXT:    mov v0.16b, v5.16b
900; CHECK-SD-NEXT:    mov v1.16b, v4.16b
901; CHECK-SD-NEXT:    ret
902;
903; CHECK-GI-LABEL: sext_v16i16_v16i32:
904; CHECK-GI:       // %bb.0: // %entry
905; CHECK-GI-NEXT:    sshll v4.4s, v0.4h, #0
906; CHECK-GI-NEXT:    sshll2 v5.4s, v0.8h, #0
907; CHECK-GI-NEXT:    sshll v2.4s, v1.4h, #0
908; CHECK-GI-NEXT:    sshll2 v3.4s, v1.8h, #0
909; CHECK-GI-NEXT:    mov v0.16b, v4.16b
910; CHECK-GI-NEXT:    mov v1.16b, v5.16b
911; CHECK-GI-NEXT:    ret
912entry:
913  %c = sext <16 x i16> %a to <16 x i32>
914  ret <16 x i32> %c
915}
916
917define <16 x i64> @sext_v16i16_v16i64(<16 x i16> %a) {
918; CHECK-SD-LABEL: sext_v16i16_v16i64:
919; CHECK-SD:       // %bb.0: // %entry
920; CHECK-SD-NEXT:    sshll v2.4s, v0.4h, #0
921; CHECK-SD-NEXT:    sshll2 v4.4s, v0.8h, #0
922; CHECK-SD-NEXT:    sshll v5.4s, v1.4h, #0
923; CHECK-SD-NEXT:    sshll2 v6.4s, v1.8h, #0
924; CHECK-SD-NEXT:    sshll2 v1.2d, v2.4s, #0
925; CHECK-SD-NEXT:    sshll v0.2d, v2.2s, #0
926; CHECK-SD-NEXT:    sshll2 v3.2d, v4.4s, #0
927; CHECK-SD-NEXT:    sshll v2.2d, v4.2s, #0
928; CHECK-SD-NEXT:    sshll v4.2d, v5.2s, #0
929; CHECK-SD-NEXT:    sshll2 v7.2d, v6.4s, #0
930; CHECK-SD-NEXT:    sshll2 v5.2d, v5.4s, #0
931; CHECK-SD-NEXT:    sshll v6.2d, v6.2s, #0
932; CHECK-SD-NEXT:    ret
933;
934; CHECK-GI-LABEL: sext_v16i16_v16i64:
935; CHECK-GI:       // %bb.0: // %entry
936; CHECK-GI-NEXT:    sshll v2.4s, v0.4h, #0
937; CHECK-GI-NEXT:    sshll2 v3.4s, v0.8h, #0
938; CHECK-GI-NEXT:    sshll v5.4s, v1.4h, #0
939; CHECK-GI-NEXT:    sshll2 v7.4s, v1.8h, #0
940; CHECK-GI-NEXT:    sshll v0.2d, v2.2s, #0
941; CHECK-GI-NEXT:    sshll2 v1.2d, v2.4s, #0
942; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0
943; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0
944; CHECK-GI-NEXT:    sshll v4.2d, v5.2s, #0
945; CHECK-GI-NEXT:    sshll2 v5.2d, v5.4s, #0
946; CHECK-GI-NEXT:    sshll v6.2d, v7.2s, #0
947; CHECK-GI-NEXT:    sshll2 v7.2d, v7.4s, #0
948; CHECK-GI-NEXT:    ret
949entry:
950  %c = sext <16 x i16> %a to <16 x i64>
951  ret <16 x i64> %c
952}
953
954define <16 x i64> @sext_v16i32_v16i64(<16 x i32> %a) {
955; CHECK-SD-LABEL: sext_v16i32_v16i64:
956; CHECK-SD:       // %bb.0: // %entry
957; CHECK-SD-NEXT:    sshll2 v17.2d, v0.4s, #0
958; CHECK-SD-NEXT:    sshll2 v16.2d, v1.4s, #0
959; CHECK-SD-NEXT:    sshll v18.2d, v1.2s, #0
960; CHECK-SD-NEXT:    sshll v0.2d, v0.2s, #0
961; CHECK-SD-NEXT:    sshll v4.2d, v2.2s, #0
962; CHECK-SD-NEXT:    sshll2 v5.2d, v2.4s, #0
963; CHECK-SD-NEXT:    sshll2 v7.2d, v3.4s, #0
964; CHECK-SD-NEXT:    sshll v6.2d, v3.2s, #0
965; CHECK-SD-NEXT:    mov v1.16b, v17.16b
966; CHECK-SD-NEXT:    mov v2.16b, v18.16b
967; CHECK-SD-NEXT:    mov v3.16b, v16.16b
968; CHECK-SD-NEXT:    ret
969;
970; CHECK-GI-LABEL: sext_v16i32_v16i64:
971; CHECK-GI:       // %bb.0: // %entry
972; CHECK-GI-NEXT:    sshll v16.2d, v0.2s, #0
973; CHECK-GI-NEXT:    sshll2 v17.2d, v0.4s, #0
974; CHECK-GI-NEXT:    sshll v18.2d, v1.2s, #0
975; CHECK-GI-NEXT:    sshll2 v19.2d, v1.4s, #0
976; CHECK-GI-NEXT:    sshll v4.2d, v2.2s, #0
977; CHECK-GI-NEXT:    sshll2 v5.2d, v2.4s, #0
978; CHECK-GI-NEXT:    sshll v6.2d, v3.2s, #0
979; CHECK-GI-NEXT:    sshll2 v7.2d, v3.4s, #0
980; CHECK-GI-NEXT:    mov v0.16b, v16.16b
981; CHECK-GI-NEXT:    mov v1.16b, v17.16b
982; CHECK-GI-NEXT:    mov v2.16b, v18.16b
983; CHECK-GI-NEXT:    mov v3.16b, v19.16b
984; CHECK-GI-NEXT:    ret
985entry:
986  %c = sext <16 x i32> %a to <16 x i64>
987  ret <16 x i64> %c
988}
989
990define <16 x i16> @sext_v16i10_v16i16(<16 x i10> %a) {
991; CHECK-SD-LABEL: sext_v16i10_v16i16:
992; CHECK-SD:       // %bb.0: // %entry
993; CHECK-SD-NEXT:    ldr w8, [sp]
994; CHECK-SD-NEXT:    fmov s1, w0
995; CHECK-SD-NEXT:    ldr w9, [sp, #8]
996; CHECK-SD-NEXT:    fmov s0, w8
997; CHECK-SD-NEXT:    ldr w8, [sp, #16]
998; CHECK-SD-NEXT:    mov v1.h[1], w1
999; CHECK-SD-NEXT:    mov v0.h[1], w9
1000; CHECK-SD-NEXT:    mov v1.h[2], w2
1001; CHECK-SD-NEXT:    mov v0.h[2], w8
1002; CHECK-SD-NEXT:    ldr w8, [sp, #24]
1003; CHECK-SD-NEXT:    mov v1.h[3], w3
1004; CHECK-SD-NEXT:    mov v0.h[3], w8
1005; CHECK-SD-NEXT:    ldr w8, [sp, #32]
1006; CHECK-SD-NEXT:    mov v1.h[4], w4
1007; CHECK-SD-NEXT:    mov v0.h[4], w8
1008; CHECK-SD-NEXT:    ldr w8, [sp, #40]
1009; CHECK-SD-NEXT:    mov v1.h[5], w5
1010; CHECK-SD-NEXT:    mov v0.h[5], w8
1011; CHECK-SD-NEXT:    ldr w8, [sp, #48]
1012; CHECK-SD-NEXT:    mov v1.h[6], w6
1013; CHECK-SD-NEXT:    mov v0.h[6], w8
1014; CHECK-SD-NEXT:    ldr w8, [sp, #56]
1015; CHECK-SD-NEXT:    mov v1.h[7], w7
1016; CHECK-SD-NEXT:    mov v0.h[7], w8
1017; CHECK-SD-NEXT:    shl v1.8h, v1.8h, #6
1018; CHECK-SD-NEXT:    shl v2.8h, v0.8h, #6
1019; CHECK-SD-NEXT:    sshr v0.8h, v1.8h, #6
1020; CHECK-SD-NEXT:    sshr v1.8h, v2.8h, #6
1021; CHECK-SD-NEXT:    ret
1022;
1023; CHECK-GI-LABEL: sext_v16i10_v16i16:
1024; CHECK-GI:       // %bb.0: // %entry
1025; CHECK-GI-NEXT:    ldr w8, [sp]
1026; CHECK-GI-NEXT:    fmov s0, w0
1027; CHECK-GI-NEXT:    ldr w9, [sp, #8]
1028; CHECK-GI-NEXT:    fmov s1, w8
1029; CHECK-GI-NEXT:    ldr w8, [sp, #16]
1030; CHECK-GI-NEXT:    mov v0.h[1], w1
1031; CHECK-GI-NEXT:    mov v1.h[1], w9
1032; CHECK-GI-NEXT:    mov v0.h[2], w2
1033; CHECK-GI-NEXT:    mov v1.h[2], w8
1034; CHECK-GI-NEXT:    ldr w8, [sp, #24]
1035; CHECK-GI-NEXT:    mov v0.h[3], w3
1036; CHECK-GI-NEXT:    mov v1.h[3], w8
1037; CHECK-GI-NEXT:    ldr w8, [sp, #32]
1038; CHECK-GI-NEXT:    mov v0.h[4], w4
1039; CHECK-GI-NEXT:    mov v1.h[4], w8
1040; CHECK-GI-NEXT:    ldr w8, [sp, #40]
1041; CHECK-GI-NEXT:    mov v0.h[5], w5
1042; CHECK-GI-NEXT:    mov v1.h[5], w8
1043; CHECK-GI-NEXT:    ldr w8, [sp, #48]
1044; CHECK-GI-NEXT:    mov v0.h[6], w6
1045; CHECK-GI-NEXT:    mov v1.h[6], w8
1046; CHECK-GI-NEXT:    ldr w8, [sp, #56]
1047; CHECK-GI-NEXT:    mov v0.h[7], w7
1048; CHECK-GI-NEXT:    mov v1.h[7], w8
1049; CHECK-GI-NEXT:    shl v0.8h, v0.8h, #6
1050; CHECK-GI-NEXT:    shl v1.8h, v1.8h, #6
1051; CHECK-GI-NEXT:    sshr v0.8h, v0.8h, #6
1052; CHECK-GI-NEXT:    sshr v1.8h, v1.8h, #6
1053; CHECK-GI-NEXT:    ret
1054entry:
1055  %c = sext <16 x i10> %a to <16 x i16>
1056  ret <16 x i16> %c
1057}
1058
1059define <16 x i32> @sext_v16i10_v16i32(<16 x i10> %a) {
1060; CHECK-SD-LABEL: sext_v16i10_v16i32:
1061; CHECK-SD:       // %bb.0: // %entry
1062; CHECK-SD-NEXT:    ldr w8, [sp, #32]
1063; CHECK-SD-NEXT:    ldr w9, [sp]
1064; CHECK-SD-NEXT:    fmov s0, w0
1065; CHECK-SD-NEXT:    fmov s1, w4
1066; CHECK-SD-NEXT:    ldr w10, [sp, #40]
1067; CHECK-SD-NEXT:    ldr w11, [sp, #8]
1068; CHECK-SD-NEXT:    fmov s2, w9
1069; CHECK-SD-NEXT:    fmov s3, w8
1070; CHECK-SD-NEXT:    ldr w8, [sp, #48]
1071; CHECK-SD-NEXT:    mov v0.h[1], w1
1072; CHECK-SD-NEXT:    ldr w9, [sp, #16]
1073; CHECK-SD-NEXT:    mov v1.h[1], w5
1074; CHECK-SD-NEXT:    mov v2.h[1], w11
1075; CHECK-SD-NEXT:    mov v3.h[1], w10
1076; CHECK-SD-NEXT:    mov v0.h[2], w2
1077; CHECK-SD-NEXT:    mov v1.h[2], w6
1078; CHECK-SD-NEXT:    mov v2.h[2], w9
1079; CHECK-SD-NEXT:    mov v3.h[2], w8
1080; CHECK-SD-NEXT:    ldr w8, [sp, #56]
1081; CHECK-SD-NEXT:    ldr w9, [sp, #24]
1082; CHECK-SD-NEXT:    mov v0.h[3], w3
1083; CHECK-SD-NEXT:    mov v1.h[3], w7
1084; CHECK-SD-NEXT:    mov v2.h[3], w9
1085; CHECK-SD-NEXT:    mov v3.h[3], w8
1086; CHECK-SD-NEXT:    ushll v0.4s, v0.4h, #0
1087; CHECK-SD-NEXT:    ushll v1.4s, v1.4h, #0
1088; CHECK-SD-NEXT:    ushll v2.4s, v2.4h, #0
1089; CHECK-SD-NEXT:    ushll v3.4s, v3.4h, #0
1090; CHECK-SD-NEXT:    shl v0.4s, v0.4s, #22
1091; CHECK-SD-NEXT:    shl v1.4s, v1.4s, #22
1092; CHECK-SD-NEXT:    shl v2.4s, v2.4s, #22
1093; CHECK-SD-NEXT:    shl v3.4s, v3.4s, #22
1094; CHECK-SD-NEXT:    sshr v0.4s, v0.4s, #22
1095; CHECK-SD-NEXT:    sshr v1.4s, v1.4s, #22
1096; CHECK-SD-NEXT:    sshr v2.4s, v2.4s, #22
1097; CHECK-SD-NEXT:    sshr v3.4s, v3.4s, #22
1098; CHECK-SD-NEXT:    ret
1099;
1100; CHECK-GI-LABEL: sext_v16i10_v16i32:
1101; CHECK-GI:       // %bb.0: // %entry
1102; CHECK-GI-NEXT:    ldr w8, [sp]
1103; CHECK-GI-NEXT:    ldr w9, [sp, #32]
1104; CHECK-GI-NEXT:    fmov s0, w0
1105; CHECK-GI-NEXT:    fmov s1, w4
1106; CHECK-GI-NEXT:    ldr w10, [sp, #8]
1107; CHECK-GI-NEXT:    ldr w11, [sp, #40]
1108; CHECK-GI-NEXT:    fmov s2, w8
1109; CHECK-GI-NEXT:    fmov s3, w9
1110; CHECK-GI-NEXT:    ldr w8, [sp, #16]
1111; CHECK-GI-NEXT:    mov v0.h[1], w1
1112; CHECK-GI-NEXT:    ldr w9, [sp, #48]
1113; CHECK-GI-NEXT:    mov v1.h[1], w5
1114; CHECK-GI-NEXT:    mov v2.h[1], w10
1115; CHECK-GI-NEXT:    mov v3.h[1], w11
1116; CHECK-GI-NEXT:    mov v0.h[2], w2
1117; CHECK-GI-NEXT:    mov v1.h[2], w6
1118; CHECK-GI-NEXT:    mov v2.h[2], w8
1119; CHECK-GI-NEXT:    mov v3.h[2], w9
1120; CHECK-GI-NEXT:    ldr w8, [sp, #24]
1121; CHECK-GI-NEXT:    ldr w9, [sp, #56]
1122; CHECK-GI-NEXT:    mov v0.h[3], w3
1123; CHECK-GI-NEXT:    mov v1.h[3], w7
1124; CHECK-GI-NEXT:    mov v2.h[3], w8
1125; CHECK-GI-NEXT:    mov v3.h[3], w9
1126; CHECK-GI-NEXT:    ushll v0.4s, v0.4h, #0
1127; CHECK-GI-NEXT:    ushll v1.4s, v1.4h, #0
1128; CHECK-GI-NEXT:    ushll v2.4s, v2.4h, #0
1129; CHECK-GI-NEXT:    ushll v3.4s, v3.4h, #0
1130; CHECK-GI-NEXT:    shl v0.4s, v0.4s, #22
1131; CHECK-GI-NEXT:    shl v1.4s, v1.4s, #22
1132; CHECK-GI-NEXT:    shl v2.4s, v2.4s, #22
1133; CHECK-GI-NEXT:    shl v3.4s, v3.4s, #22
1134; CHECK-GI-NEXT:    sshr v0.4s, v0.4s, #22
1135; CHECK-GI-NEXT:    sshr v1.4s, v1.4s, #22
1136; CHECK-GI-NEXT:    sshr v2.4s, v2.4s, #22
1137; CHECK-GI-NEXT:    sshr v3.4s, v3.4s, #22
1138; CHECK-GI-NEXT:    ret
1139entry:
1140  %c = sext <16 x i10> %a to <16 x i32>
1141  ret <16 x i32> %c
1142}
1143
1144define <16 x i64> @sext_v16i10_v16i64(<16 x i10> %a) {
1145; CHECK-SD-LABEL: sext_v16i10_v16i64:
1146; CHECK-SD:       // %bb.0: // %entry
1147; CHECK-SD-NEXT:    fmov s0, w2
1148; CHECK-SD-NEXT:    fmov s1, w0
1149; CHECK-SD-NEXT:    ldr s2, [sp]
1150; CHECK-SD-NEXT:    fmov s3, w4
1151; CHECK-SD-NEXT:    fmov s4, w6
1152; CHECK-SD-NEXT:    add x8, sp, #8
1153; CHECK-SD-NEXT:    ldr s5, [sp, #16]
1154; CHECK-SD-NEXT:    ldr s6, [sp, #32]
1155; CHECK-SD-NEXT:    ldr s7, [sp, #48]
1156; CHECK-SD-NEXT:    mov v1.s[1], w1
1157; CHECK-SD-NEXT:    mov v0.s[1], w3
1158; CHECK-SD-NEXT:    ld1 { v2.s }[1], [x8]
1159; CHECK-SD-NEXT:    mov v3.s[1], w5
1160; CHECK-SD-NEXT:    mov v4.s[1], w7
1161; CHECK-SD-NEXT:    add x8, sp, #24
1162; CHECK-SD-NEXT:    add x9, sp, #40
1163; CHECK-SD-NEXT:    add x10, sp, #56
1164; CHECK-SD-NEXT:    ld1 { v5.s }[1], [x8]
1165; CHECK-SD-NEXT:    ld1 { v6.s }[1], [x9]
1166; CHECK-SD-NEXT:    ld1 { v7.s }[1], [x10]
1167; CHECK-SD-NEXT:    ushll v2.2d, v2.2s, #0
1168; CHECK-SD-NEXT:    ushll v1.2d, v1.2s, #0
1169; CHECK-SD-NEXT:    ushll v0.2d, v0.2s, #0
1170; CHECK-SD-NEXT:    ushll v3.2d, v3.2s, #0
1171; CHECK-SD-NEXT:    ushll v4.2d, v4.2s, #0
1172; CHECK-SD-NEXT:    ushll v5.2d, v5.2s, #0
1173; CHECK-SD-NEXT:    ushll v6.2d, v6.2s, #0
1174; CHECK-SD-NEXT:    ushll v7.2d, v7.2s, #0
1175; CHECK-SD-NEXT:    shl v17.2d, v2.2d, #54
1176; CHECK-SD-NEXT:    shl v1.2d, v1.2d, #54
1177; CHECK-SD-NEXT:    shl v16.2d, v0.2d, #54
1178; CHECK-SD-NEXT:    shl v3.2d, v3.2d, #54
1179; CHECK-SD-NEXT:    shl v4.2d, v4.2d, #54
1180; CHECK-SD-NEXT:    shl v5.2d, v5.2d, #54
1181; CHECK-SD-NEXT:    shl v6.2d, v6.2d, #54
1182; CHECK-SD-NEXT:    shl v7.2d, v7.2d, #54
1183; CHECK-SD-NEXT:    sshr v0.2d, v1.2d, #54
1184; CHECK-SD-NEXT:    sshr v1.2d, v16.2d, #54
1185; CHECK-SD-NEXT:    sshr v2.2d, v3.2d, #54
1186; CHECK-SD-NEXT:    sshr v3.2d, v4.2d, #54
1187; CHECK-SD-NEXT:    sshr v4.2d, v17.2d, #54
1188; CHECK-SD-NEXT:    sshr v5.2d, v5.2d, #54
1189; CHECK-SD-NEXT:    sshr v6.2d, v6.2d, #54
1190; CHECK-SD-NEXT:    sshr v7.2d, v7.2d, #54
1191; CHECK-SD-NEXT:    ret
1192;
1193; CHECK-GI-LABEL: sext_v16i10_v16i64:
1194; CHECK-GI:       // %bb.0: // %entry
1195; CHECK-GI-NEXT:    mov v1.s[0], w0
1196; CHECK-GI-NEXT:    mov v2.s[0], w2
1197; CHECK-GI-NEXT:    ldr s0, [sp]
1198; CHECK-GI-NEXT:    mov v3.s[0], w4
1199; CHECK-GI-NEXT:    mov v4.s[0], w6
1200; CHECK-GI-NEXT:    ldr s5, [sp, #8]
1201; CHECK-GI-NEXT:    ldr s6, [sp, #16]
1202; CHECK-GI-NEXT:    ldr s7, [sp, #24]
1203; CHECK-GI-NEXT:    ldr s16, [sp, #32]
1204; CHECK-GI-NEXT:    ldr s17, [sp, #40]
1205; CHECK-GI-NEXT:    ldr s18, [sp, #48]
1206; CHECK-GI-NEXT:    ldr s19, [sp, #56]
1207; CHECK-GI-NEXT:    mov v1.s[1], w1
1208; CHECK-GI-NEXT:    mov v0.s[1], v5.s[0]
1209; CHECK-GI-NEXT:    mov v2.s[1], w3
1210; CHECK-GI-NEXT:    mov v3.s[1], w5
1211; CHECK-GI-NEXT:    mov v4.s[1], w7
1212; CHECK-GI-NEXT:    mov v6.s[1], v7.s[0]
1213; CHECK-GI-NEXT:    mov v16.s[1], v17.s[0]
1214; CHECK-GI-NEXT:    mov v18.s[1], v19.s[0]
1215; CHECK-GI-NEXT:    ushll v0.2d, v0.2s, #0
1216; CHECK-GI-NEXT:    ushll v1.2d, v1.2s, #0
1217; CHECK-GI-NEXT:    ushll v2.2d, v2.2s, #0
1218; CHECK-GI-NEXT:    ushll v3.2d, v3.2s, #0
1219; CHECK-GI-NEXT:    ushll v4.2d, v4.2s, #0
1220; CHECK-GI-NEXT:    ushll v5.2d, v6.2s, #0
1221; CHECK-GI-NEXT:    ushll v6.2d, v16.2s, #0
1222; CHECK-GI-NEXT:    ushll v7.2d, v18.2s, #0
1223; CHECK-GI-NEXT:    shl v0.2d, v0.2d, #54
1224; CHECK-GI-NEXT:    shl v1.2d, v1.2d, #54
1225; CHECK-GI-NEXT:    shl v2.2d, v2.2d, #54
1226; CHECK-GI-NEXT:    shl v3.2d, v3.2d, #54
1227; CHECK-GI-NEXT:    shl v16.2d, v4.2d, #54
1228; CHECK-GI-NEXT:    shl v5.2d, v5.2d, #54
1229; CHECK-GI-NEXT:    shl v6.2d, v6.2d, #54
1230; CHECK-GI-NEXT:    shl v7.2d, v7.2d, #54
1231; CHECK-GI-NEXT:    sshr v4.2d, v0.2d, #54
1232; CHECK-GI-NEXT:    sshr v0.2d, v1.2d, #54
1233; CHECK-GI-NEXT:    sshr v1.2d, v2.2d, #54
1234; CHECK-GI-NEXT:    sshr v2.2d, v3.2d, #54
1235; CHECK-GI-NEXT:    sshr v3.2d, v16.2d, #54
1236; CHECK-GI-NEXT:    sshr v5.2d, v5.2d, #54
1237; CHECK-GI-NEXT:    sshr v6.2d, v6.2d, #54
1238; CHECK-GI-NEXT:    sshr v7.2d, v7.2d, #54
1239; CHECK-GI-NEXT:    ret
1240entry:
1241  %c = sext <16 x i10> %a to <16 x i64>
1242  ret <16 x i64> %c
1243}
1244