xref: /llvm-project/llvm/test/CodeGen/AArch64/const-isel.ll (revision 90b60f9cd6eacfd16ac1c475aa9050e223513981)
1*90b60f9cSzhongyunde; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2*90b60f9cSzhongyunde; RUN: llc -mtriple=aarch64-none-linux-gnu -fast-isel -verify-machineinstrs < %s | FileCheck %s --check-prefix=FISEL
3*90b60f9cSzhongyunde
4*90b60f9cSzhongyundedefine i53 @PR59892 () {
5*90b60f9cSzhongyunde; FISEL-LABEL: PR59892:
6*90b60f9cSzhongyunde; FISEL:       // %bb.0:
7*90b60f9cSzhongyunde; FISEL-NEXT:    mov x8, #47668
8*90b60f9cSzhongyunde; FISEL-NEXT:    movk x8, #4645, lsl #16
9*90b60f9cSzhongyunde; FISEL-NEXT:    movk x8, #58741, lsl #32
10*90b60f9cSzhongyunde; FISEL-NEXT:    movk x8, #1, lsl #48
11*90b60f9cSzhongyunde; FISEL-NEXT:    orr x9, x8, #0x2
12*90b60f9cSzhongyunde; FISEL-NEXT:    mul x0, x9, x8
13*90b60f9cSzhongyunde; FISEL-NEXT:    ret
14*90b60f9cSzhongyunde  %a = mul nsw i53 533765955107380, 533765955107382
15*90b60f9cSzhongyunde  ret i53 %a
16*90b60f9cSzhongyunde}
17