10c132674SPhilip Reames; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py 2400b725cSLuke Lau; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-fixed-length-vector-lmul-max=1 < %s | FileCheck %s 380b44517SElvis Wang; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-fixed-length-vector-lmul-max=1 --type-based-intrinsic-cost=true < %s | FileCheck %s 40c132674SPhilip Reames; Check that we don't crash querying costs when vectors are not enabled. 54178e334SSimon Pilgrim; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64 60c132674SPhilip Reames 70c132674SPhilip Reamesdefine void @select() { 80c132674SPhilip Reames; CHECK-LABEL: 'select' 90c132674SPhilip Reames; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = select i1 undef, i1 undef, i1 undef 109b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %2 = select i1 undef, <1 x i1> undef, <1 x i1> undef 119b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %3 = select i1 undef, <2 x i1> undef, <2 x i1> undef 129b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %4 = select i1 undef, <4 x i1> undef, <4 x i1> undef 139b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %5 = select i1 undef, <8 x i1> undef, <8 x i1> undef 149b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %6 = select i1 undef, <16 x i1> undef, <16 x i1> undef 159b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %7 = select i1 undef, <32 x i1> undef, <32 x i1> undef 169b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %8 = select <1 x i1> undef, <1 x i1> undef, <1 x i1> undef 179b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %9 = select <2 x i1> undef, <2 x i1> undef, <2 x i1> undef 189b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %10 = select <4 x i1> undef, <4 x i1> undef, <4 x i1> undef 199b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %11 = select <8 x i1> undef, <8 x i1> undef, <8 x i1> undef 209b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %12 = select <16 x i1> undef, <16 x i1> undef, <16 x i1> undef 219b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %13 = select <32 x i1> undef, <32 x i1> undef, <32 x i1> undef 229b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %14 = select i1 undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef 239b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %15 = select i1 undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef 249b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %16 = select i1 undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef 259b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %17 = select i1 undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef 26097b68ffSShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %18 = select i1 undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef 27097b68ffSShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %19 = select i1 undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef 289b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %20 = select <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef 299b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %21 = select <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef 309b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %22 = select <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef 319b4e75eeSliqinweng; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %23 = select <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef 32097b68ffSShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %24 = select <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef 33097b68ffSShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %25 = select <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef 3480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %26 = call <1 x i1> @llvm.vp.select.v1i1(<1 x i1> undef, <1 x i1> undef, <1 x i1> undef, i32 undef) 3580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %27 = call <2 x i1> @llvm.vp.select.v2i1(<2 x i1> undef, <2 x i1> undef, <2 x i1> undef, i32 undef) 3680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %28 = call <4 x i1> @llvm.vp.select.v4i1(<4 x i1> undef, <4 x i1> undef, <4 x i1> undef, i32 undef) 3780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %29 = call <8 x i1> @llvm.vp.select.v8i1(<8 x i1> undef, <8 x i1> undef, <8 x i1> undef, i32 undef) 3880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %30 = call <16 x i1> @llvm.vp.select.v16i1(<16 x i1> undef, <16 x i1> undef, <16 x i1> undef, i32 undef) 3980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %31 = call <32 x i1> @llvm.vp.select.v32i1(<32 x i1> undef, <32 x i1> undef, <32 x i1> undef, i32 undef) 4080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %32 = call <vscale x 1 x i1> @llvm.vp.select.nxv1i1(<vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, i32 undef) 4180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %33 = call <vscale x 2 x i1> @llvm.vp.select.nxv2i1(<vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, i32 undef) 4280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %34 = call <vscale x 4 x i1> @llvm.vp.select.nxv4i1(<vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, i32 undef) 4380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %35 = call <vscale x 8 x i1> @llvm.vp.select.nxv8i1(<vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, i32 undef) 4480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %36 = call <vscale x 16 x i1> @llvm.vp.select.nxv16i1(<vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, i32 undef) 4580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %37 = call <vscale x 32 x i1> @llvm.vp.select.nxv32i1(<vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, i32 undef) 4680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %38 = select i1 undef, i8 undef, i8 undef 4780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %39 = select i1 undef, <1 x i8> undef, <1 x i8> undef 4880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %40 = select i1 undef, <2 x i8> undef, <2 x i8> undef 4980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %41 = select i1 undef, <4 x i8> undef, <4 x i8> undef 5080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %42 = select i1 undef, <8 x i8> undef, <8 x i8> undef 5180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %43 = select i1 undef, <16 x i8> undef, <16 x i8> undef 5280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %44 = select i1 undef, <32 x i8> undef, <32 x i8> undef 5380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %45 = select <1 x i1> undef, <1 x i8> undef, <1 x i8> undef 5480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %46 = select <2 x i1> undef, <2 x i8> undef, <2 x i8> undef 5580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %47 = select <4 x i1> undef, <4 x i8> undef, <4 x i8> undef 5680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %48 = select <8 x i1> undef, <8 x i8> undef, <8 x i8> undef 5780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %49 = select <16 x i1> undef, <16 x i8> undef, <16 x i8> undef 5880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %50 = select <32 x i1> undef, <32 x i8> undef, <32 x i8> undef 5980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %51 = select i1 undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef 6080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %52 = select i1 undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef 6180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %53 = select i1 undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef 6280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %54 = select i1 undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef 6380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %55 = select i1 undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef 6480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %56 = select i1 undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef 6580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %57 = select <vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef 6680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %58 = select <vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef 6780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %59 = select <vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef 6880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %60 = select <vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef 6980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %61 = select <vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef 7080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %62 = select <vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef 7180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %63 = call <1 x i8> @llvm.vp.select.v1i8(<1 x i1> undef, <1 x i8> undef, <1 x i8> undef, i32 undef) 7280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %64 = call <2 x i8> @llvm.vp.select.v2i8(<2 x i1> undef, <2 x i8> undef, <2 x i8> undef, i32 undef) 7380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %65 = call <4 x i8> @llvm.vp.select.v4i8(<4 x i1> undef, <4 x i8> undef, <4 x i8> undef, i32 undef) 7480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %66 = call <8 x i8> @llvm.vp.select.v8i8(<8 x i1> undef, <8 x i8> undef, <8 x i8> undef, i32 undef) 7580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %67 = call <16 x i8> @llvm.vp.select.v16i8(<16 x i1> undef, <16 x i8> undef, <16 x i8> undef, i32 undef) 7680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %68 = call <32 x i8> @llvm.vp.select.v32i8(<32 x i1> undef, <32 x i8> undef, <32 x i8> undef, i32 undef) 7780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %69 = call <vscale x 1 x i8> @llvm.vp.select.nxv1i8(<vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef, i32 undef) 7880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %70 = call <vscale x 2 x i8> @llvm.vp.select.nxv2i8(<vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef, i32 undef) 7980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %71 = call <vscale x 4 x i8> @llvm.vp.select.nxv4i8(<vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef, i32 undef) 8080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %72 = call <vscale x 8 x i8> @llvm.vp.select.nxv8i8(<vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef, i32 undef) 8180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %73 = call <vscale x 16 x i8> @llvm.vp.select.nxv16i8(<vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, i32 undef) 8280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %74 = call <vscale x 32 x i8> @llvm.vp.select.nxv32i8(<vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef, i32 undef) 8380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %75 = select i1 undef, i16 undef, i16 undef 8480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %76 = select i1 undef, <1 x i16> undef, <1 x i16> undef 8580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %77 = select i1 undef, <2 x i16> undef, <2 x i16> undef 8680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %78 = select i1 undef, <4 x i16> undef, <4 x i16> undef 8780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %79 = select i1 undef, <8 x i16> undef, <8 x i16> undef 8880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %80 = select i1 undef, <16 x i16> undef, <16 x i16> undef 8980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %81 = select i1 undef, <32 x i16> undef, <32 x i16> undef 9080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %82 = select <1 x i1> undef, <1 x i16> undef, <1 x i16> undef 9180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %83 = select <2 x i1> undef, <2 x i16> undef, <2 x i16> undef 9280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %84 = select <4 x i1> undef, <4 x i16> undef, <4 x i16> undef 9380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %85 = select <8 x i1> undef, <8 x i16> undef, <8 x i16> undef 9480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %86 = select <16 x i1> undef, <16 x i16> undef, <16 x i16> undef 9580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %87 = select <32 x i1> undef, <32 x i16> undef, <32 x i16> undef 9680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %88 = select i1 undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef 9780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %89 = select i1 undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef 9880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %90 = select i1 undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef 9980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %91 = select i1 undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef 10080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %92 = select i1 undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef 10180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %93 = select i1 undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef 10280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %94 = select <vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef 10380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %95 = select <vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef 10480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %96 = select <vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef 10580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %97 = select <vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef 10680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %98 = select <vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef 10780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %99 = select <vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef 10880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %100 = call <1 x i16> @llvm.vp.select.v1i16(<1 x i1> undef, <1 x i16> undef, <1 x i16> undef, i32 undef) 10980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %101 = call <2 x i16> @llvm.vp.select.v2i16(<2 x i1> undef, <2 x i16> undef, <2 x i16> undef, i32 undef) 11080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %102 = call <4 x i16> @llvm.vp.select.v4i16(<4 x i1> undef, <4 x i16> undef, <4 x i16> undef, i32 undef) 11180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %103 = call <8 x i16> @llvm.vp.select.v8i16(<8 x i1> undef, <8 x i16> undef, <8 x i16> undef, i32 undef) 11280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %104 = call <16 x i16> @llvm.vp.select.v16i16(<16 x i1> undef, <16 x i16> undef, <16 x i16> undef, i32 undef) 11380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %105 = call <32 x i16> @llvm.vp.select.v32i16(<32 x i1> undef, <32 x i16> undef, <32 x i16> undef, i32 undef) 11480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %106 = call <vscale x 1 x i16> @llvm.vp.select.nxv1i16(<vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef, i32 undef) 11580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %107 = call <vscale x 2 x i16> @llvm.vp.select.nxv2i16(<vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef, i32 undef) 11680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %108 = call <vscale x 4 x i16> @llvm.vp.select.nxv4i16(<vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef, i32 undef) 11780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %109 = call <vscale x 8 x i16> @llvm.vp.select.nxv8i16(<vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef, i32 undef) 11880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %110 = call <vscale x 16 x i16> @llvm.vp.select.nxv16i16(<vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef, i32 undef) 11980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %111 = call <vscale x 32 x i16> @llvm.vp.select.nxv32i16(<vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef, i32 undef) 12080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %112 = select i1 undef, i32 undef, i32 undef 12180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %113 = select i1 undef, <1 x i32> undef, <1 x i32> undef 12280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %114 = select i1 undef, <2 x i32> undef, <2 x i32> undef 12380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %115 = select i1 undef, <4 x i32> undef, <4 x i32> undef 12480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %116 = select i1 undef, <8 x i32> undef, <8 x i32> undef 12580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %117 = select i1 undef, <16 x i32> undef, <16 x i32> undef 12680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %118 = select i1 undef, <32 x i32> undef, <32 x i32> undef 12780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %119 = select <1 x i1> undef, <1 x i32> undef, <1 x i32> undef 12880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %120 = select <2 x i1> undef, <2 x i32> undef, <2 x i32> undef 12980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %121 = select <4 x i1> undef, <4 x i32> undef, <4 x i32> undef 13080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %122 = select <8 x i1> undef, <8 x i32> undef, <8 x i32> undef 13180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %123 = select <16 x i1> undef, <16 x i32> undef, <16 x i32> undef 13280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %124 = select <32 x i1> undef, <32 x i32> undef, <32 x i32> undef 13380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %125 = select i1 undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef 13480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %126 = select i1 undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef 13580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %127 = select i1 undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef 13680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %128 = select i1 undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef 13780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %129 = select i1 undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef 13880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %130 = select i1 undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef 13980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %131 = select <vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef 14080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %132 = select <vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef 14180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %133 = select <vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef 14280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %134 = select <vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef 14380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %135 = select <vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef 14480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %136 = select <vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef 14580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %137 = call <1 x i32> @llvm.vp.select.v1i32(<1 x i1> undef, <1 x i32> undef, <1 x i32> undef, i32 undef) 14680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %138 = call <2 x i32> @llvm.vp.select.v2i32(<2 x i1> undef, <2 x i32> undef, <2 x i32> undef, i32 undef) 14780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %139 = call <4 x i32> @llvm.vp.select.v4i32(<4 x i1> undef, <4 x i32> undef, <4 x i32> undef, i32 undef) 14880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %140 = call <8 x i32> @llvm.vp.select.v8i32(<8 x i1> undef, <8 x i32> undef, <8 x i32> undef, i32 undef) 14980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %141 = call <16 x i32> @llvm.vp.select.v16i32(<16 x i1> undef, <16 x i32> undef, <16 x i32> undef, i32 undef) 15080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %142 = call <32 x i32> @llvm.vp.select.v32i32(<32 x i1> undef, <32 x i32> undef, <32 x i32> undef, i32 undef) 15180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %143 = call <vscale x 1 x i32> @llvm.vp.select.nxv1i32(<vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef, i32 undef) 15280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %144 = call <vscale x 2 x i32> @llvm.vp.select.nxv2i32(<vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef, i32 undef) 15380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %145 = call <vscale x 4 x i32> @llvm.vp.select.nxv4i32(<vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef, i32 undef) 15480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %146 = call <vscale x 8 x i32> @llvm.vp.select.nxv8i32(<vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef, i32 undef) 15580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %147 = call <vscale x 16 x i32> @llvm.vp.select.nxv16i32(<vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef, i32 undef) 15680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %148 = call <vscale x 32 x i32> @llvm.vp.select.nxv32i32(<vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef, i32 undef) 15780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %149 = select i1 undef, i64 undef, i64 undef 15880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %150 = select i1 undef, <1 x i64> undef, <1 x i64> undef 15980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %151 = select i1 undef, <2 x i64> undef, <2 x i64> undef 16080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %152 = select i1 undef, <4 x i64> undef, <4 x i64> undef 16180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %153 = select i1 undef, <8 x i64> undef, <8 x i64> undef 16280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %154 = select i1 undef, <16 x i64> undef, <16 x i64> undef 16380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %155 = select i1 undef, <32 x i64> undef, <32 x i64> undef 16480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %156 = select <1 x i1> undef, <1 x i64> undef, <1 x i64> undef 16580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %157 = select <2 x i1> undef, <2 x i64> undef, <2 x i64> undef 16680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %158 = select <4 x i1> undef, <4 x i64> undef, <4 x i64> undef 16780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %159 = select <8 x i1> undef, <8 x i64> undef, <8 x i64> undef 16880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %160 = select <16 x i1> undef, <16 x i64> undef, <16 x i64> undef 16980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %161 = select <32 x i1> undef, <32 x i64> undef, <32 x i64> undef 17080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %162 = select i1 undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef 17180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %163 = select i1 undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef 17280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %164 = select i1 undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef 17380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %165 = select i1 undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef 17480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %166 = select i1 undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef 17580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %167 = select i1 undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef 17680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %168 = select <vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef 17780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %169 = select <vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef 17880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %170 = select <vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef 17980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %171 = select <vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef 18080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %172 = select <vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef 18180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %173 = select <vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef 18280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %174 = call <1 x i64> @llvm.vp.select.v1i64(<1 x i1> undef, <1 x i64> undef, <1 x i64> undef, i32 undef) 18380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %175 = call <2 x i64> @llvm.vp.select.v2i64(<2 x i1> undef, <2 x i64> undef, <2 x i64> undef, i32 undef) 18480b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %176 = call <4 x i64> @llvm.vp.select.v4i64(<4 x i1> undef, <4 x i64> undef, <4 x i64> undef, i32 undef) 18580b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %177 = call <8 x i64> @llvm.vp.select.v8i64(<8 x i1> undef, <8 x i64> undef, <8 x i64> undef, i32 undef) 18680b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %178 = call <16 x i64> @llvm.vp.select.v16i64(<16 x i1> undef, <16 x i64> undef, <16 x i64> undef, i32 undef) 18780b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %179 = call <32 x i64> @llvm.vp.select.v32i64(<32 x i1> undef, <32 x i64> undef, <32 x i64> undef, i32 undef) 18880b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %180 = call <vscale x 1 x i64> @llvm.vp.select.nxv1i64(<vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef, i32 undef) 18980b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %181 = call <vscale x 2 x i64> @llvm.vp.select.nxv2i64(<vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef, i32 undef) 19080b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %182 = call <vscale x 4 x i64> @llvm.vp.select.nxv4i64(<vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef, i32 undef) 19180b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %183 = call <vscale x 8 x i64> @llvm.vp.select.nxv8i64(<vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef, i32 undef) 19280b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %184 = call <vscale x 16 x i64> @llvm.vp.select.nxv16i64(<vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef, i32 undef) 19380b44517SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %185 = call <vscale x 32 x i64> @llvm.vp.select.nxv32i64(<vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef, i32 undef) 1940a5d52a7SSergey Kachkov; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void 1950c132674SPhilip Reames; 1960c132674SPhilip Reames select i1 undef, i1 undef, i1 undef 1979b4e75eeSliqinweng select i1 undef, <1 x i1> undef, <1 x i1> undef 1989b4e75eeSliqinweng select i1 undef, <2 x i1> undef, <2 x i1> undef 1999b4e75eeSliqinweng select i1 undef, <4 x i1> undef, <4 x i1> undef 2009b4e75eeSliqinweng select i1 undef, <8 x i1> undef, <8 x i1> undef 2019b4e75eeSliqinweng select i1 undef, <16 x i1> undef, <16 x i1> undef 2029b4e75eeSliqinweng select i1 undef, <32 x i1> undef, <32 x i1> undef 2030c132674SPhilip Reames select <1 x i1> undef, <1 x i1> undef, <1 x i1> undef 2040c132674SPhilip Reames select <2 x i1> undef, <2 x i1> undef, <2 x i1> undef 2050c132674SPhilip Reames select <4 x i1> undef, <4 x i1> undef, <4 x i1> undef 2060c132674SPhilip Reames select <8 x i1> undef, <8 x i1> undef, <8 x i1> undef 2070c132674SPhilip Reames select <16 x i1> undef, <16 x i1> undef, <16 x i1> undef 2080c132674SPhilip Reames select <32 x i1> undef, <32 x i1> undef, <32 x i1> undef 2099b4e75eeSliqinweng select i1 undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef 2109b4e75eeSliqinweng select i1 undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef 2119b4e75eeSliqinweng select i1 undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef 2129b4e75eeSliqinweng select i1 undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef 2139b4e75eeSliqinweng select i1 undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef 2149b4e75eeSliqinweng select i1 undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef 2150c132674SPhilip Reames select <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef 2160c132674SPhilip Reames select <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef 2170c132674SPhilip Reames select <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef 2180c132674SPhilip Reames select <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef 2190c132674SPhilip Reames select <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef 2200c132674SPhilip Reames select <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef 2210c132674SPhilip Reames 22280b44517SElvis Wang call <1 x i1> @llvm.vp.select.v1i1(<1 x i1> undef, <1 x i1> undef, <1 x i1> undef, i32 undef) 22380b44517SElvis Wang call <2 x i1> @llvm.vp.select.v2i1(<2 x i1> undef, <2 x i1> undef, <2 x i1> undef, i32 undef) 22480b44517SElvis Wang call <4 x i1> @llvm.vp.select.v4i1(<4 x i1> undef, <4 x i1> undef, <4 x i1> undef, i32 undef) 22580b44517SElvis Wang call <8 x i1> @llvm.vp.select.v8i1(<8 x i1> undef, <8 x i1> undef, <8 x i1> undef, i32 undef) 22680b44517SElvis Wang call <16 x i1> @llvm.vp.select.v16i1(<16 x i1> undef, <16 x i1> undef, <16 x i1> undef, i32 undef) 22780b44517SElvis Wang call <32 x i1> @llvm.vp.select.v32i1(<32 x i1> undef, <32 x i1> undef, <32 x i1> undef, i32 undef) 22880b44517SElvis Wang call <vscale x 1 x i1> @llvm.vp.select.nxv1i1(<vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, i32 undef) 22980b44517SElvis Wang call <vscale x 2 x i1> @llvm.vp.select.nxv2i1(<vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, i32 undef) 23080b44517SElvis Wang call <vscale x 4 x i1> @llvm.vp.select.nxv4i1(<vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, i32 undef) 23180b44517SElvis Wang call <vscale x 8 x i1> @llvm.vp.select.nxv8i1(<vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, i32 undef) 23280b44517SElvis Wang call <vscale x 16 x i1> @llvm.vp.select.nxv16i1(<vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, i32 undef) 23380b44517SElvis Wang call <vscale x 32 x i1> @llvm.vp.select.nxv32i1(<vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, i32 undef) 23480b44517SElvis Wang 2350c132674SPhilip Reames select i1 undef, i8 undef, i8 undef 2369b4e75eeSliqinweng select i1 undef, <1 x i8> undef, <1 x i8> undef 2379b4e75eeSliqinweng select i1 undef, <2 x i8> undef, <2 x i8> undef 2389b4e75eeSliqinweng select i1 undef, <4 x i8> undef, <4 x i8> undef 2399b4e75eeSliqinweng select i1 undef, <8 x i8> undef, <8 x i8> undef 2409b4e75eeSliqinweng select i1 undef, <16 x i8> undef, <16 x i8> undef 2419b4e75eeSliqinweng select i1 undef, <32 x i8> undef, <32 x i8> undef 2420c132674SPhilip Reames select <1 x i1> undef, <1 x i8> undef, <1 x i8> undef 2430c132674SPhilip Reames select <2 x i1> undef, <2 x i8> undef, <2 x i8> undef 2440c132674SPhilip Reames select <4 x i1> undef, <4 x i8> undef, <4 x i8> undef 2450c132674SPhilip Reames select <8 x i1> undef, <8 x i8> undef, <8 x i8> undef 2460c132674SPhilip Reames select <16 x i1> undef, <16 x i8> undef, <16 x i8> undef 2470c132674SPhilip Reames select <32 x i1> undef, <32 x i8> undef, <32 x i8> undef 2489b4e75eeSliqinweng select i1 undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef 2499b4e75eeSliqinweng select i1 undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef 2509b4e75eeSliqinweng select i1 undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef 2519b4e75eeSliqinweng select i1 undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef 2529b4e75eeSliqinweng select i1 undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef 2539b4e75eeSliqinweng select i1 undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef 2540c132674SPhilip Reames select <vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef 2550c132674SPhilip Reames select <vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef 2560c132674SPhilip Reames select <vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef 2570c132674SPhilip Reames select <vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef 2580c132674SPhilip Reames select <vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef 2590c132674SPhilip Reames select <vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef 2600c132674SPhilip Reames 26180b44517SElvis Wang call <1 x i8> @llvm.vp.select.v1i8(<1 x i1> undef, <1 x i8> undef, <1 x i8> undef, i32 undef) 26280b44517SElvis Wang call <2 x i8> @llvm.vp.select.v2i8(<2 x i1> undef, <2 x i8> undef, <2 x i8> undef, i32 undef) 26380b44517SElvis Wang call <4 x i8> @llvm.vp.select.v4i8(<4 x i1> undef, <4 x i8> undef, <4 x i8> undef, i32 undef) 26480b44517SElvis Wang call <8 x i8> @llvm.vp.select.v8i8(<8 x i1> undef, <8 x i8> undef, <8 x i8> undef, i32 undef) 26580b44517SElvis Wang call <16 x i8> @llvm.vp.select.v16i8(<16 x i1> undef, <16 x i8> undef, <16 x i8> undef, i32 undef) 26680b44517SElvis Wang call <32 x i8> @llvm.vp.select.v32i8(<32 x i1> undef, <32 x i8> undef, <32 x i8> undef, i32 undef) 26780b44517SElvis Wang call <vscale x 1 x i8> @llvm.vp.select.nxv1i8(<vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef, i32 undef) 26880b44517SElvis Wang call <vscale x 2 x i8> @llvm.vp.select.nxv2i8(<vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef, i32 undef) 26980b44517SElvis Wang call <vscale x 4 x i8> @llvm.vp.select.nxv4i8(<vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef, i32 undef) 27080b44517SElvis Wang call <vscale x 8 x i8> @llvm.vp.select.nxv8i8(<vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef, i32 undef) 27180b44517SElvis Wang call <vscale x 16 x i8> @llvm.vp.select.nxv16i8(<vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, i32 undef) 27280b44517SElvis Wang call <vscale x 32 x i8> @llvm.vp.select.nxv32i8(<vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef, i32 undef) 27380b44517SElvis Wang 2740c132674SPhilip Reames select i1 undef, i16 undef, i16 undef 2759b4e75eeSliqinweng select i1 undef, <1 x i16> undef, <1 x i16> undef 2769b4e75eeSliqinweng select i1 undef, <2 x i16> undef, <2 x i16> undef 2779b4e75eeSliqinweng select i1 undef, <4 x i16> undef, <4 x i16> undef 2789b4e75eeSliqinweng select i1 undef, <8 x i16> undef, <8 x i16> undef 2799b4e75eeSliqinweng select i1 undef, <16 x i16> undef, <16 x i16> undef 2809b4e75eeSliqinweng select i1 undef, <32 x i16> undef, <32 x i16> undef 2810c132674SPhilip Reames select <1 x i1> undef, <1 x i16> undef, <1 x i16> undef 2820c132674SPhilip Reames select <2 x i1> undef, <2 x i16> undef, <2 x i16> undef 2830c132674SPhilip Reames select <4 x i1> undef, <4 x i16> undef, <4 x i16> undef 2840c132674SPhilip Reames select <8 x i1> undef, <8 x i16> undef, <8 x i16> undef 2850c132674SPhilip Reames select <16 x i1> undef, <16 x i16> undef, <16 x i16> undef 2860c132674SPhilip Reames select <32 x i1> undef, <32 x i16> undef, <32 x i16> undef 2879b4e75eeSliqinweng select i1 undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef 2889b4e75eeSliqinweng select i1 undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef 2899b4e75eeSliqinweng select i1 undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef 2909b4e75eeSliqinweng select i1 undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef 2919b4e75eeSliqinweng select i1 undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef 2929b4e75eeSliqinweng select i1 undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef 2930c132674SPhilip Reames select <vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef 2940c132674SPhilip Reames select <vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef 2950c132674SPhilip Reames select <vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef 2960c132674SPhilip Reames select <vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef 2970c132674SPhilip Reames select <vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef 2980c132674SPhilip Reames select <vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef 2990c132674SPhilip Reames 30080b44517SElvis Wang call <1 x i16> @llvm.vp.select.v1i16(<1 x i1> undef, <1 x i16> undef, <1 x i16> undef, i32 undef) 30180b44517SElvis Wang call <2 x i16> @llvm.vp.select.v2i16(<2 x i1> undef, <2 x i16> undef, <2 x i16> undef, i32 undef) 30280b44517SElvis Wang call <4 x i16> @llvm.vp.select.v4i16(<4 x i1> undef, <4 x i16> undef, <4 x i16> undef, i32 undef) 30380b44517SElvis Wang call <8 x i16> @llvm.vp.select.v8i16(<8 x i1> undef, <8 x i16> undef, <8 x i16> undef, i32 undef) 30480b44517SElvis Wang call <16 x i16> @llvm.vp.select.v16i16(<16 x i1> undef, <16 x i16> undef, <16 x i16> undef, i32 undef) 30580b44517SElvis Wang call <32 x i16> @llvm.vp.select.v32i16(<32 x i1> undef, <32 x i16> undef, <32 x i16> undef, i32 undef) 30680b44517SElvis Wang call <vscale x 1 x i16> @llvm.vp.select.nxv1i16(<vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef, i32 undef) 30780b44517SElvis Wang call <vscale x 2 x i16> @llvm.vp.select.nxv2i16(<vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef, i32 undef) 30880b44517SElvis Wang call <vscale x 4 x i16> @llvm.vp.select.nxv4i16(<vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef, i32 undef) 30980b44517SElvis Wang call <vscale x 8 x i16> @llvm.vp.select.nxv8i16(<vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef, i32 undef) 31080b44517SElvis Wang call <vscale x 16 x i16> @llvm.vp.select.nxv16i16(<vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef, i32 undef) 31180b44517SElvis Wang call <vscale x 32 x i16> @llvm.vp.select.nxv32i16(<vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef, i32 undef) 31280b44517SElvis Wang 3130c132674SPhilip Reames select i1 undef, i32 undef, i32 undef 3149b4e75eeSliqinweng select i1 undef, <1 x i32> undef, <1 x i32> undef 3159b4e75eeSliqinweng select i1 undef, <2 x i32> undef, <2 x i32> undef 3169b4e75eeSliqinweng select i1 undef, <4 x i32> undef, <4 x i32> undef 3179b4e75eeSliqinweng select i1 undef, <8 x i32> undef, <8 x i32> undef 3189b4e75eeSliqinweng select i1 undef, <16 x i32> undef, <16 x i32> undef 3199b4e75eeSliqinweng select i1 undef, <32 x i32> undef, <32 x i32> undef 3200c132674SPhilip Reames select <1 x i1> undef, <1 x i32> undef, <1 x i32> undef 3210c132674SPhilip Reames select <2 x i1> undef, <2 x i32> undef, <2 x i32> undef 3220c132674SPhilip Reames select <4 x i1> undef, <4 x i32> undef, <4 x i32> undef 3230c132674SPhilip Reames select <8 x i1> undef, <8 x i32> undef, <8 x i32> undef 3240c132674SPhilip Reames select <16 x i1> undef, <16 x i32> undef, <16 x i32> undef 3250c132674SPhilip Reames select <32 x i1> undef, <32 x i32> undef, <32 x i32> undef 3269b4e75eeSliqinweng select i1 undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef 3279b4e75eeSliqinweng select i1 undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef 3289b4e75eeSliqinweng select i1 undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef 3299b4e75eeSliqinweng select i1 undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef 3309b4e75eeSliqinweng select i1 undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef 3319b4e75eeSliqinweng select i1 undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef 3320c132674SPhilip Reames select <vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef 3330c132674SPhilip Reames select <vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef 3340c132674SPhilip Reames select <vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef 3350c132674SPhilip Reames select <vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef 3360c132674SPhilip Reames select <vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef 3370c132674SPhilip Reames select <vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef 3380c132674SPhilip Reames 33980b44517SElvis Wang call <1 x i32> @llvm.vp.select.v1i32(<1 x i1> undef, <1 x i32> undef, <1 x i32> undef, i32 undef) 34080b44517SElvis Wang call <2 x i32> @llvm.vp.select.v2i32(<2 x i1> undef, <2 x i32> undef, <2 x i32> undef, i32 undef) 34180b44517SElvis Wang call <4 x i32> @llvm.vp.select.v4i32(<4 x i1> undef, <4 x i32> undef, <4 x i32> undef, i32 undef) 34280b44517SElvis Wang call <8 x i32> @llvm.vp.select.v8i32(<8 x i1> undef, <8 x i32> undef, <8 x i32> undef, i32 undef) 34380b44517SElvis Wang call <16 x i32> @llvm.vp.select.v16i32(<16 x i1> undef, <16 x i32> undef, <16 x i32> undef, i32 undef) 34480b44517SElvis Wang call <32 x i32> @llvm.vp.select.v32i32(<32 x i1> undef, <32 x i32> undef, <32 x i32> undef, i32 undef) 34580b44517SElvis Wang call <vscale x 1 x i32> @llvm.vp.select.nxv1i32(<vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef, i32 undef) 34680b44517SElvis Wang call <vscale x 2 x i32> @llvm.vp.select.nxv2i32(<vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef, i32 undef) 34780b44517SElvis Wang call <vscale x 4 x i32> @llvm.vp.select.nxv4i32(<vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef, i32 undef) 34880b44517SElvis Wang call <vscale x 8 x i32> @llvm.vp.select.nxv8i32(<vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef, i32 undef) 34980b44517SElvis Wang call <vscale x 16 x i32> @llvm.vp.select.nxv16i32(<vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef, i32 undef) 35080b44517SElvis Wang call <vscale x 32 x i32> @llvm.vp.select.nxv32i32(<vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef, i32 undef) 3510c132674SPhilip Reames 3520c132674SPhilip Reames select i1 undef, i64 undef, i64 undef 3539b4e75eeSliqinweng select i1 undef, <1 x i64> undef, <1 x i64> undef 3549b4e75eeSliqinweng select i1 undef, <2 x i64> undef, <2 x i64> undef 3559b4e75eeSliqinweng select i1 undef, <4 x i64> undef, <4 x i64> undef 3569b4e75eeSliqinweng select i1 undef, <8 x i64> undef, <8 x i64> undef 3579b4e75eeSliqinweng select i1 undef, <16 x i64> undef, <16 x i64> undef 3589b4e75eeSliqinweng select i1 undef, <32 x i64> undef, <32 x i64> undef 3590c132674SPhilip Reames select <1 x i1> undef, <1 x i64> undef, <1 x i64> undef 3600c132674SPhilip Reames select <2 x i1> undef, <2 x i64> undef, <2 x i64> undef 3610c132674SPhilip Reames select <4 x i1> undef, <4 x i64> undef, <4 x i64> undef 3620c132674SPhilip Reames select <8 x i1> undef, <8 x i64> undef, <8 x i64> undef 3630c132674SPhilip Reames select <16 x i1> undef, <16 x i64> undef, <16 x i64> undef 3640c132674SPhilip Reames select <32 x i1> undef, <32 x i64> undef, <32 x i64> undef 3659b4e75eeSliqinweng select i1 undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef 3669b4e75eeSliqinweng select i1 undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef 3679b4e75eeSliqinweng select i1 undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef 3689b4e75eeSliqinweng select i1 undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef 3699b4e75eeSliqinweng select i1 undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef 3709b4e75eeSliqinweng select i1 undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef 3710c132674SPhilip Reames select <vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef 3720c132674SPhilip Reames select <vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef 3730c132674SPhilip Reames select <vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef 3740c132674SPhilip Reames select <vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef 3750c132674SPhilip Reames select <vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef 3760c132674SPhilip Reames select <vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef 3770c132674SPhilip Reames 37880b44517SElvis Wang call <1 x i64> @llvm.vp.select.v1i64(<1 x i1> undef, <1 x i64> undef, <1 x i64> undef, i32 undef) 37980b44517SElvis Wang call <2 x i64> @llvm.vp.select.v2i64(<2 x i1> undef, <2 x i64> undef, <2 x i64> undef, i32 undef) 38080b44517SElvis Wang call <4 x i64> @llvm.vp.select.v4i64(<4 x i1> undef, <4 x i64> undef, <4 x i64> undef, i32 undef) 38180b44517SElvis Wang call <8 x i64> @llvm.vp.select.v8i64(<8 x i1> undef, <8 x i64> undef, <8 x i64> undef, i32 undef) 38280b44517SElvis Wang call <16 x i64> @llvm.vp.select.v16i64(<16 x i1> undef, <16 x i64> undef, <16 x i64> undef, i32 undef) 38380b44517SElvis Wang call <32 x i64> @llvm.vp.select.v32i64(<32 x i1> undef, <32 x i64> undef, <32 x i64> undef, i32 undef) 38480b44517SElvis Wang call <vscale x 1 x i64> @llvm.vp.select.nxv1i64(<vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef, i32 undef) 38580b44517SElvis Wang call <vscale x 2 x i64> @llvm.vp.select.nxv2i64(<vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef, i32 undef) 38680b44517SElvis Wang call <vscale x 4 x i64> @llvm.vp.select.nxv4i64(<vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef, i32 undef) 38780b44517SElvis Wang call <vscale x 8 x i64> @llvm.vp.select.nxv8i64(<vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef, i32 undef) 38880b44517SElvis Wang call <vscale x 16 x i64> @llvm.vp.select.nxv16i64(<vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef, i32 undef) 38980b44517SElvis Wang call <vscale x 32 x i64> @llvm.vp.select.nxv32i64(<vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef, i32 undef) 39080b44517SElvis Wang 3910c132674SPhilip Reames ret void 3920c132674SPhilip Reames} 393bcbdf7adSPhilip Reames 394bcbdf7adSPhilip Reamesdefine void @select_of_constants() { 395bcbdf7adSPhilip Reames; CHECK-LABEL: 'select_of_constants' 396*38fffa63SPaul Walker; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = select i1 undef, <2 x i64> splat (i64 128), <2 x i64> zeroinitializer 397d2885743SPhilip Reames; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %2 = select i1 undef, <2 x i64> <i64 128, i64 127>, <2 x i64> zeroinitializer 398d2885743SPhilip Reames; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %3 = select i1 undef, <2 x i64> <i64 0, i64 1>, <2 x i64> zeroinitializer 399d2885743SPhilip Reames; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %4 = select i1 undef, <2 x i64> <i64 128, i64 533>, <2 x i64> <i64 0, i64 573> 400d2885743SPhilip Reames; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %5 = select <4 x i1> undef, <4 x i32> <i32 524288, i32 262144, i32 131072, i32 65536>, <4 x i32> zeroinitializer 401bcbdf7adSPhilip Reames; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void 402bcbdf7adSPhilip Reames; 403bcbdf7adSPhilip Reames ; Splat constants 404bcbdf7adSPhilip Reames select i1 undef, <2 x i64> <i64 128, i64 128>, <2 x i64> zeroinitializer 405bcbdf7adSPhilip Reames ; LHS is a VID patern 406bcbdf7adSPhilip Reames select i1 undef, <2 x i64> <i64 128, i64 127>, <2 x i64> zeroinitializer 407bcbdf7adSPhilip Reames select i1 undef, <2 x i64> <i64 0, i64 1>, <2 x i64> zeroinitializer 408bcbdf7adSPhilip Reames ; 2x general (expensive) constants 409bcbdf7adSPhilip Reames select i1 undef, <2 x i64> <i64 128, i64 533>, <2 x i64> <i64 0, i64 573> 410bcbdf7adSPhilip Reames 411bcbdf7adSPhilip Reames ; powers of two (still expensive) 412bcbdf7adSPhilip Reames select <4 x i1> undef, <4 x i32> <i32 524288, i32 262144, i32 131072, i32 65536>, <4 x i32> zeroinitializer 413bcbdf7adSPhilip Reames 414bcbdf7adSPhilip Reames ret void 415bcbdf7adSPhilip Reames} 416bcbdf7adSPhilip Reames 417566012a6SElvis Wangdefine void @vp_merge() { 418566012a6SElvis Wang; CHECK-LABEL: 'vp_merge' 419566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = call <1 x i1> @llvm.vp.merge.v1i1(<1 x i1> undef, <1 x i1> undef, <1 x i1> undef, i32 undef) 420566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %2 = call <2 x i1> @llvm.vp.merge.v2i1(<2 x i1> undef, <2 x i1> undef, <2 x i1> undef, i32 undef) 421566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %3 = call <4 x i1> @llvm.vp.merge.v4i1(<4 x i1> undef, <4 x i1> undef, <4 x i1> undef, i32 undef) 422566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %4 = call <8 x i1> @llvm.vp.merge.v8i1(<8 x i1> undef, <8 x i1> undef, <8 x i1> undef, i32 undef) 423566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %5 = call <16 x i1> @llvm.vp.merge.v16i1(<16 x i1> undef, <16 x i1> undef, <16 x i1> undef, i32 undef) 424566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %6 = call <32 x i1> @llvm.vp.merge.v32i1(<32 x i1> undef, <32 x i1> undef, <32 x i1> undef, i32 undef) 425566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %7 = call <vscale x 1 x i1> @llvm.vp.merge.nxv1i1(<vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, i32 undef) 426566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %8 = call <vscale x 2 x i1> @llvm.vp.merge.nxv2i1(<vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, i32 undef) 427566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %9 = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, i32 undef) 428566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %10 = call <vscale x 8 x i1> @llvm.vp.merge.nxv8i1(<vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, i32 undef) 429566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %11 = call <vscale x 16 x i1> @llvm.vp.merge.nxv16i1(<vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, i32 undef) 430566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %12 = call <vscale x 32 x i1> @llvm.vp.merge.nxv32i1(<vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, i32 undef) 431566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %13 = call <1 x i8> @llvm.vp.merge.v1i8(<1 x i1> undef, <1 x i8> undef, <1 x i8> undef, i32 undef) 432566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %14 = call <2 x i8> @llvm.vp.merge.v2i8(<2 x i1> undef, <2 x i8> undef, <2 x i8> undef, i32 undef) 433566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %15 = call <4 x i8> @llvm.vp.merge.v4i8(<4 x i1> undef, <4 x i8> undef, <4 x i8> undef, i32 undef) 434566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %16 = call <8 x i8> @llvm.vp.merge.v8i8(<8 x i1> undef, <8 x i8> undef, <8 x i8> undef, i32 undef) 435566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %17 = call <16 x i8> @llvm.vp.merge.v16i8(<16 x i1> undef, <16 x i8> undef, <16 x i8> undef, i32 undef) 436566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %18 = call <32 x i8> @llvm.vp.merge.v32i8(<32 x i1> undef, <32 x i8> undef, <32 x i8> undef, i32 undef) 437566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %19 = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef, i32 undef) 438566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %20 = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef, i32 undef) 439566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %21 = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef, i32 undef) 440566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %22 = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef, i32 undef) 441566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %23 = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, i32 undef) 442566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %24 = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef, i32 undef) 443566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %25 = call <1 x i16> @llvm.vp.merge.v1i16(<1 x i1> undef, <1 x i16> undef, <1 x i16> undef, i32 undef) 444566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %26 = call <2 x i16> @llvm.vp.merge.v2i16(<2 x i1> undef, <2 x i16> undef, <2 x i16> undef, i32 undef) 445566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %27 = call <4 x i16> @llvm.vp.merge.v4i16(<4 x i1> undef, <4 x i16> undef, <4 x i16> undef, i32 undef) 446566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %28 = call <8 x i16> @llvm.vp.merge.v8i16(<8 x i1> undef, <8 x i16> undef, <8 x i16> undef, i32 undef) 447566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %29 = call <16 x i16> @llvm.vp.merge.v16i16(<16 x i1> undef, <16 x i16> undef, <16 x i16> undef, i32 undef) 448566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %30 = call <32 x i16> @llvm.vp.merge.v32i16(<32 x i1> undef, <32 x i16> undef, <32 x i16> undef, i32 undef) 449566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %31 = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef, i32 undef) 450566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %32 = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef, i32 undef) 451566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %33 = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef, i32 undef) 452566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %34 = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef, i32 undef) 453566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %35 = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef, i32 undef) 454566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %36 = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef, i32 undef) 455566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %37 = call <1 x i32> @llvm.vp.merge.v1i32(<1 x i1> undef, <1 x i32> undef, <1 x i32> undef, i32 undef) 456566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %38 = call <2 x i32> @llvm.vp.merge.v2i32(<2 x i1> undef, <2 x i32> undef, <2 x i32> undef, i32 undef) 457566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %39 = call <4 x i32> @llvm.vp.merge.v4i32(<4 x i1> undef, <4 x i32> undef, <4 x i32> undef, i32 undef) 458566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %40 = call <8 x i32> @llvm.vp.merge.v8i32(<8 x i1> undef, <8 x i32> undef, <8 x i32> undef, i32 undef) 459566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %41 = call <16 x i32> @llvm.vp.merge.v16i32(<16 x i1> undef, <16 x i32> undef, <16 x i32> undef, i32 undef) 460566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %42 = call <32 x i32> @llvm.vp.merge.v32i32(<32 x i1> undef, <32 x i32> undef, <32 x i32> undef, i32 undef) 461566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %43 = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef, i32 undef) 462566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %44 = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef, i32 undef) 463566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %45 = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef, i32 undef) 464566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %46 = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef, i32 undef) 465566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %47 = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef, i32 undef) 466566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %48 = call <vscale x 32 x i32> @llvm.vp.merge.nxv32i32(<vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef, i32 undef) 467566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %49 = call <1 x i64> @llvm.vp.merge.v1i64(<1 x i1> undef, <1 x i64> undef, <1 x i64> undef, i32 undef) 468566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %50 = call <2 x i64> @llvm.vp.merge.v2i64(<2 x i1> undef, <2 x i64> undef, <2 x i64> undef, i32 undef) 469566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %51 = call <4 x i64> @llvm.vp.merge.v4i64(<4 x i1> undef, <4 x i64> undef, <4 x i64> undef, i32 undef) 470566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %52 = call <8 x i64> @llvm.vp.merge.v8i64(<8 x i1> undef, <8 x i64> undef, <8 x i64> undef, i32 undef) 471566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %53 = call <16 x i64> @llvm.vp.merge.v16i64(<16 x i1> undef, <16 x i64> undef, <16 x i64> undef, i32 undef) 472566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %54 = call <32 x i64> @llvm.vp.merge.v32i64(<32 x i1> undef, <32 x i64> undef, <32 x i64> undef, i32 undef) 473566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %55 = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef, i32 undef) 474566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %56 = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef, i32 undef) 475566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %57 = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef, i32 undef) 476566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %58 = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef, i32 undef) 477566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %59 = call <vscale x 16 x i64> @llvm.vp.merge.nxv16i64(<vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef, i32 undef) 478566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %60 = call <vscale x 32 x i64> @llvm.vp.merge.nxv32i64(<vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef, i32 undef) 479566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %61 = call <1 x float> @llvm.vp.merge.v1f32(<1 x i1> undef, <1 x float> undef, <1 x float> undef, i32 undef) 480566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %62 = call <2 x float> @llvm.vp.merge.v2f32(<2 x i1> undef, <2 x float> undef, <2 x float> undef, i32 undef) 481566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %63 = call <4 x float> @llvm.vp.merge.v4f32(<4 x i1> undef, <4 x float> undef, <4 x float> undef, i32 undef) 482566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %64 = call <8 x float> @llvm.vp.merge.v8f32(<8 x i1> undef, <8 x float> undef, <8 x float> undef, i32 undef) 483566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %65 = call <16 x float> @llvm.vp.merge.v16f32(<16 x i1> undef, <16 x float> undef, <16 x float> undef, i32 undef) 484566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %66 = call <32 x float> @llvm.vp.merge.v32f32(<32 x i1> undef, <32 x float> undef, <32 x float> undef, i32 undef) 485566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %67 = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> undef, <vscale x 1 x float> undef, <vscale x 1 x float> undef, i32 undef) 486566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %68 = call <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1> undef, <vscale x 2 x float> undef, <vscale x 2 x float> undef, i32 undef) 487566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %69 = call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> undef, <vscale x 4 x float> undef, <vscale x 4 x float> undef, i32 undef) 488566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %70 = call <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1> undef, <vscale x 8 x float> undef, <vscale x 8 x float> undef, i32 undef) 489566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %71 = call <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1> undef, <vscale x 16 x float> undef, <vscale x 16 x float> undef, i32 undef) 490566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %72 = call <vscale x 32 x float> @llvm.vp.merge.nxv32f32(<vscale x 32 x i1> undef, <vscale x 32 x float> undef, <vscale x 32 x float> undef, i32 undef) 491566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %73 = call <1 x double> @llvm.vp.merge.v1f64(<1 x i1> undef, <1 x double> undef, <1 x double> undef, i32 undef) 492566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %74 = call <2 x double> @llvm.vp.merge.v2f64(<2 x i1> undef, <2 x double> undef, <2 x double> undef, i32 undef) 493566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %75 = call <4 x double> @llvm.vp.merge.v4f64(<4 x i1> undef, <4 x double> undef, <4 x double> undef, i32 undef) 494566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %76 = call <8 x double> @llvm.vp.merge.v8f64(<8 x i1> undef, <8 x double> undef, <8 x double> undef, i32 undef) 495566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %77 = call <16 x double> @llvm.vp.merge.v16f64(<16 x i1> undef, <16 x double> undef, <16 x double> undef, i32 undef) 496566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %78 = call <32 x double> @llvm.vp.merge.v32f64(<32 x i1> undef, <32 x double> undef, <32 x double> undef, i32 undef) 497566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %79 = call <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1> undef, <vscale x 1 x double> undef, <vscale x 1 x double> undef, i32 undef) 498566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %80 = call <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1> undef, <vscale x 2 x double> undef, <vscale x 2 x double> undef, i32 undef) 499566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %81 = call <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1> undef, <vscale x 4 x double> undef, <vscale x 4 x double> undef, i32 undef) 500566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %82 = call <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1> undef, <vscale x 8 x double> undef, <vscale x 8 x double> undef, i32 undef) 501566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %83 = call <vscale x 16 x double> @llvm.vp.merge.nxv16f64(<vscale x 16 x i1> undef, <vscale x 16 x double> undef, <vscale x 16 x double> undef, i32 undef) 502566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %84 = call <vscale x 32 x double> @llvm.vp.merge.nxv32f64(<vscale x 32 x i1> undef, <vscale x 32 x double> undef, <vscale x 32 x double> undef, i32 undef) 503566012a6SElvis Wang; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void 504566012a6SElvis Wang; 505566012a6SElvis Wang call <1 x i1> @llvm.vp.merge.v1i1(<1 x i1> undef, <1 x i1> undef, <1 x i1> undef, i32 undef) 506566012a6SElvis Wang call <2 x i1> @llvm.vp.merge.v2i1(<2 x i1> undef, <2 x i1> undef, <2 x i1> undef, i32 undef) 507566012a6SElvis Wang call <4 x i1> @llvm.vp.merge.v4i1(<4 x i1> undef, <4 x i1> undef, <4 x i1> undef, i32 undef) 508566012a6SElvis Wang call <8 x i1> @llvm.vp.merge.v8i1(<8 x i1> undef, <8 x i1> undef, <8 x i1> undef, i32 undef) 509566012a6SElvis Wang call <16 x i1> @llvm.vp.merge.v16i1(<16 x i1> undef, <16 x i1> undef, <16 x i1> undef, i32 undef) 510566012a6SElvis Wang call <32 x i1> @llvm.vp.merge.v32i1(<32 x i1> undef, <32 x i1> undef, <32 x i1> undef, i32 undef) 511566012a6SElvis Wang call <vscale x 1 x i1> @llvm.vp.merge.nxv1i1(<vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, i32 undef) 512566012a6SElvis Wang call <vscale x 2 x i1> @llvm.vp.merge.nxv2i1(<vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, i32 undef) 513566012a6SElvis Wang call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, i32 undef) 514566012a6SElvis Wang call <vscale x 8 x i1> @llvm.vp.merge.nxv8i1(<vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, i32 undef) 515566012a6SElvis Wang call <vscale x 16 x i1> @llvm.vp.merge.nxv16i1(<vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, i32 undef) 516566012a6SElvis Wang call <vscale x 32 x i1> @llvm.vp.merge.nxv32i1(<vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, i32 undef) 517bcbdf7adSPhilip Reames 518566012a6SElvis Wang call <1 x i8> @llvm.vp.merge.v1i8(<1 x i1> undef, <1 x i8> undef, <1 x i8> undef, i32 undef) 519566012a6SElvis Wang call <2 x i8> @llvm.vp.merge.v2i8(<2 x i1> undef, <2 x i8> undef, <2 x i8> undef, i32 undef) 520566012a6SElvis Wang call <4 x i8> @llvm.vp.merge.v4i8(<4 x i1> undef, <4 x i8> undef, <4 x i8> undef, i32 undef) 521566012a6SElvis Wang call <8 x i8> @llvm.vp.merge.v8i8(<8 x i1> undef, <8 x i8> undef, <8 x i8> undef, i32 undef) 522566012a6SElvis Wang call <16 x i8> @llvm.vp.merge.v16i8(<16 x i1> undef, <16 x i8> undef, <16 x i8> undef, i32 undef) 523566012a6SElvis Wang call <32 x i8> @llvm.vp.merge.v32i8(<32 x i1> undef, <32 x i8> undef, <32 x i8> undef, i32 undef) 524566012a6SElvis Wang call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef, i32 undef) 525566012a6SElvis Wang call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef, i32 undef) 526566012a6SElvis Wang call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef, i32 undef) 527566012a6SElvis Wang call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef, i32 undef) 528566012a6SElvis Wang call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, i32 undef) 529566012a6SElvis Wang call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef, i32 undef) 530566012a6SElvis Wang 531566012a6SElvis Wang call <1 x i16> @llvm.vp.merge.v1i16(<1 x i1> undef, <1 x i16> undef, <1 x i16> undef, i32 undef) 532566012a6SElvis Wang call <2 x i16> @llvm.vp.merge.v2i16(<2 x i1> undef, <2 x i16> undef, <2 x i16> undef, i32 undef) 533566012a6SElvis Wang call <4 x i16> @llvm.vp.merge.v4i16(<4 x i1> undef, <4 x i16> undef, <4 x i16> undef, i32 undef) 534566012a6SElvis Wang call <8 x i16> @llvm.vp.merge.v8i16(<8 x i1> undef, <8 x i16> undef, <8 x i16> undef, i32 undef) 535566012a6SElvis Wang call <16 x i16> @llvm.vp.merge.v16i16(<16 x i1> undef, <16 x i16> undef, <16 x i16> undef, i32 undef) 536566012a6SElvis Wang call <32 x i16> @llvm.vp.merge.v32i16(<32 x i1> undef, <32 x i16> undef, <32 x i16> undef, i32 undef) 537566012a6SElvis Wang call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef, i32 undef) 538566012a6SElvis Wang call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef, i32 undef) 539566012a6SElvis Wang call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef, i32 undef) 540566012a6SElvis Wang call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef, i32 undef) 541566012a6SElvis Wang call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef, i32 undef) 542566012a6SElvis Wang call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef, i32 undef) 543566012a6SElvis Wang 544566012a6SElvis Wang call <1 x i32> @llvm.vp.merge.v1i32(<1 x i1> undef, <1 x i32> undef, <1 x i32> undef, i32 undef) 545566012a6SElvis Wang call <2 x i32> @llvm.vp.merge.v2i32(<2 x i1> undef, <2 x i32> undef, <2 x i32> undef, i32 undef) 546566012a6SElvis Wang call <4 x i32> @llvm.vp.merge.v4i32(<4 x i1> undef, <4 x i32> undef, <4 x i32> undef, i32 undef) 547566012a6SElvis Wang call <8 x i32> @llvm.vp.merge.v8i32(<8 x i1> undef, <8 x i32> undef, <8 x i32> undef, i32 undef) 548566012a6SElvis Wang call <16 x i32> @llvm.vp.merge.v16i32(<16 x i1> undef, <16 x i32> undef, <16 x i32> undef, i32 undef) 549566012a6SElvis Wang call <32 x i32> @llvm.vp.merge.v32i32(<32 x i1> undef, <32 x i32> undef, <32 x i32> undef, i32 undef) 550566012a6SElvis Wang call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef, i32 undef) 551566012a6SElvis Wang call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef, i32 undef) 552566012a6SElvis Wang call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef, i32 undef) 553566012a6SElvis Wang call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef, i32 undef) 554566012a6SElvis Wang call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef, i32 undef) 555566012a6SElvis Wang call <vscale x 32 x i32> @llvm.vp.merge.nxv32i32(<vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef, i32 undef) 556566012a6SElvis Wang 557566012a6SElvis Wang call <1 x i64> @llvm.vp.merge.v1i64(<1 x i1> undef, <1 x i64> undef, <1 x i64> undef, i32 undef) 558566012a6SElvis Wang call <2 x i64> @llvm.vp.merge.v2i64(<2 x i1> undef, <2 x i64> undef, <2 x i64> undef, i32 undef) 559566012a6SElvis Wang call <4 x i64> @llvm.vp.merge.v4i64(<4 x i1> undef, <4 x i64> undef, <4 x i64> undef, i32 undef) 560566012a6SElvis Wang call <8 x i64> @llvm.vp.merge.v8i64(<8 x i1> undef, <8 x i64> undef, <8 x i64> undef, i32 undef) 561566012a6SElvis Wang call <16 x i64> @llvm.vp.merge.v16i64(<16 x i1> undef, <16 x i64> undef, <16 x i64> undef, i32 undef) 562566012a6SElvis Wang call <32 x i64> @llvm.vp.merge.v32i64(<32 x i1> undef, <32 x i64> undef, <32 x i64> undef, i32 undef) 563566012a6SElvis Wang call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef, i32 undef) 564566012a6SElvis Wang call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef, i32 undef) 565566012a6SElvis Wang call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef, i32 undef) 566566012a6SElvis Wang call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef, i32 undef) 567566012a6SElvis Wang call <vscale x 16 x i64> @llvm.vp.merge.nxv16i64(<vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef, i32 undef) 568566012a6SElvis Wang call <vscale x 32 x i64> @llvm.vp.merge.nxv32i64(<vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef, i32 undef) 569566012a6SElvis Wang 570566012a6SElvis Wang call <1 x float> @llvm.vp.merge.v1f32(<1 x i1> undef, <1 x float> undef, <1 x float> undef, i32 undef) 571566012a6SElvis Wang call <2 x float> @llvm.vp.merge.v2f32(<2 x i1> undef, <2 x float> undef, <2 x float> undef, i32 undef) 572566012a6SElvis Wang call <4 x float> @llvm.vp.merge.v4f32(<4 x i1> undef, <4 x float> undef, <4 x float> undef, i32 undef) 573566012a6SElvis Wang call <8 x float> @llvm.vp.merge.v8f32(<8 x i1> undef, <8 x float> undef, <8 x float> undef, i32 undef) 574566012a6SElvis Wang call <16 x float> @llvm.vp.merge.v16f32(<16 x i1> undef, <16 x float> undef, <16 x float> undef, i32 undef) 575566012a6SElvis Wang call <32 x float> @llvm.vp.merge.v32f32(<32 x i1> undef, <32 x float> undef, <32 x float> undef, i32 undef) 576566012a6SElvis Wang call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> undef, <vscale x 1 x float> undef, <vscale x 1 x float> undef, i32 undef) 577566012a6SElvis Wang call <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1> undef, <vscale x 2 x float> undef, <vscale x 2 x float> undef, i32 undef) 578566012a6SElvis Wang call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> undef, <vscale x 4 x float> undef, <vscale x 4 x float> undef, i32 undef) 579566012a6SElvis Wang call <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1> undef, <vscale x 8 x float> undef, <vscale x 8 x float> undef, i32 undef) 580566012a6SElvis Wang call <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1> undef, <vscale x 16 x float> undef, <vscale x 16 x float> undef, i32 undef) 581566012a6SElvis Wang call <vscale x 32 x float> @llvm.vp.merge.nxv32f32(<vscale x 32 x i1> undef, <vscale x 32 x float> undef, <vscale x 32 x float> undef, i32 undef) 582566012a6SElvis Wang 583566012a6SElvis Wang call <1 x double> @llvm.vp.merge.v1f64(<1 x i1> undef, <1 x double> undef, <1 x double> undef, i32 undef) 584566012a6SElvis Wang call <2 x double> @llvm.vp.merge.v2f64(<2 x i1> undef, <2 x double> undef, <2 x double> undef, i32 undef) 585566012a6SElvis Wang call <4 x double> @llvm.vp.merge.v4f64(<4 x i1> undef, <4 x double> undef, <4 x double> undef, i32 undef) 586566012a6SElvis Wang call <8 x double> @llvm.vp.merge.v8f64(<8 x i1> undef, <8 x double> undef, <8 x double> undef, i32 undef) 587566012a6SElvis Wang call <16 x double> @llvm.vp.merge.v16f64(<16 x i1> undef, <16 x double> undef, <16 x double> undef, i32 undef) 588566012a6SElvis Wang call <32 x double> @llvm.vp.merge.v32f64(<32 x i1> undef, <32 x double> undef, <32 x double> undef, i32 undef) 589566012a6SElvis Wang call <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1> undef, <vscale x 1 x double> undef, <vscale x 1 x double> undef, i32 undef) 590566012a6SElvis Wang call <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1> undef, <vscale x 2 x double> undef, <vscale x 2 x double> undef, i32 undef) 591566012a6SElvis Wang call <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1> undef, <vscale x 4 x double> undef, <vscale x 4 x double> undef, i32 undef) 592566012a6SElvis Wang call <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1> undef, <vscale x 8 x double> undef, <vscale x 8 x double> undef, i32 undef) 593566012a6SElvis Wang call <vscale x 16 x double> @llvm.vp.merge.nxv16f64(<vscale x 16 x i1> undef, <vscale x 16 x double> undef, <vscale x 16 x double> undef, i32 undef) 594566012a6SElvis Wang call <vscale x 32 x double> @llvm.vp.merge.nxv32f64(<vscale x 32 x i1> undef, <vscale x 32 x double> undef, <vscale x 32 x double> undef, i32 undef) 595566012a6SElvis Wang 596566012a6SElvis Wang ret void 597566012a6SElvis Wang} 598