1e7b89c2fSDavid Sherwood; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py 24178e334SSimon Pilgrim; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v,+f,+d,+zfh | FileCheck %s 3e7b89c2fSDavid Sherwood 4e7b89c2fSDavid Sherwooddefine void @get_lane_mask() { 5e7b89c2fSDavid Sherwood; CHECK-LABEL: 'get_lane_mask' 6*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %mask_nxv16i1_i64 = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 undef, i64 undef) 7*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %mask_nxv8i1_i64 = call <vscale x 8 x i1> @llvm.get.active.lane.mask.nxv8i1.i64(i64 undef, i64 undef) 8*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %mask_nxv4i1_i64 = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 undef, i64 undef) 9*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %mask_nxv2i1_i64 = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 undef, i64 undef) 10*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %mask_nxv1i1_i64 = call <vscale x 1 x i1> @llvm.get.active.lane.mask.nxv1i1.i64(i64 undef, i64 undef) 11*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %mask_nxv16i1_i32 = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i32(i32 undef, i32 undef) 12*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %mask_nxv8i1_i32 = call <vscale x 8 x i1> @llvm.get.active.lane.mask.nxv8i1.i32(i32 undef, i32 undef) 13*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %mask_nxv4i1_i32 = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 undef, i32 undef) 14*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %mask_nxv2i1_i32 = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i32(i32 undef, i32 undef) 15*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %mask_nxv1i1_i32 = call <vscale x 1 x i1> @llvm.get.active.lane.mask.nxv1i1.i32(i32 undef, i32 undef) 16*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %mask_nxv32i1_i64 = call <vscale x 32 x i1> @llvm.get.active.lane.mask.nxv32i1.i64(i64 undef, i64 undef) 17*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %mask_nxv16i1_i16 = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i16(i16 undef, i16 undef) 18*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %mask_v16i1_i64 = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i64(i64 undef, i64 undef) 19*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %mask_v8i1_i64 = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i64(i64 undef, i64 undef) 20*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %mask_v4i1_i64 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i64(i64 undef, i64 undef) 21*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %mask_v2i1_i64 = call <2 x i1> @llvm.get.active.lane.mask.v2i1.i64(i64 undef, i64 undef) 22*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %mask_v16i1_i32 = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32 undef, i32 undef) 23*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %mask_v8i1_i32 = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 undef, i32 undef) 24*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %mask_v4i1_i32 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 undef, i32 undef) 25*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %mask_v2i1_i32 = call <2 x i1> @llvm.get.active.lane.mask.v2i1.i32(i32 undef, i32 undef) 26*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %mask_v32i1_i64 = call <32 x i1> @llvm.get.active.lane.mask.v32i1.i64(i64 undef, i64 undef) 27*ee52add6SShih-Po Hung; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %mask_v16i1_i16 = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i16(i16 undef, i16 undef) 280a5d52a7SSergey Kachkov; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void 29e7b89c2fSDavid Sherwood; 30e7b89c2fSDavid Sherwood %mask_nxv16i1_i64 = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 undef, i64 undef) 31e7b89c2fSDavid Sherwood %mask_nxv8i1_i64 = call <vscale x 8 x i1> @llvm.get.active.lane.mask.nxv8i1.i64(i64 undef, i64 undef) 32e7b89c2fSDavid Sherwood %mask_nxv4i1_i64 = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 undef, i64 undef) 33e7b89c2fSDavid Sherwood %mask_nxv2i1_i64 = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 undef, i64 undef) 34e7b89c2fSDavid Sherwood %mask_nxv1i1_i64 = call <vscale x 1 x i1> @llvm.get.active.lane.mask.nxv1i1.i64(i64 undef, i64 undef) 35e7b89c2fSDavid Sherwood 36e7b89c2fSDavid Sherwood %mask_nxv16i1_i32 = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i32(i32 undef, i32 undef) 37e7b89c2fSDavid Sherwood %mask_nxv8i1_i32 = call <vscale x 8 x i1> @llvm.get.active.lane.mask.nxv8i1.i32(i32 undef, i32 undef) 38e7b89c2fSDavid Sherwood %mask_nxv4i1_i32 = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 undef, i32 undef) 39e7b89c2fSDavid Sherwood %mask_nxv2i1_i32 = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i32(i32 undef, i32 undef) 40e7b89c2fSDavid Sherwood %mask_nxv1i1_i32 = call <vscale x 1 x i1> @llvm.get.active.lane.mask.nxv1i1.i32(i32 undef, i32 undef) 41e7b89c2fSDavid Sherwood 42e7b89c2fSDavid Sherwood %mask_nxv32i1_i64 = call <vscale x 32 x i1> @llvm.get.active.lane.mask.nxv32i1.i64(i64 undef, i64 undef) 43e7b89c2fSDavid Sherwood %mask_nxv16i1_i16 = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i16(i16 undef, i16 undef) 44e7b89c2fSDavid Sherwood 45e7b89c2fSDavid Sherwood %mask_v16i1_i64 = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i64(i64 undef, i64 undef) 46e7b89c2fSDavid Sherwood %mask_v8i1_i64 = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i64(i64 undef, i64 undef) 47e7b89c2fSDavid Sherwood %mask_v4i1_i64 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i64(i64 undef, i64 undef) 48e7b89c2fSDavid Sherwood %mask_v2i1_i64 = call <2 x i1> @llvm.get.active.lane.mask.v2i1.i64(i64 undef, i64 undef) 49e7b89c2fSDavid Sherwood 50e7b89c2fSDavid Sherwood %mask_v16i1_i32 = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32 undef, i32 undef) 51e7b89c2fSDavid Sherwood %mask_v8i1_i32 = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 undef, i32 undef) 52e7b89c2fSDavid Sherwood %mask_v4i1_i32 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 undef, i32 undef) 53e7b89c2fSDavid Sherwood %mask_v2i1_i32 = call <2 x i1> @llvm.get.active.lane.mask.v2i1.i32(i32 undef, i32 undef) 54e7b89c2fSDavid Sherwood 55e7b89c2fSDavid Sherwood %mask_v32i1_i64 = call <32 x i1> @llvm.get.active.lane.mask.v32i1.i64(i64 undef, i64 undef) 56e7b89c2fSDavid Sherwood %mask_v16i1_i16 = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i16(i16 undef, i16 undef) 57e7b89c2fSDavid Sherwood 58e7b89c2fSDavid Sherwood ret void 59e7b89c2fSDavid Sherwood} 60e7b89c2fSDavid Sherwood 61e7b89c2fSDavid Sherwooddeclare <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64, i64) 62e7b89c2fSDavid Sherwooddeclare <vscale x 8 x i1> @llvm.get.active.lane.mask.nxv8i1.i64(i64, i64) 63e7b89c2fSDavid Sherwooddeclare <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64, i64) 64e7b89c2fSDavid Sherwooddeclare <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64, i64) 65e7b89c2fSDavid Sherwooddeclare <vscale x 1 x i1> @llvm.get.active.lane.mask.nxv1i1.i64(i64, i64) 66e7b89c2fSDavid Sherwooddeclare <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i32(i32, i32) 67e7b89c2fSDavid Sherwooddeclare <vscale x 8 x i1> @llvm.get.active.lane.mask.nxv8i1.i32(i32, i32) 68e7b89c2fSDavid Sherwooddeclare <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32, i32) 69e7b89c2fSDavid Sherwooddeclare <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i32(i32, i32) 70e7b89c2fSDavid Sherwooddeclare <vscale x 1 x i1> @llvm.get.active.lane.mask.nxv1i1.i32(i32, i32) 71e7b89c2fSDavid Sherwooddeclare <vscale x 32 x i1> @llvm.get.active.lane.mask.nxv32i1.i64(i64, i64) 72e7b89c2fSDavid Sherwooddeclare <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i16(i16, i16) 73e7b89c2fSDavid Sherwooddeclare <16 x i1> @llvm.get.active.lane.mask.v16i1.i64(i64, i64) 74e7b89c2fSDavid Sherwooddeclare <8 x i1> @llvm.get.active.lane.mask.v8i1.i64(i64, i64) 75e7b89c2fSDavid Sherwooddeclare <4 x i1> @llvm.get.active.lane.mask.v4i1.i64(i64, i64) 76e7b89c2fSDavid Sherwooddeclare <2 x i1> @llvm.get.active.lane.mask.v2i1.i64(i64, i64) 77e7b89c2fSDavid Sherwooddeclare <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32, i32) 78e7b89c2fSDavid Sherwooddeclare <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32, i32) 79e7b89c2fSDavid Sherwooddeclare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32) 80e7b89c2fSDavid Sherwooddeclare <2 x i1> @llvm.get.active.lane.mask.v2i1.i32(i32, i32) 81e7b89c2fSDavid Sherwooddeclare <32 x i1> @llvm.get.active.lane.mask.v32i1.i64(i64, i64) 82e7b89c2fSDavid Sherwooddeclare <16 x i1> @llvm.get.active.lane.mask.v16i1.i16(i16, i16) 83