1 //===-- X86SelectionDAGInfo.h - X86 SelectionDAG Info -----------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines the X86 subclass for SelectionDAGTargetInfo. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H 14 #define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H 15 16 #include "llvm/CodeGen/SelectionDAGTargetInfo.h" 17 18 namespace llvm { 19 20 class X86SelectionDAGInfo : public SelectionDAGTargetInfo { 21 /// Returns true if it is possible for the base register to conflict with the 22 /// given set of clobbers for a memory intrinsic. 23 bool isBaseRegConflictPossible(SelectionDAG &DAG, 24 ArrayRef<MCPhysReg> ClobberSet) const; 25 26 public: 27 explicit X86SelectionDAGInfo() = default; 28 29 bool isTargetMemoryOpcode(unsigned Opcode) const override; 30 31 bool isTargetStrictFPOpcode(unsigned Opcode) const override; 32 33 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, 34 SDValue Chain, SDValue Dst, SDValue Src, 35 SDValue Size, Align Alignment, 36 bool isVolatile, bool AlwaysInline, 37 MachinePointerInfo DstPtrInfo) const override; 38 39 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 40 SDValue Chain, SDValue Dst, SDValue Src, 41 SDValue Size, Align Alignment, 42 bool isVolatile, bool AlwaysInline, 43 MachinePointerInfo DstPtrInfo, 44 MachinePointerInfo SrcPtrInfo) const override; 45 }; 46 47 } 48 49 #endif 50