19386483bSGanesh Gopalasubramanian//===-- X86InstrSNP.td - SNP Instruction Set Extension -----*- tablegen -*-===// 29386483bSGanesh Gopalasubramanian// 39386483bSGanesh Gopalasubramanian// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 49386483bSGanesh Gopalasubramanian// See https://llvm.org/LICENSE.txt for license information. 59386483bSGanesh Gopalasubramanian// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 69386483bSGanesh Gopalasubramanian// 79386483bSGanesh Gopalasubramanian//===----------------------------------------------------------------------===// 89386483bSGanesh Gopalasubramanian// 99386483bSGanesh Gopalasubramanian// This file describes the instructions that make up the AMD Secure Nested 109386483bSGanesh Gopalasubramanian// Paging (SNP) instruction set. 119386483bSGanesh Gopalasubramanian// 129386483bSGanesh Gopalasubramanian//===----------------------------------------------------------------------===// 139386483bSGanesh Gopalasubramanian 149386483bSGanesh Gopalasubramanian//===----------------------------------------------------------------------===// 159386483bSGanesh Gopalasubramanian// SNP instructions 169386483bSGanesh Gopalasubramanian 179386483bSGanesh Gopalasubramanianlet SchedRW = [WriteSystem] in { 189386483bSGanesh Gopalasubramanian// F3 0F 01 FF 1910b7c47eSGanesh Gopalasubramanianlet Uses = [RAX], Defs = [EAX, EFLAGS] in 20*ff32ab3aSShengchen Kandef PSMASH: I<0x01, MRM_FF, (outs), (ins), "psmash", []>, TB, XS, 219386483bSGanesh Gopalasubramanian Requires<[In64BitMode]>; 229386483bSGanesh Gopalasubramanian 239386483bSGanesh Gopalasubramanian// F2 0F 01 FF 2410b7c47eSGanesh Gopalasubramanianlet Uses = [RAX, RCX, RDX], Defs = [EAX, EFLAGS] in 259386483bSGanesh Gopalasubramaniandef PVALIDATE64: I<0x01, MRM_FF, (outs), (ins), "pvalidate",[]>, 26*ff32ab3aSShengchen Kan TB, XD, Requires<[In64BitMode]>; 279386483bSGanesh Gopalasubramanian 2810b7c47eSGanesh Gopalasubramanianlet Uses = [EAX, ECX, EDX], Defs = [EAX, EFLAGS] in 299386483bSGanesh Gopalasubramaniandef PVALIDATE32: I<0x01, MRM_FF, (outs), (ins), "pvalidate",[]>, 30*ff32ab3aSShengchen Kan TB, XD, Requires<[Not64BitMode]>; 319386483bSGanesh Gopalasubramanian 329386483bSGanesh Gopalasubramanian// F2 0F 01 FE 3310b7c47eSGanesh Gopalasubramanianlet Uses = [RAX, RCX], Defs = [EAX, EFLAGS] in 34*ff32ab3aSShengchen Kandef RMPUPDATE: I<0x01, MRM_FE, (outs), (ins), "rmpupdate", []>, TB, XD, 359386483bSGanesh Gopalasubramanian Requires<[In64BitMode]>; 369386483bSGanesh Gopalasubramanian 379386483bSGanesh Gopalasubramanian// F3 0F 01 FE 3810b7c47eSGanesh Gopalasubramanianlet Uses = [RAX, RCX, RDX], Defs = [EAX, EFLAGS] in 39*ff32ab3aSShengchen Kandef RMPADJUST: I<0x01, MRM_FE, (outs), (ins), "rmpadjust", []>, TB, XS, 409386483bSGanesh Gopalasubramanian Requires<[In64BitMode]>; 4110b7c47eSGanesh Gopalasubramanian 4210b7c47eSGanesh Gopalasubramanian// F3 0F 01 FD 4310b7c47eSGanesh Gopalasubramanianlet Uses = [RAX, RDX], Defs = [RAX, RCX, RDX, EFLAGS] in 44*ff32ab3aSShengchen Kandef RMPQUERY: I<0x01, MRM_FD, (outs), (ins), "rmpquery", []>, TB, XS, 4510b7c47eSGanesh Gopalasubramanian Requires<[In64BitMode]>; 469386483bSGanesh Gopalasubramanian} // SchedRW 479386483bSGanesh Gopalasubramanian 489386483bSGanesh Gopalasubramaniandef : InstAlias<"psmash\t{%rax|rax}", (PSMASH)>, Requires<[In64BitMode]>; 4910b7c47eSGanesh Gopalasubramaniandef : InstAlias<"pvalidate\t{%rax, %rcx, %rdx|rdx, rcx, rax|}", (PVALIDATE64)>, Requires<[In64BitMode]>; 5010b7c47eSGanesh Gopalasubramaniandef : InstAlias<"pvalidate\t{%eax, %ecx, %edx|edx, ecx, eax|}", (PVALIDATE32)>, Requires<[Not64BitMode]>; 5110b7c47eSGanesh Gopalasubramaniandef : InstAlias<"rmpupdate\t{%rax, %rcx|rcx, rax|}", (RMPUPDATE)>, Requires<[In64BitMode]>; 5210b7c47eSGanesh Gopalasubramaniandef : InstAlias<"rmpadjust\t{%rax, %rcx, %rdx|rdx, rcx, rax|}", (RMPADJUST)>, Requires<[In64BitMode]>; 5310b7c47eSGanesh Gopalasubramaniandef : InstAlias<"rmpquery\t{%rax, %rdx|rdx, rax|}", (RMPQUERY)>, Requires<[In64BitMode]>; 54