1 //===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief This file defines the WebAssembly-specific subclass of TargetMachine. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #include "WebAssemblyTargetMachine.h" 16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 17 #include "WebAssembly.h" 18 #include "WebAssemblyTargetObjectFile.h" 19 #include "WebAssemblyTargetTransformInfo.h" 20 #include "llvm/CodeGen/MachineFunctionPass.h" 21 #include "llvm/CodeGen/Passes.h" 22 #include "llvm/CodeGen/RegAllocRegistry.h" 23 #include "llvm/CodeGen/TargetPassConfig.h" 24 #include "llvm/IR/Function.h" 25 #include "llvm/Support/TargetRegistry.h" 26 #include "llvm/Target/TargetOptions.h" 27 #include "llvm/Transforms/Scalar.h" 28 #include "llvm/Transforms/Utils.h" 29 using namespace llvm; 30 31 #define DEBUG_TYPE "wasm" 32 33 // Emscripten's asm.js-style exception handling 34 static cl::opt<bool> EnableEmException( 35 "enable-emscripten-cxx-exceptions", 36 cl::desc("WebAssembly Emscripten-style exception handling"), 37 cl::init(false)); 38 39 // Emscripten's asm.js-style setjmp/longjmp handling 40 static cl::opt<bool> EnableEmSjLj( 41 "enable-emscripten-sjlj", 42 cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"), 43 cl::init(false)); 44 45 extern "C" void LLVMInitializeWebAssemblyTarget() { 46 // Register the target. 47 RegisterTargetMachine<WebAssemblyTargetMachine> X( 48 getTheWebAssemblyTarget32()); 49 RegisterTargetMachine<WebAssemblyTargetMachine> Y( 50 getTheWebAssemblyTarget64()); 51 52 // Register backend passes 53 auto &PR = *PassRegistry::getPassRegistry(); 54 initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR); 55 initializeLowerGlobalDtorsPass(PR); 56 initializeFixFunctionBitcastsPass(PR); 57 initializeOptimizeReturnedPass(PR); 58 initializeWebAssemblyArgumentMovePass(PR); 59 initializeWebAssemblySetP2AlignOperandsPass(PR); 60 initializeWebAssemblyReplacePhysRegsPass(PR); 61 initializeWebAssemblyPrepareForLiveIntervalsPass(PR); 62 initializeWebAssemblyOptimizeLiveIntervalsPass(PR); 63 initializeWebAssemblyStoreResultsPass(PR); 64 initializeWebAssemblyRegStackifyPass(PR); 65 initializeWebAssemblyRegColoringPass(PR); 66 initializeWebAssemblyExplicitLocalsPass(PR); 67 initializeWebAssemblyFixIrreducibleControlFlowPass(PR); 68 initializeWebAssemblyCFGSortPass(PR); 69 initializeWebAssemblyCFGStackifyPass(PR); 70 initializeWebAssemblyLowerBrUnlessPass(PR); 71 initializeWebAssemblyRegNumberingPass(PR); 72 initializeWebAssemblyPeepholePass(PR); 73 initializeWebAssemblyCallIndirectFixupPass(PR); 74 } 75 76 //===----------------------------------------------------------------------===// 77 // WebAssembly Lowering public interface. 78 //===----------------------------------------------------------------------===// 79 80 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) { 81 if (!RM.hasValue()) 82 return Reloc::PIC_; 83 return *RM; 84 } 85 86 /// Create an WebAssembly architecture model. 87 /// 88 WebAssemblyTargetMachine::WebAssemblyTargetMachine( 89 const Target &T, const Triple &TT, StringRef CPU, StringRef FS, 90 const TargetOptions &Options, Optional<Reloc::Model> RM, 91 Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) 92 : LLVMTargetMachine(T, 93 TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128" 94 : "e-m:e-p:32:32-i64:64-n32:64-S128", 95 TT, CPU, FS, Options, getEffectiveRelocModel(RM), 96 CM ? *CM : CodeModel::Large, OL), 97 TLOF(TT.isOSBinFormatELF() ? 98 static_cast<TargetLoweringObjectFile*>( 99 new WebAssemblyTargetObjectFileELF()) : 100 static_cast<TargetLoweringObjectFile*>( 101 new WebAssemblyTargetObjectFile())) { 102 // WebAssembly type-checks instructions, but a noreturn function with a return 103 // type that doesn't match the context will cause a check failure. So we lower 104 // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's 105 // 'unreachable' instructions which is meant for that case. 106 this->Options.TrapUnreachable = true; 107 108 // WebAssembly treats each function as an independent unit. Force 109 // -ffunction-sections, effectively, so that we can emit them independently. 110 if (!TT.isOSBinFormatELF()) { 111 this->Options.FunctionSections = true; 112 this->Options.DataSections = true; 113 this->Options.UniqueSectionNames = true; 114 } 115 116 initAsmInfo(); 117 118 // Note that we don't use setRequiresStructuredCFG(true). It disables 119 // optimizations than we're ok with, and want, such as critical edge 120 // splitting and tail merging. 121 } 122 123 WebAssemblyTargetMachine::~WebAssemblyTargetMachine() {} 124 125 const WebAssemblySubtarget * 126 WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const { 127 Attribute CPUAttr = F.getFnAttribute("target-cpu"); 128 Attribute FSAttr = F.getFnAttribute("target-features"); 129 130 std::string CPU = !CPUAttr.hasAttribute(Attribute::None) 131 ? CPUAttr.getValueAsString().str() 132 : TargetCPU; 133 std::string FS = !FSAttr.hasAttribute(Attribute::None) 134 ? FSAttr.getValueAsString().str() 135 : TargetFS; 136 137 auto &I = SubtargetMap[CPU + FS]; 138 if (!I) { 139 // This needs to be done before we create a new subtarget since any 140 // creation will depend on the TM and the code generation flags on the 141 // function that reside in TargetOptions. 142 resetTargetOptions(F); 143 I = llvm::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this); 144 } 145 return I.get(); 146 } 147 148 namespace { 149 class StripThreadLocal final : public ModulePass { 150 // The default thread model for wasm is single, where thread-local variables 151 // are identical to regular globals and should be treated the same. So this 152 // pass just converts all GlobalVariables to NotThreadLocal 153 static char ID; 154 155 public: 156 StripThreadLocal() : ModulePass(ID) {} 157 bool runOnModule(Module &M) override { 158 for (auto &GV : M.globals()) 159 GV.setThreadLocalMode(GlobalValue::ThreadLocalMode::NotThreadLocal); 160 return true; 161 } 162 }; 163 char StripThreadLocal::ID = 0; 164 165 /// WebAssembly Code Generator Pass Configuration Options. 166 class WebAssemblyPassConfig final : public TargetPassConfig { 167 public: 168 WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM) 169 : TargetPassConfig(TM, PM) {} 170 171 WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const { 172 return getTM<WebAssemblyTargetMachine>(); 173 } 174 175 FunctionPass *createTargetRegisterAllocator(bool) override; 176 177 void addIRPasses() override; 178 bool addInstSelector() override; 179 void addPostRegAlloc() override; 180 bool addGCPasses() override { return false; } 181 void addPreEmitPass() override; 182 }; 183 } // end anonymous namespace 184 185 TargetTransformInfo 186 WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) { 187 return TargetTransformInfo(WebAssemblyTTIImpl(this, F)); 188 } 189 190 TargetPassConfig * 191 WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) { 192 return new WebAssemblyPassConfig(*this, PM); 193 } 194 195 FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) { 196 return nullptr; // No reg alloc 197 } 198 199 //===----------------------------------------------------------------------===// 200 // The following functions are called from lib/CodeGen/Passes.cpp to modify 201 // the CodeGen pass sequence. 202 //===----------------------------------------------------------------------===// 203 204 void WebAssemblyPassConfig::addIRPasses() { 205 if (TM->Options.ThreadModel == ThreadModel::Single) { 206 // In "single" mode, atomics get lowered to non-atomics. 207 addPass(createLowerAtomicPass()); 208 addPass(new StripThreadLocal()); 209 } else { 210 // Expand some atomic operations. WebAssemblyTargetLowering has hooks which 211 // control specifically what gets lowered. 212 addPass(createAtomicExpandPass()); 213 } 214 215 // Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls. 216 addPass(createWebAssemblyLowerGlobalDtors()); 217 218 // Fix function bitcasts, as WebAssembly requires caller and callee signatures 219 // to match. 220 addPass(createWebAssemblyFixFunctionBitcasts()); 221 222 // Optimize "returned" function attributes. 223 if (getOptLevel() != CodeGenOpt::None) 224 addPass(createWebAssemblyOptimizeReturned()); 225 226 // If exception handling is not enabled and setjmp/longjmp handling is 227 // enabled, we lower invokes into calls and delete unreachable landingpad 228 // blocks. Lowering invokes when there is no EH support is done in 229 // TargetPassConfig::addPassesToHandleExceptions, but this runs after this 230 // function and SjLj handling expects all invokes to be lowered before. 231 if (!EnableEmException && 232 TM->Options.ExceptionModel == ExceptionHandling::None) { 233 addPass(createLowerInvokePass()); 234 // The lower invoke pass may create unreachable code. Remove it in order not 235 // to process dead blocks in setjmp/longjmp handling. 236 addPass(createUnreachableBlockEliminationPass()); 237 } 238 239 // Handle exceptions and setjmp/longjmp if enabled. 240 if (EnableEmException || EnableEmSjLj) 241 addPass(createWebAssemblyLowerEmscriptenEHSjLj(EnableEmException, 242 EnableEmSjLj)); 243 244 TargetPassConfig::addIRPasses(); 245 } 246 247 bool WebAssemblyPassConfig::addInstSelector() { 248 (void)TargetPassConfig::addInstSelector(); 249 addPass( 250 createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel())); 251 // Run the argument-move pass immediately after the ScheduleDAG scheduler 252 // so that we can fix up the ARGUMENT instructions before anything else 253 // sees them in the wrong place. 254 addPass(createWebAssemblyArgumentMove()); 255 // Set the p2align operands. This information is present during ISel, however 256 // it's inconvenient to collect. Collect it now, and update the immediate 257 // operands. 258 addPass(createWebAssemblySetP2AlignOperands()); 259 return false; 260 } 261 262 void WebAssemblyPassConfig::addPostRegAlloc() { 263 // TODO: The following CodeGen passes don't currently support code containing 264 // virtual registers. Consider removing their restrictions and re-enabling 265 // them. 266 267 // Has no asserts of its own, but was not written to handle virtual regs. 268 disablePass(&ShrinkWrapID); 269 270 // These functions all require the NoVRegs property. 271 disablePass(&MachineCopyPropagationID); 272 disablePass(&PostRASchedulerID); 273 disablePass(&FuncletLayoutID); 274 disablePass(&StackMapLivenessID); 275 disablePass(&LiveDebugValuesID); 276 disablePass(&PatchableFunctionID); 277 278 TargetPassConfig::addPostRegAlloc(); 279 } 280 281 void WebAssemblyPassConfig::addPreEmitPass() { 282 TargetPassConfig::addPreEmitPass(); 283 284 // Now that we have a prologue and epilogue and all frame indices are 285 // rewritten, eliminate SP and FP. This allows them to be stackified, 286 // colored, and numbered with the rest of the registers. 287 addPass(createWebAssemblyReplacePhysRegs()); 288 289 // Rewrite pseudo call_indirect instructions as real instructions. 290 // This needs to run before register stackification, because we change the 291 // order of the arguments. 292 addPass(createWebAssemblyCallIndirectFixup()); 293 294 if (getOptLevel() != CodeGenOpt::None) { 295 // LiveIntervals isn't commonly run this late. Re-establish preconditions. 296 addPass(createWebAssemblyPrepareForLiveIntervals()); 297 298 // Depend on LiveIntervals and perform some optimizations on it. 299 addPass(createWebAssemblyOptimizeLiveIntervals()); 300 301 // Prepare store instructions for register stackifying. 302 addPass(createWebAssemblyStoreResults()); 303 304 // Mark registers as representing wasm's value stack. This is a key 305 // code-compression technique in WebAssembly. We run this pass (and 306 // StoreResults above) very late, so that it sees as much code as possible, 307 // including code emitted by PEI and expanded by late tail duplication. 308 addPass(createWebAssemblyRegStackify()); 309 310 // Run the register coloring pass to reduce the total number of registers. 311 // This runs after stackification so that it doesn't consider registers 312 // that become stackified. 313 addPass(createWebAssemblyRegColoring()); 314 } 315 316 // Eliminate multiple-entry loops. Do this before inserting explicit get_local 317 // and set_local operators because we create a new variable that we want 318 // converted into a local. 319 addPass(createWebAssemblyFixIrreducibleControlFlow()); 320 321 // Insert explicit get_local and set_local operators. 322 addPass(createWebAssemblyExplicitLocals()); 323 324 // Sort the blocks of the CFG into topological order, a prerequisite for 325 // BLOCK and LOOP markers. 326 addPass(createWebAssemblyCFGSort()); 327 328 // Insert BLOCK and LOOP markers. 329 addPass(createWebAssemblyCFGStackify()); 330 331 // Lower br_unless into br_if. 332 addPass(createWebAssemblyLowerBrUnless()); 333 334 // Perform the very last peephole optimizations on the code. 335 if (getOptLevel() != CodeGenOpt::None) 336 addPass(createWebAssemblyPeephole()); 337 338 // Create a mapping from LLVM CodeGen virtual registers to wasm registers. 339 addPass(createWebAssemblyRegNumbering()); 340 } 341