1 //=- WebAssemblyMCCodeEmitter.cpp - Convert WebAssembly code to machine code -// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief This file implements the WebAssemblyMCCodeEmitter class. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 16 #include "llvm/ADT/STLExtras.h" 17 #include "llvm/ADT/Statistic.h" 18 #include "llvm/MC/MCCodeEmitter.h" 19 #include "llvm/MC/MCFixup.h" 20 #include "llvm/MC/MCInst.h" 21 #include "llvm/MC/MCInstrInfo.h" 22 #include "llvm/MC/MCRegisterInfo.h" 23 #include "llvm/MC/MCSubtargetInfo.h" 24 #include "llvm/MC/MCSymbol.h" 25 #include "llvm/Support/raw_ostream.h" 26 using namespace llvm; 27 28 #define DEBUG_TYPE "mccodeemitter" 29 30 STATISTIC(MCNumEmitted, "Number of MC instructions emitted."); 31 STATISTIC(MCNumFixups, "Number of MC fixups created."); 32 33 namespace { 34 class WebAssemblyMCCodeEmitter final : public MCCodeEmitter { 35 const MCInstrInfo &MCII; 36 37 // Implementation generated by tablegen. 38 uint64_t getBinaryCodeForInstr(const MCInst &MI, 39 SmallVectorImpl<MCFixup> &Fixups, 40 const MCSubtargetInfo &STI) const; 41 42 void encodeInstruction(const MCInst &MI, raw_ostream &OS, 43 SmallVectorImpl<MCFixup> &Fixups, 44 const MCSubtargetInfo &STI) const override; 45 46 public: 47 WebAssemblyMCCodeEmitter(const MCInstrInfo &mcii) 48 : MCII(mcii) {} 49 }; 50 } // end anonymous namespace 51 52 MCCodeEmitter *llvm::createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII) { 53 return new WebAssemblyMCCodeEmitter(MCII); 54 } 55 56 void WebAssemblyMCCodeEmitter::encodeInstruction( 57 const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, 58 const MCSubtargetInfo &STI) const { 59 // FIXME: This is not the real binary encoding. This is an extremely 60 // over-simplified encoding where we just use uint64_t for everything. This 61 // is a temporary measure. 62 support::endian::Writer<support::little>(OS).write<uint64_t>(MI.getOpcode()); 63 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); 64 if (Desc.isVariadic()) 65 support::endian::Writer<support::little>(OS).write<uint64_t>( 66 MI.getNumOperands() - Desc.NumOperands); 67 for (unsigned i = 0, e = MI.getNumOperands(); i < e; ++i) { 68 const MCOperand &MO = MI.getOperand(i); 69 if (MO.isReg()) { 70 support::endian::Writer<support::little>(OS).write<uint64_t>(MO.getReg()); 71 } else if (MO.isImm()) { 72 support::endian::Writer<support::little>(OS).write<uint64_t>(MO.getImm()); 73 } else if (MO.isFPImm()) { 74 support::endian::Writer<support::little>(OS).write<double>(MO.getFPImm()); 75 } else if (MO.isExpr()) { 76 support::endian::Writer<support::little>(OS).write<uint64_t>(0); 77 Fixups.push_back(MCFixup::create( 78 (1 + MCII.get(MI.getOpcode()).isVariadic() + i) * sizeof(uint64_t), 79 MO.getExpr(), STI.getTargetTriple().isArch64Bit() ? FK_Data_8 : FK_Data_4, 80 MI.getLoc())); 81 ++MCNumFixups; 82 } else { 83 llvm_unreachable("unexpected operand kind"); 84 } 85 } 86 87 ++MCNumEmitted; // Keep track of the # of mi's emitted. 88 } 89 90 #include "WebAssemblyGenMCCodeEmitter.inc" 91